Lines Matching refs:mac_delay
52 struct mac_delay_struct mac_delay; member
124 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mt2712_delay_ps2stage() local
130 mac_delay->tx_delay /= 550; in mt2712_delay_ps2stage()
131 mac_delay->rx_delay /= 550; in mt2712_delay_ps2stage()
138 mac_delay->tx_delay /= 170; in mt2712_delay_ps2stage()
139 mac_delay->rx_delay /= 170; in mt2712_delay_ps2stage()
149 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mt2712_delay_stage2ps() local
155 mac_delay->tx_delay *= 550; in mt2712_delay_stage2ps()
156 mac_delay->rx_delay *= 550; in mt2712_delay_stage2ps()
163 mac_delay->tx_delay *= 170; in mt2712_delay_stage2ps()
164 mac_delay->rx_delay *= 170; in mt2712_delay_stage2ps()
174 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mt2712_set_delay() local
181 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
182 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
183 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->tx_inv); in mt2712_set_delay()
185 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
186 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
187 delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
196 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
197 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
198 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
200 delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
201 delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
202 delay_val |= FIELD_PREP(ETH_DLY_GTXC_INV, mac_delay->tx_inv); in mt2712_set_delay()
215 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
216 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
217 delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
223 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
224 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
225 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
231 if (mac_delay->tx_inv) in mt2712_set_delay()
241 delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
242 delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
243 delay_val |= FIELD_PREP(ETH_DLY_GTXC_INV, mac_delay->tx_inv); in mt2712_set_delay()
245 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
246 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
247 delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
273 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mediatek_dwmac_config_dt() local
291 mac_delay->tx_delay = tx_delay_ps; in mediatek_dwmac_config_dt()
300 mac_delay->rx_delay = rx_delay_ps; in mediatek_dwmac_config_dt()
307 mac_delay->tx_inv = of_property_read_bool(plat->np, "mediatek,txc-inverse"); in mediatek_dwmac_config_dt()
308 mac_delay->rx_inv = of_property_read_bool(plat->np, "mediatek,rxc-inverse"); in mediatek_dwmac_config_dt()