Lines Matching refs:efx
84 static inline void ef4_write_buf_tbl(struct ef4_nic *efx, ef4_qword_t *value, in ef4_write_buf_tbl() argument
87 ef4_sram_writeq(efx, efx->membase + efx->type->buf_tbl_base, in ef4_write_buf_tbl()
98 int ef4_farch_test_registers(struct ef4_nic *efx, in ef4_farch_test_registers() argument
111 ef4_reado(efx, &original, address); in ef4_farch_test_registers()
122 ef4_writeo(efx, ®, address); in ef4_farch_test_registers()
123 ef4_reado(efx, &buf, address); in ef4_farch_test_registers()
132 ef4_writeo(efx, ®, address); in ef4_farch_test_registers()
133 ef4_reado(efx, &buf, address); in ef4_farch_test_registers()
139 ef4_writeo(efx, &original, address); in ef4_farch_test_registers()
145 netif_err(efx, hw, efx->net_dev, in ef4_farch_test_registers()
168 ef4_init_special_buffer(struct ef4_nic *efx, struct ef4_special_buffer *buffer) in ef4_init_special_buffer() argument
181 netif_dbg(efx, probe, efx->net_dev, in ef4_init_special_buffer()
188 ef4_write_buf_tbl(efx, &buf_desc, index); in ef4_init_special_buffer()
194 ef4_fini_special_buffer(struct ef4_nic *efx, struct ef4_special_buffer *buffer) in ef4_fini_special_buffer() argument
203 netif_dbg(efx, hw, efx->net_dev, "unmapping special buffers %d-%d\n", in ef4_fini_special_buffer()
211 ef4_writeo(efx, &buf_tbl_upd, FR_AZ_BUF_TBL_UPD); in ef4_fini_special_buffer()
223 static int ef4_alloc_special_buffer(struct ef4_nic *efx, in ef4_alloc_special_buffer() argument
229 if (ef4_nic_alloc_buffer(efx, &buffer->buf, len, GFP_KERNEL)) in ef4_alloc_special_buffer()
235 buffer->index = efx->next_buffer_table; in ef4_alloc_special_buffer()
236 efx->next_buffer_table += buffer->entries; in ef4_alloc_special_buffer()
238 netif_dbg(efx, probe, efx->net_dev, in ef4_alloc_special_buffer()
249 ef4_free_special_buffer(struct ef4_nic *efx, struct ef4_special_buffer *buffer) in ef4_free_special_buffer() argument
254 netif_dbg(efx, hw, efx->net_dev, in ef4_free_special_buffer()
261 ef4_nic_free_buffer(efx, &buffer->buf); in ef4_free_special_buffer()
279 ef4_writed_page(tx_queue->efx, ®, in ef4_farch_notify_tx_desc()
297 ef4_writeo_page(tx_queue->efx, ®, in ef4_farch_push_tx_desc()
355 if (EF4_WORKAROUND_5391(tx_queue->efx) && (dma_addr & 0xf)) in ef4_farch_tx_limit_len()
365 struct ef4_nic *efx = tx_queue->efx; in ef4_farch_tx_probe() local
369 return ef4_alloc_special_buffer(efx, &tx_queue->txd, in ef4_farch_tx_probe()
375 struct ef4_nic *efx = tx_queue->efx; in ef4_farch_tx_init() local
379 ef4_init_special_buffer(efx, &tx_queue->txd); in ef4_farch_tx_init()
396 if (ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) { in ef4_farch_tx_init()
403 ef4_writeo_table(efx, ®, efx->type->txd_ptr_tbl_base, in ef4_farch_tx_init()
406 if (ef4_nic_rev(efx) < EF4_REV_FALCON_B0) { in ef4_farch_tx_init()
410 ef4_reado(efx, ®, FR_AA_TX_CHKSM_CFG); in ef4_farch_tx_init()
415 ef4_writeo(efx, ®, FR_AA_TX_CHKSM_CFG); in ef4_farch_tx_init()
418 if (ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) { in ef4_farch_tx_init()
424 ef4_writeo_table(efx, ®, FR_BZ_TX_PACE_TBL, in ef4_farch_tx_init()
431 struct ef4_nic *efx = tx_queue->efx; in ef4_farch_flush_tx_queue() local
440 ef4_writeo(efx, &tx_flush_descq, FR_AZ_TX_FLUSH_DESCQ); in ef4_farch_flush_tx_queue()
445 struct ef4_nic *efx = tx_queue->efx; in ef4_farch_tx_fini() local
450 ef4_writeo_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base, in ef4_farch_tx_fini()
454 ef4_fini_special_buffer(efx, &tx_queue->txd); in ef4_farch_tx_fini()
460 ef4_free_special_buffer(tx_queue->efx, &tx_queue->txd); in ef4_farch_tx_remove()
481 rx_queue->efx->type->rx_buffer_padding, in ef4_farch_build_rx_desc()
491 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_rx_write() local
505 ef4_writed_page(efx, ®, FR_AZ_RX_DESC_UPD_DWORD_P0, in ef4_farch_rx_write()
511 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_rx_probe() local
515 return ef4_alloc_special_buffer(efx, &rx_queue->rxd, in ef4_farch_rx_probe()
522 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_rx_init() local
523 bool is_b0 = ef4_nic_rev(efx) >= EF4_REV_FALCON_B0; in ef4_farch_rx_init()
532 jumbo_en = !is_b0 || efx->rx_scatter; in ef4_farch_rx_init()
534 netif_dbg(efx, hw, efx->net_dev, in ef4_farch_rx_init()
542 ef4_init_special_buffer(efx, &rx_queue->rxd); in ef4_farch_rx_init()
559 ef4_writeo_table(efx, &rx_desc_ptr, efx->type->rxd_ptr_tbl_base, in ef4_farch_rx_init()
565 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_flush_rx_queue() local
572 ef4_writeo(efx, &rx_flush_descq, FR_AZ_RX_FLUSH_DESCQ); in ef4_farch_flush_rx_queue()
578 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_rx_fini() local
582 ef4_writeo_table(efx, &rx_desc_ptr, efx->type->rxd_ptr_tbl_base, in ef4_farch_rx_fini()
586 ef4_fini_special_buffer(efx, &rx_queue->rxd); in ef4_farch_rx_fini()
592 ef4_free_special_buffer(rx_queue->efx, &rx_queue->rxd); in ef4_farch_rx_remove()
604 static bool ef4_farch_flush_wake(struct ef4_nic *efx) in ef4_farch_flush_wake() argument
609 return (atomic_read(&efx->active_queues) == 0 || in ef4_farch_flush_wake()
610 (atomic_read(&efx->rxq_flush_outstanding) < EF4_RX_FLUSH_COUNT in ef4_farch_flush_wake()
611 && atomic_read(&efx->rxq_flush_pending) > 0)); in ef4_farch_flush_wake()
614 static bool ef4_check_tx_flush_complete(struct ef4_nic *efx) in ef4_check_tx_flush_complete() argument
621 ef4_for_each_channel(channel, efx) { in ef4_check_tx_flush_complete()
623 ef4_reado_table(efx, &txd_ptr_tbl, in ef4_check_tx_flush_complete()
629 netif_dbg(efx, hw, efx->net_dev, in ef4_check_tx_flush_complete()
638 netif_dbg(efx, hw, efx->net_dev, in ef4_check_tx_flush_complete()
658 static int ef4_farch_do_flush(struct ef4_nic *efx) in ef4_farch_do_flush() argument
666 ef4_for_each_channel(channel, efx) { in ef4_farch_do_flush()
672 atomic_inc(&efx->rxq_flush_pending); in ef4_farch_do_flush()
676 while (timeout && atomic_read(&efx->active_queues) > 0) { in ef4_farch_do_flush()
681 ef4_for_each_channel(channel, efx) { in ef4_farch_do_flush()
683 if (atomic_read(&efx->rxq_flush_outstanding) >= in ef4_farch_do_flush()
689 atomic_dec(&efx->rxq_flush_pending); in ef4_farch_do_flush()
690 atomic_inc(&efx->rxq_flush_outstanding); in ef4_farch_do_flush()
696 timeout = wait_event_timeout(efx->flush_wq, in ef4_farch_do_flush()
697 ef4_farch_flush_wake(efx), in ef4_farch_do_flush()
701 if (atomic_read(&efx->active_queues) && in ef4_farch_do_flush()
702 !ef4_check_tx_flush_complete(efx)) { in ef4_farch_do_flush()
703 netif_err(efx, hw, efx->net_dev, "failed to flush %d queues " in ef4_farch_do_flush()
704 "(rx %d+%d)\n", atomic_read(&efx->active_queues), in ef4_farch_do_flush()
705 atomic_read(&efx->rxq_flush_outstanding), in ef4_farch_do_flush()
706 atomic_read(&efx->rxq_flush_pending)); in ef4_farch_do_flush()
709 atomic_set(&efx->active_queues, 0); in ef4_farch_do_flush()
710 atomic_set(&efx->rxq_flush_pending, 0); in ef4_farch_do_flush()
711 atomic_set(&efx->rxq_flush_outstanding, 0); in ef4_farch_do_flush()
717 int ef4_farch_fini_dmaq(struct ef4_nic *efx) in ef4_farch_fini_dmaq() argument
725 if (efx->state != STATE_RECOVERY) { in ef4_farch_fini_dmaq()
727 if (efx->pci_dev->is_busmaster) { in ef4_farch_fini_dmaq()
728 efx->type->prepare_flush(efx); in ef4_farch_fini_dmaq()
729 rc = ef4_farch_do_flush(efx); in ef4_farch_fini_dmaq()
730 efx->type->finish_flush(efx); in ef4_farch_fini_dmaq()
733 ef4_for_each_channel(channel, efx) { in ef4_farch_fini_dmaq()
758 void ef4_farch_finish_flr(struct ef4_nic *efx) in ef4_farch_finish_flr() argument
760 atomic_set(&efx->rxq_flush_pending, 0); in ef4_farch_finish_flr()
761 atomic_set(&efx->rxq_flush_outstanding, 0); in ef4_farch_finish_flr()
762 atomic_set(&efx->active_queues, 0); in ef4_farch_finish_flr()
781 struct ef4_nic *efx = channel->efx; in ef4_farch_ev_read_ack() local
789 ef4_writed(efx, ®, in ef4_farch_ev_read_ack()
790 efx->type->evq_rptr_tbl_base + in ef4_farch_ev_read_ack()
795 void ef4_farch_generate_event(struct ef4_nic *efx, unsigned int evq, in ef4_farch_generate_event() argument
807 ef4_writeo(efx, &drv_ev_reg, FR_AZ_DRV_EV); in ef4_farch_generate_event()
817 ef4_farch_generate_event(channel->efx, channel->channel, &event); in ef4_farch_magic_event()
831 struct ef4_nic *efx = channel->efx; in ef4_farch_handle_tx_event() local
834 if (unlikely(READ_ONCE(efx->reset_pending))) in ef4_farch_handle_tx_event()
852 netif_tx_lock(efx->net_dev); in ef4_farch_handle_tx_event()
854 netif_tx_unlock(efx->net_dev); in ef4_farch_handle_tx_event()
856 ef4_schedule_reset(efx, RESET_TYPE_DMA_ERROR); in ef4_farch_handle_tx_event()
858 netif_err(efx, tx_err, efx->net_dev, in ef4_farch_handle_tx_event()
872 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_handle_rx_not_ok() local
887 rx_ev_drib_nib = ((ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) ? in ef4_farch_handle_rx_not_ok()
898 else if (!efx->loopback_selftest) { in ef4_farch_handle_rx_not_ok()
918 netif_dbg(efx, rx_err, efx->net_dev, in ef4_farch_handle_rx_not_ok()
950 struct ef4_nic *efx = rx_queue->efx; in ef4_farch_handle_rx_bad_index() local
962 netif_info(efx, rx_err, efx->net_dev, in ef4_farch_handle_rx_bad_index()
966 ef4_schedule_reset(efx, EF4_WORKAROUND_5676(efx) ? in ef4_farch_handle_rx_bad_index()
987 struct ef4_nic *efx = channel->efx; in ef4_farch_handle_rx_event() local
989 if (unlikely(READ_ONCE(efx->reset_pending))) in ef4_farch_handle_rx_event()
1090 ef4_farch_handle_tx_flush_done(struct ef4_nic *efx, ef4_qword_t *event) in ef4_farch_handle_tx_flush_done() argument
1096 if (qid < EF4_TXQ_TYPES * efx->n_tx_channels) { in ef4_farch_handle_tx_flush_done()
1097 tx_queue = ef4_get_tx_queue(efx, qid / EF4_TXQ_TYPES, in ef4_farch_handle_tx_flush_done()
1111 ef4_farch_handle_rx_flush_done(struct ef4_nic *efx, ef4_qword_t *event) in ef4_farch_handle_rx_flush_done() argument
1120 if (qid >= efx->n_channels) in ef4_farch_handle_rx_flush_done()
1122 channel = ef4_get_channel(efx, qid); in ef4_farch_handle_rx_flush_done()
1128 netif_info(efx, hw, efx->net_dev, in ef4_farch_handle_rx_flush_done()
1131 atomic_inc(&efx->rxq_flush_pending); in ef4_farch_handle_rx_flush_done()
1136 atomic_dec(&efx->rxq_flush_outstanding); in ef4_farch_handle_rx_flush_done()
1137 if (ef4_farch_flush_wake(efx)) in ef4_farch_handle_rx_flush_done()
1138 wake_up(&efx->flush_wq); in ef4_farch_handle_rx_flush_done()
1144 struct ef4_nic *efx = channel->efx; in ef4_farch_handle_drain_event() local
1146 WARN_ON(atomic_read(&efx->active_queues) == 0); in ef4_farch_handle_drain_event()
1147 atomic_dec(&efx->active_queues); in ef4_farch_handle_drain_event()
1148 if (ef4_farch_flush_wake(efx)) in ef4_farch_handle_drain_event()
1149 wake_up(&efx->flush_wq); in ef4_farch_handle_drain_event()
1155 struct ef4_nic *efx = channel->efx; in ef4_farch_handle_generated_event() local
1176 netif_dbg(efx, hw, efx->net_dev, "channel %d received " in ef4_farch_handle_generated_event()
1185 struct ef4_nic *efx = channel->efx; in ef4_farch_handle_driver_event() local
1194 netif_vdbg(efx, hw, efx->net_dev, "channel %d TXQ %d flushed\n", in ef4_farch_handle_driver_event()
1196 ef4_farch_handle_tx_flush_done(efx, event); in ef4_farch_handle_driver_event()
1199 netif_vdbg(efx, hw, efx->net_dev, "channel %d RXQ %d flushed\n", in ef4_farch_handle_driver_event()
1201 ef4_farch_handle_rx_flush_done(efx, event); in ef4_farch_handle_driver_event()
1204 netif_dbg(efx, hw, efx->net_dev, in ef4_farch_handle_driver_event()
1209 netif_vdbg(efx, hw, efx->net_dev, in ef4_farch_handle_driver_event()
1213 netif_vdbg(efx, hw, efx->net_dev, in ef4_farch_handle_driver_event()
1218 netif_vdbg(efx, hw, efx->net_dev, in ef4_farch_handle_driver_event()
1223 netif_err(efx, rx_err, efx->net_dev, in ef4_farch_handle_driver_event()
1226 atomic_inc(&efx->rx_reset); in ef4_farch_handle_driver_event()
1227 ef4_schedule_reset(efx, in ef4_farch_handle_driver_event()
1228 EF4_WORKAROUND_6555(efx) ? in ef4_farch_handle_driver_event()
1233 netif_err(efx, rx_err, efx->net_dev, in ef4_farch_handle_driver_event()
1237 ef4_schedule_reset(efx, RESET_TYPE_DMA_ERROR); in ef4_farch_handle_driver_event()
1240 netif_err(efx, tx_err, efx->net_dev, in ef4_farch_handle_driver_event()
1244 ef4_schedule_reset(efx, RESET_TYPE_DMA_ERROR); in ef4_farch_handle_driver_event()
1247 netif_vdbg(efx, hw, efx->net_dev, in ef4_farch_handle_driver_event()
1257 struct ef4_nic *efx = channel->efx; in ef4_farch_ev_process() local
1277 netif_vdbg(channel->efx, intr, channel->efx->net_dev, in ef4_farch_ev_process()
1297 if (tx_packets > efx->txq_entries) { in ef4_farch_ev_process()
1309 if (efx->type->handle_global_event && in ef4_farch_ev_process()
1310 efx->type->handle_global_event(channel, &event)) in ef4_farch_ev_process()
1314 netif_err(channel->efx, hw, channel->efx->net_dev, in ef4_farch_ev_process()
1329 struct ef4_nic *efx = channel->efx; in ef4_farch_ev_probe() local
1333 return ef4_alloc_special_buffer(efx, &channel->eventq, in ef4_farch_ev_probe()
1340 struct ef4_nic *efx = channel->efx; in ef4_farch_ev_init() local
1342 netif_dbg(efx, hw, efx->net_dev, in ef4_farch_ev_init()
1348 ef4_init_special_buffer(efx, &channel->eventq); in ef4_farch_ev_init()
1358 ef4_writeo_table(efx, ®, efx->type->evq_ptr_tbl_base, in ef4_farch_ev_init()
1367 struct ef4_nic *efx = channel->efx; in ef4_farch_ev_fini() local
1371 ef4_writeo_table(efx, ®, efx->type->evq_ptr_tbl_base, in ef4_farch_ev_fini()
1375 ef4_fini_special_buffer(efx, &channel->eventq); in ef4_farch_ev_fini()
1381 ef4_free_special_buffer(channel->efx, &channel->eventq); in ef4_farch_ev_remove()
1405 static inline void ef4_farch_interrupts(struct ef4_nic *efx, in ef4_farch_interrupts() argument
1411 FRF_AZ_KER_INT_LEVE_SEL, efx->irq_level, in ef4_farch_interrupts()
1414 ef4_writeo(efx, &int_en_reg_ker, FR_AZ_INT_EN_KER); in ef4_farch_interrupts()
1417 void ef4_farch_irq_enable_master(struct ef4_nic *efx) in ef4_farch_irq_enable_master() argument
1419 EF4_ZERO_OWORD(*((ef4_oword_t *) efx->irq_status.addr)); in ef4_farch_irq_enable_master()
1422 ef4_farch_interrupts(efx, true, false); in ef4_farch_irq_enable_master()
1425 void ef4_farch_irq_disable_master(struct ef4_nic *efx) in ef4_farch_irq_disable_master() argument
1428 ef4_farch_interrupts(efx, false, false); in ef4_farch_irq_disable_master()
1435 int ef4_farch_irq_test_generate(struct ef4_nic *efx) in ef4_farch_irq_test_generate() argument
1437 ef4_farch_interrupts(efx, true, true); in ef4_farch_irq_test_generate()
1444 irqreturn_t ef4_farch_fatal_interrupt(struct ef4_nic *efx) in ef4_farch_fatal_interrupt() argument
1446 struct falcon_nic_data *nic_data = efx->nic_data; in ef4_farch_fatal_interrupt()
1447 ef4_oword_t *int_ker = efx->irq_status.addr; in ef4_farch_fatal_interrupt()
1451 ef4_reado(efx, &fatal_intr, FR_AZ_FATAL_INTR_KER); in ef4_farch_fatal_interrupt()
1454 netif_err(efx, hw, efx->net_dev, "SYSTEM ERROR "EF4_OWORD_FMT" status " in ef4_farch_fatal_interrupt()
1464 ef4_reado(efx, ®, FR_AZ_MEM_STAT); in ef4_farch_fatal_interrupt()
1465 netif_err(efx, hw, efx->net_dev, in ef4_farch_fatal_interrupt()
1471 pci_clear_master(efx->pci_dev); in ef4_farch_fatal_interrupt()
1472 if (ef4_nic_is_dual_func(efx)) in ef4_farch_fatal_interrupt()
1474 ef4_farch_irq_disable_master(efx); in ef4_farch_fatal_interrupt()
1477 if (efx->int_error_count == 0 || in ef4_farch_fatal_interrupt()
1478 time_after(jiffies, efx->int_error_expire)) { in ef4_farch_fatal_interrupt()
1479 efx->int_error_count = 0; in ef4_farch_fatal_interrupt()
1480 efx->int_error_expire = in ef4_farch_fatal_interrupt()
1483 if (++efx->int_error_count < EF4_MAX_INT_ERRORS) { in ef4_farch_fatal_interrupt()
1484 netif_err(efx, hw, efx->net_dev, in ef4_farch_fatal_interrupt()
1486 ef4_schedule_reset(efx, RESET_TYPE_INT_ERROR); in ef4_farch_fatal_interrupt()
1488 netif_err(efx, hw, efx->net_dev, in ef4_farch_fatal_interrupt()
1491 ef4_schedule_reset(efx, RESET_TYPE_DISABLE); in ef4_farch_fatal_interrupt()
1502 struct ef4_nic *efx = dev_id; in ef4_farch_legacy_interrupt() local
1503 bool soft_enabled = READ_ONCE(efx->irq_soft_enabled); in ef4_farch_legacy_interrupt()
1504 ef4_oword_t *int_ker = efx->irq_status.addr; in ef4_farch_legacy_interrupt()
1512 ef4_readd(efx, ®, FR_BZ_INT_ISR0); in ef4_farch_legacy_interrupt()
1519 if (EF4_DWORD_IS_ALL_ONES(reg) && ef4_try_recovery(efx) && in ef4_farch_legacy_interrupt()
1520 !efx->eeh_disabled_legacy_irq) { in ef4_farch_legacy_interrupt()
1521 disable_irq_nosync(efx->legacy_irq); in ef4_farch_legacy_interrupt()
1522 efx->eeh_disabled_legacy_irq = true; in ef4_farch_legacy_interrupt()
1526 if (queues & (1U << efx->irq_level) && soft_enabled) { in ef4_farch_legacy_interrupt()
1529 return ef4_farch_fatal_interrupt(efx); in ef4_farch_legacy_interrupt()
1530 efx->last_irq_cpu = raw_smp_processor_id(); in ef4_farch_legacy_interrupt()
1534 efx->irq_zero_count = 0; in ef4_farch_legacy_interrupt()
1538 ef4_for_each_channel(channel, efx) { in ef4_farch_legacy_interrupt()
1553 if (efx->irq_zero_count++ == 0) in ef4_farch_legacy_interrupt()
1558 ef4_for_each_channel(channel, efx) { in ef4_farch_legacy_interrupt()
1570 netif_vdbg(efx, intr, efx->net_dev, in ef4_farch_legacy_interrupt()
1587 struct ef4_nic *efx = context->efx; in ef4_farch_msi_interrupt() local
1588 ef4_oword_t *int_ker = efx->irq_status.addr; in ef4_farch_msi_interrupt()
1591 netif_vdbg(efx, intr, efx->net_dev, in ef4_farch_msi_interrupt()
1595 if (!likely(READ_ONCE(efx->irq_soft_enabled))) in ef4_farch_msi_interrupt()
1599 if (context->index == efx->irq_level) { in ef4_farch_msi_interrupt()
1602 return ef4_farch_fatal_interrupt(efx); in ef4_farch_msi_interrupt()
1603 efx->last_irq_cpu = raw_smp_processor_id(); in ef4_farch_msi_interrupt()
1607 ef4_schedule_channel_irq(efx->channel[context->index]); in ef4_farch_msi_interrupt()
1615 void ef4_farch_rx_push_indir_table(struct ef4_nic *efx) in ef4_farch_rx_push_indir_table() argument
1620 BUG_ON(ef4_nic_rev(efx) < EF4_REV_FALCON_B0); in ef4_farch_rx_push_indir_table()
1622 BUILD_BUG_ON(ARRAY_SIZE(efx->rx_indir_table) != in ef4_farch_rx_push_indir_table()
1627 efx->rx_indir_table[i]); in ef4_farch_rx_push_indir_table()
1628 ef4_writed(efx, &dword, in ef4_farch_rx_push_indir_table()
1643 void ef4_farch_dimension_resources(struct ef4_nic *efx, unsigned sram_lim_qw) in ef4_farch_dimension_resources() argument
1650 vi_count = max(efx->n_channels, efx->n_tx_channels * EF4_TXQ_TYPES); in ef4_farch_dimension_resources()
1652 efx->tx_dc_base = sram_lim_qw - vi_count * TX_DC_ENTRIES; in ef4_farch_dimension_resources()
1653 efx->rx_dc_base = efx->tx_dc_base - vi_count * RX_DC_ENTRIES; in ef4_farch_dimension_resources()
1656 u32 ef4_farch_fpga_ver(struct ef4_nic *efx) in ef4_farch_fpga_ver() argument
1659 ef4_reado(efx, &altera_build, FR_AZ_ALTERA_BUILD); in ef4_farch_fpga_ver()
1663 void ef4_farch_init_common(struct ef4_nic *efx) in ef4_farch_init_common() argument
1668 EF4_POPULATE_OWORD_1(temp, FRF_AZ_SRM_TX_DC_BASE_ADR, efx->tx_dc_base); in ef4_farch_init_common()
1669 ef4_writeo(efx, &temp, FR_AZ_SRM_TX_DC_CFG); in ef4_farch_init_common()
1670 EF4_POPULATE_OWORD_1(temp, FRF_AZ_SRM_RX_DC_BASE_ADR, efx->rx_dc_base); in ef4_farch_init_common()
1671 ef4_writeo(efx, &temp, FR_AZ_SRM_RX_DC_CFG); in ef4_farch_init_common()
1676 ef4_writeo(efx, &temp, FR_AZ_TX_DC_CFG); in ef4_farch_init_common()
1683 ef4_writeo(efx, &temp, FR_AZ_RX_DC_CFG); in ef4_farch_init_common()
1685 ef4_writeo(efx, &temp, FR_AZ_RX_DC_PF_WM); in ef4_farch_init_common()
1690 EF4_INT_MODE_USE_MSI(efx), in ef4_farch_init_common()
1691 FRF_AZ_INT_ADR_KER, efx->irq_status.dma_addr); in ef4_farch_init_common()
1692 ef4_writeo(efx, &temp, FR_AZ_INT_ADR_KER); in ef4_farch_init_common()
1695 efx->irq_level = 0; in ef4_farch_init_common()
1708 ef4_writeo(efx, &temp, FR_AZ_FATAL_INTR_KER); in ef4_farch_init_common()
1713 ef4_reado(efx, &temp, FR_AZ_TX_RESERVED); in ef4_farch_init_common()
1726 if (ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) in ef4_farch_init_common()
1728 ef4_writeo(efx, &temp, FR_AZ_TX_RESERVED); in ef4_farch_init_common()
1730 if (ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) { in ef4_farch_init_common()
1740 ef4_writeo(efx, &temp, FR_BZ_TX_PACE); in ef4_farch_init_common()
1818 ef4_farch_filter_table_clear_entry(struct ef4_nic *efx,
1865 static void ef4_farch_filter_push_rx_config(struct ef4_nic *efx) in ef4_farch_filter_push_rx_config() argument
1867 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_push_rx_config()
1871 ef4_reado(efx, &filter_ctl, FR_BZ_RX_FILTER_CTL); in ef4_farch_filter_push_rx_config()
1925 } else if (ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) { in ef4_farch_filter_push_rx_config()
1933 efx->rx_scatter); in ef4_farch_filter_push_rx_config()
1936 ef4_writeo(efx, &filter_ctl, FR_BZ_RX_FILTER_CTL); in ef4_farch_filter_push_rx_config()
1939 static void ef4_farch_filter_push_tx_limits(struct ef4_nic *efx) in ef4_farch_filter_push_tx_limits() argument
1941 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_push_tx_limits()
1945 ef4_reado(efx, &tx_cfg, FR_AZ_TX_CFG); in ef4_farch_filter_push_tx_limits()
1959 ef4_writeo(efx, &tx_cfg, FR_AZ_TX_CFG); in ef4_farch_filter_push_tx_limits()
2150 ef4_farch_filter_init_rx_auto(struct ef4_nic *efx, in ef4_farch_filter_init_rx_auto() argument
2158 (ef4_rss_enabled(efx) ? EF4_FILTER_FLAG_RX_RSS : 0) | in ef4_farch_filter_init_rx_auto()
2159 (efx->rx_scatter ? EF4_FILTER_FLAG_RX_SCATTER : 0)); in ef4_farch_filter_init_rx_auto()
2302 u32 ef4_farch_filter_get_rx_id_limit(struct ef4_nic *efx) in ef4_farch_filter_get_rx_id_limit() argument
2304 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_get_rx_id_limit()
2318 s32 ef4_farch_filter_insert(struct ef4_nic *efx, in ef4_farch_filter_insert() argument
2322 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_insert()
2338 netif_vdbg(efx, hw, efx->net_dev, in ef4_farch_filter_insert()
2350 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_insert()
2380 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_insert()
2439 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_insert()
2444 ef4_farch_filter_push_tx_limits(efx); in ef4_farch_filter_insert()
2446 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_insert()
2449 ef4_writeo(efx, &filter, in ef4_farch_filter_insert()
2456 ef4_farch_filter_table_clear_entry(efx, table, in ef4_farch_filter_insert()
2460 netif_vdbg(efx, hw, efx->net_dev, in ef4_farch_filter_insert()
2466 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_insert()
2471 ef4_farch_filter_table_clear_entry(struct ef4_nic *efx, in ef4_farch_filter_table_clear_entry() argument
2484 ef4_writeo(efx, &filter, table->offset + table->step * filter_idx); in ef4_farch_filter_table_clear_entry()
2495 ef4_farch_filter_push_tx_limits(efx); in ef4_farch_filter_table_clear_entry()
2497 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_table_clear_entry()
2501 static int ef4_farch_filter_remove(struct ef4_nic *efx, in ef4_farch_filter_remove() argument
2513 ef4_farch_filter_init_rx_auto(efx, spec); in ef4_farch_filter_remove()
2514 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_remove()
2516 ef4_farch_filter_table_clear_entry(efx, table, filter_idx); in ef4_farch_filter_remove()
2522 int ef4_farch_filter_remove_safe(struct ef4_nic *efx, in ef4_farch_filter_remove_safe() argument
2526 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_remove_safe()
2541 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_remove_safe()
2542 rc = ef4_farch_filter_remove(efx, table, filter_idx, priority); in ef4_farch_filter_remove_safe()
2543 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_remove_safe()
2548 int ef4_farch_filter_get_safe(struct ef4_nic *efx, in ef4_farch_filter_get_safe() argument
2552 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_get_safe()
2569 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_get_safe()
2579 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_get_safe()
2585 ef4_farch_filter_table_clear(struct ef4_nic *efx, in ef4_farch_filter_table_clear() argument
2589 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_table_clear()
2593 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_table_clear()
2596 ef4_farch_filter_remove(efx, table, in ef4_farch_filter_table_clear()
2599 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_table_clear()
2602 int ef4_farch_filter_clear_rx(struct ef4_nic *efx, in ef4_farch_filter_clear_rx() argument
2605 ef4_farch_filter_table_clear(efx, EF4_FARCH_FILTER_TABLE_RX_IP, in ef4_farch_filter_clear_rx()
2607 ef4_farch_filter_table_clear(efx, EF4_FARCH_FILTER_TABLE_RX_MAC, in ef4_farch_filter_clear_rx()
2609 ef4_farch_filter_table_clear(efx, EF4_FARCH_FILTER_TABLE_RX_DEF, in ef4_farch_filter_clear_rx()
2614 u32 ef4_farch_filter_count_rx_used(struct ef4_nic *efx, in ef4_farch_filter_count_rx_used() argument
2617 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_count_rx_used()
2623 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_count_rx_used()
2636 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_count_rx_used()
2641 s32 ef4_farch_filter_get_rx_ids(struct ef4_nic *efx, in ef4_farch_filter_get_rx_ids() argument
2645 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_get_rx_ids()
2651 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_get_rx_ids()
2670 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_get_rx_ids()
2676 void ef4_farch_filter_table_restore(struct ef4_nic *efx) in ef4_farch_filter_table_restore() argument
2678 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_table_restore()
2684 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_table_restore()
2697 ef4_writeo(efx, &filter, in ef4_farch_filter_table_restore()
2702 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_table_restore()
2703 ef4_farch_filter_push_tx_limits(efx); in ef4_farch_filter_table_restore()
2705 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_table_restore()
2708 void ef4_farch_filter_table_remove(struct ef4_nic *efx) in ef4_farch_filter_table_remove() argument
2710 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_table_remove()
2720 int ef4_farch_filter_table_probe(struct ef4_nic *efx) in ef4_farch_filter_table_probe() argument
2729 efx->filter_state = state; in ef4_farch_filter_table_probe()
2731 if (ef4_nic_rev(efx) >= EF4_REV_FALCON_B0) { in ef4_farch_filter_table_probe()
2763 ef4_farch_filter_init_rx_auto(efx, spec); in ef4_farch_filter_table_probe()
2768 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_table_probe()
2773 ef4_farch_filter_table_remove(efx); in ef4_farch_filter_table_probe()
2778 void ef4_farch_filter_update_rx_scatter(struct ef4_nic *efx) in ef4_farch_filter_update_rx_scatter() argument
2780 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_update_rx_scatter()
2786 spin_lock_bh(&efx->filter_lock); in ef4_farch_filter_update_rx_scatter()
2796 efx->n_rx_channels) in ef4_farch_filter_update_rx_scatter()
2799 if (efx->rx_scatter) in ef4_farch_filter_update_rx_scatter()
2811 ef4_writeo(efx, &filter, in ef4_farch_filter_update_rx_scatter()
2816 ef4_farch_filter_push_rx_config(efx); in ef4_farch_filter_update_rx_scatter()
2818 spin_unlock_bh(&efx->filter_lock); in ef4_farch_filter_update_rx_scatter()
2823 s32 ef4_farch_filter_rfs_insert(struct ef4_nic *efx, in ef4_farch_filter_rfs_insert() argument
2826 return ef4_farch_filter_insert(efx, gen_spec, true); in ef4_farch_filter_rfs_insert()
2829 bool ef4_farch_filter_rfs_expire_one(struct ef4_nic *efx, u32 flow_id, in ef4_farch_filter_rfs_expire_one() argument
2832 struct ef4_farch_filter_state *state = efx->filter_state; in ef4_farch_filter_rfs_expire_one()
2838 rps_may_expire_flow(efx->net_dev, table->spec[index].dmaq_id, in ef4_farch_filter_rfs_expire_one()
2840 ef4_farch_filter_table_clear_entry(efx, table, index); in ef4_farch_filter_rfs_expire_one()
2849 void ef4_farch_filter_sync_rx_mode(struct ef4_nic *efx) in ef4_farch_filter_sync_rx_mode() argument
2851 struct net_device *net_dev = efx->net_dev; in ef4_farch_filter_sync_rx_mode()
2853 union ef4_multicast_hash *mc_hash = &efx->multicast_hash; in ef4_farch_filter_sync_rx_mode()
2857 if (!ef4_dev_registered(efx)) in ef4_farch_filter_sync_rx_mode()
2862 efx->unicast_filter = !(net_dev->flags & IFF_PROMISC); in ef4_farch_filter_sync_rx_mode()