Lines Matching +full:ether +full:- +full:r8a7790
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu
6 * Copyright (C) 2008-2014 Renesas Solutions Corp.
7 * Copyright (C) 2013-2017 Cogent Embedded, Inc.
15 #include <linux/dma-mapping.h>
19 #include <linux/mdio-bitbang.h>
46 [0 ... SH_ETH_MAX_REGISTER_OFFSET - 1] = SH_ETH_OFFSET_INVALID
55 __diag_ignore(GCC, 8, "-Woverride-init",
352 u16 offset = mdp->reg_offset[enum_index]; in sh_eth_write()
357 iowrite32(data, mdp->addr + offset); in sh_eth_write()
363 u16 offset = mdp->reg_offset[enum_index]; in sh_eth_read()
368 return ioread32(mdp->addr + offset); in sh_eth_read()
380 return mdp->reg_offset[enum_index]; in sh_eth_tsu_get_offset()
391 iowrite32(data, mdp->tsu_addr + offset); in sh_eth_tsu_write()
401 return ioread32(mdp->tsu_addr + offset); in sh_eth_tsu_read()
420 switch (mdp->phy_interface) { in sh_eth_select_mii()
447 sh_eth_modify(ndev, ECMR, ECMR_DM, mdp->duplex ? ECMR_DM : 0); in sh_eth_set_duplex()
472 for (cnt = 100; cnt > 0; cnt--) { in sh_eth_check_soft_reset()
479 return -ETIMEDOUT; in sh_eth_check_soft_reset()
505 if (mdp->cd->csmr) in sh_eth_soft_reset_gether()
509 if (mdp->cd->select_mii) in sh_eth_soft_reset_gether()
519 if (WARN_ON(!mdp->cd->gecmr)) in sh_eth_set_rate_gether()
522 switch (mdp->speed) { in sh_eth_set_rate_gether()
636 switch (mdp->speed) { in sh_eth_set_rate_rcar()
646 /* R-Car Gen1 */
677 /* R-Car Gen2 and RZ/G1 */
797 switch (mdp->speed) { in sh_eth_set_rate_sh7724()
841 switch (mdp->speed) { in sh_eth_set_rate_sh7757()
912 if (WARN_ON(!mdp->cd->gecmr)) in sh_eth_set_rate_giga()
915 switch (mdp->speed) { in sh_eth_set_rate_giga()
1098 if (!cd->ecsr_value) in sh_eth_set_default_cpu_data()
1099 cd->ecsr_value = DEFAULT_ECSR_INIT; in sh_eth_set_default_cpu_data()
1101 if (!cd->ecsipr_value) in sh_eth_set_default_cpu_data()
1102 cd->ecsipr_value = DEFAULT_ECSIPR_INIT; in sh_eth_set_default_cpu_data()
1104 if (!cd->fcftr_value) in sh_eth_set_default_cpu_data()
1105 cd->fcftr_value = DEFAULT_FIFO_F_D_RFF | in sh_eth_set_default_cpu_data()
1108 if (!cd->fdr_value) in sh_eth_set_default_cpu_data()
1109 cd->fdr_value = DEFAULT_FDR_INIT; in sh_eth_set_default_cpu_data()
1111 if (!cd->tx_check) in sh_eth_set_default_cpu_data()
1112 cd->tx_check = DEFAULT_TX_CHECK; in sh_eth_set_default_cpu_data()
1114 if (!cd->eesr_err_check) in sh_eth_set_default_cpu_data()
1115 cd->eesr_err_check = DEFAULT_EESR_ERR_CHECK; in sh_eth_set_default_cpu_data()
1117 if (!cd->trscer_err_mask) in sh_eth_set_default_cpu_data()
1118 cd->trscer_err_mask = DEFAULT_TRSCER_ERR_MASK; in sh_eth_set_default_cpu_data()
1123 uintptr_t reserve = (uintptr_t)skb->data & (SH_ETH_RX_ALIGN - 1); in sh_eth_set_receive_align()
1126 skb_reserve(skb, SH_ETH_RX_ALIGN - reserve); in sh_eth_set_receive_align()
1129 /* Program the hardware MAC address from dev->dev_addr. */
1133 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | in update_mac_address()
1134 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); in update_mac_address()
1136 (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR); in update_mac_address()
1142 * This driver get MAC address that use by bootloader(U-boot or sh-ipl+g).
1149 memcpy(ndev->dev_addr, mac, ETH_ALEN); in read_mac_address()
1154 ndev->dev_addr[0] = (mahr >> 24) & 0xFF; in read_mac_address()
1155 ndev->dev_addr[1] = (mahr >> 16) & 0xFF; in read_mac_address()
1156 ndev->dev_addr[2] = (mahr >> 8) & 0xFF; in read_mac_address()
1157 ndev->dev_addr[3] = (mahr >> 0) & 0xFF; in read_mac_address()
1158 ndev->dev_addr[4] = (malr >> 8) & 0xFF; in read_mac_address()
1159 ndev->dev_addr[5] = (malr >> 0) & 0xFF; in read_mac_address()
1174 if (bitbang->set_gate) in sh_mdio_ctrl()
1175 bitbang->set_gate(bitbang->addr); in sh_mdio_ctrl()
1177 pir = ioread32(bitbang->addr); in sh_mdio_ctrl()
1182 iowrite32(pir, bitbang->addr); in sh_mdio_ctrl()
1202 if (bitbang->set_gate) in sh_get_mdio()
1203 bitbang->set_gate(bitbang->addr); in sh_get_mdio()
1205 return (ioread32(bitbang->addr) & PIR_MDI) != 0; in sh_get_mdio()
1232 for (; mdp->cur_tx - mdp->dirty_tx > 0; mdp->dirty_tx++) { in sh_eth_tx_free()
1233 entry = mdp->dirty_tx % mdp->num_tx_ring; in sh_eth_tx_free()
1234 txdesc = &mdp->tx_ring[entry]; in sh_eth_tx_free()
1235 sent = !(txdesc->status & cpu_to_le32(TD_TACT)); in sh_eth_tx_free()
1242 entry, le32_to_cpu(txdesc->status)); in sh_eth_tx_free()
1244 if (mdp->tx_skbuff[entry]) { in sh_eth_tx_free()
1245 dma_unmap_single(&mdp->pdev->dev, in sh_eth_tx_free()
1246 le32_to_cpu(txdesc->addr), in sh_eth_tx_free()
1247 le32_to_cpu(txdesc->len) >> 16, in sh_eth_tx_free()
1249 dev_kfree_skb_irq(mdp->tx_skbuff[entry]); in sh_eth_tx_free()
1250 mdp->tx_skbuff[entry] = NULL; in sh_eth_tx_free()
1253 txdesc->status = cpu_to_le32(TD_TFP); in sh_eth_tx_free()
1254 if (entry >= mdp->num_tx_ring - 1) in sh_eth_tx_free()
1255 txdesc->status |= cpu_to_le32(TD_TDLE); in sh_eth_tx_free()
1258 ndev->stats.tx_packets++; in sh_eth_tx_free()
1259 ndev->stats.tx_bytes += le32_to_cpu(txdesc->len) >> 16; in sh_eth_tx_free()
1271 if (mdp->rx_ring) { in sh_eth_ring_free()
1272 for (i = 0; i < mdp->num_rx_ring; i++) { in sh_eth_ring_free()
1273 if (mdp->rx_skbuff[i]) { in sh_eth_ring_free()
1274 struct sh_eth_rxdesc *rxdesc = &mdp->rx_ring[i]; in sh_eth_ring_free()
1276 dma_unmap_single(&mdp->pdev->dev, in sh_eth_ring_free()
1277 le32_to_cpu(rxdesc->addr), in sh_eth_ring_free()
1278 ALIGN(mdp->rx_buf_sz, 32), in sh_eth_ring_free()
1282 ringsize = sizeof(struct sh_eth_rxdesc) * mdp->num_rx_ring; in sh_eth_ring_free()
1283 dma_free_coherent(&mdp->pdev->dev, ringsize, mdp->rx_ring, in sh_eth_ring_free()
1284 mdp->rx_desc_dma); in sh_eth_ring_free()
1285 mdp->rx_ring = NULL; in sh_eth_ring_free()
1289 if (mdp->rx_skbuff) { in sh_eth_ring_free()
1290 for (i = 0; i < mdp->num_rx_ring; i++) in sh_eth_ring_free()
1291 dev_kfree_skb(mdp->rx_skbuff[i]); in sh_eth_ring_free()
1293 kfree(mdp->rx_skbuff); in sh_eth_ring_free()
1294 mdp->rx_skbuff = NULL; in sh_eth_ring_free()
1296 if (mdp->tx_ring) { in sh_eth_ring_free()
1299 ringsize = sizeof(struct sh_eth_txdesc) * mdp->num_tx_ring; in sh_eth_ring_free()
1300 dma_free_coherent(&mdp->pdev->dev, ringsize, mdp->tx_ring, in sh_eth_ring_free()
1301 mdp->tx_desc_dma); in sh_eth_ring_free()
1302 mdp->tx_ring = NULL; in sh_eth_ring_free()
1306 kfree(mdp->tx_skbuff); in sh_eth_ring_free()
1307 mdp->tx_skbuff = NULL; in sh_eth_ring_free()
1318 int rx_ringsize = sizeof(*rxdesc) * mdp->num_rx_ring; in sh_eth_ring_format()
1319 int tx_ringsize = sizeof(*txdesc) * mdp->num_tx_ring; in sh_eth_ring_format()
1320 int skbuff_size = mdp->rx_buf_sz + SH_ETH_RX_ALIGN + 32 - 1; in sh_eth_ring_format()
1324 mdp->cur_rx = 0; in sh_eth_ring_format()
1325 mdp->cur_tx = 0; in sh_eth_ring_format()
1326 mdp->dirty_rx = 0; in sh_eth_ring_format()
1327 mdp->dirty_tx = 0; in sh_eth_ring_format()
1329 memset(mdp->rx_ring, 0, rx_ringsize); in sh_eth_ring_format()
1332 for (i = 0; i < mdp->num_rx_ring; i++) { in sh_eth_ring_format()
1334 mdp->rx_skbuff[i] = NULL; in sh_eth_ring_format()
1341 buf_len = ALIGN(mdp->rx_buf_sz, 32); in sh_eth_ring_format()
1342 dma_addr = dma_map_single(&mdp->pdev->dev, skb->data, buf_len, in sh_eth_ring_format()
1344 if (dma_mapping_error(&mdp->pdev->dev, dma_addr)) { in sh_eth_ring_format()
1348 mdp->rx_skbuff[i] = skb; in sh_eth_ring_format()
1351 rxdesc = &mdp->rx_ring[i]; in sh_eth_ring_format()
1352 rxdesc->len = cpu_to_le32(buf_len << 16); in sh_eth_ring_format()
1353 rxdesc->addr = cpu_to_le32(dma_addr); in sh_eth_ring_format()
1354 rxdesc->status = cpu_to_le32(RD_RACT | RD_RFP); in sh_eth_ring_format()
1358 sh_eth_write(ndev, mdp->rx_desc_dma, RDLAR); in sh_eth_ring_format()
1359 if (mdp->cd->xdfar_rw) in sh_eth_ring_format()
1360 sh_eth_write(ndev, mdp->rx_desc_dma, RDFAR); in sh_eth_ring_format()
1364 mdp->dirty_rx = (u32) (i - mdp->num_rx_ring); in sh_eth_ring_format()
1368 rxdesc->status |= cpu_to_le32(RD_RDLE); in sh_eth_ring_format()
1370 memset(mdp->tx_ring, 0, tx_ringsize); in sh_eth_ring_format()
1373 for (i = 0; i < mdp->num_tx_ring; i++) { in sh_eth_ring_format()
1374 mdp->tx_skbuff[i] = NULL; in sh_eth_ring_format()
1375 txdesc = &mdp->tx_ring[i]; in sh_eth_ring_format()
1376 txdesc->status = cpu_to_le32(TD_TFP); in sh_eth_ring_format()
1377 txdesc->len = cpu_to_le32(0); in sh_eth_ring_format()
1380 sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR); in sh_eth_ring_format()
1381 if (mdp->cd->xdfar_rw) in sh_eth_ring_format()
1382 sh_eth_write(ndev, mdp->tx_desc_dma, TDFAR); in sh_eth_ring_format()
1386 txdesc->status |= cpu_to_le32(TD_TDLE); in sh_eth_ring_format()
1400 mdp->rx_buf_sz = (ndev->mtu <= 1492 ? PKT_BUF_SZ : in sh_eth_ring_init()
1401 (((ndev->mtu + 26 + 7) & ~7) + 2 + 16)); in sh_eth_ring_init()
1402 if (mdp->cd->rpadir) in sh_eth_ring_init()
1403 mdp->rx_buf_sz += NET_IP_ALIGN; in sh_eth_ring_init()
1406 mdp->rx_skbuff = kcalloc(mdp->num_rx_ring, sizeof(*mdp->rx_skbuff), in sh_eth_ring_init()
1408 if (!mdp->rx_skbuff) in sh_eth_ring_init()
1409 return -ENOMEM; in sh_eth_ring_init()
1411 mdp->tx_skbuff = kcalloc(mdp->num_tx_ring, sizeof(*mdp->tx_skbuff), in sh_eth_ring_init()
1413 if (!mdp->tx_skbuff) in sh_eth_ring_init()
1417 rx_ringsize = sizeof(struct sh_eth_rxdesc) * mdp->num_rx_ring; in sh_eth_ring_init()
1418 mdp->rx_ring = dma_alloc_coherent(&mdp->pdev->dev, rx_ringsize, in sh_eth_ring_init()
1419 &mdp->rx_desc_dma, GFP_KERNEL); in sh_eth_ring_init()
1420 if (!mdp->rx_ring) in sh_eth_ring_init()
1423 mdp->dirty_rx = 0; in sh_eth_ring_init()
1426 tx_ringsize = sizeof(struct sh_eth_txdesc) * mdp->num_tx_ring; in sh_eth_ring_init()
1427 mdp->tx_ring = dma_alloc_coherent(&mdp->pdev->dev, tx_ringsize, in sh_eth_ring_init()
1428 &mdp->tx_desc_dma, GFP_KERNEL); in sh_eth_ring_init()
1429 if (!mdp->tx_ring) in sh_eth_ring_init()
1437 return -ENOMEM; in sh_eth_ring_init()
1446 ret = mdp->cd->soft_reset(ndev); in sh_eth_dev_init()
1450 if (mdp->cd->rmiimode) in sh_eth_dev_init()
1455 if (mdp->cd->rpadir) in sh_eth_dev_init()
1462 if (mdp->cd->hw_swap) in sh_eth_dev_init()
1469 sh_eth_write(ndev, mdp->cd->fdr_value, FDR); in sh_eth_dev_init()
1472 /* Frame recv control (enable multiple-packets per rx irq) */ in sh_eth_dev_init()
1475 sh_eth_write(ndev, mdp->cd->trscer_err_mask, TRSCER); in sh_eth_dev_init()
1478 if (mdp->cd->nbst) in sh_eth_dev_init()
1481 /* Burst cycle count upper-limit */ in sh_eth_dev_init()
1482 if (mdp->cd->bculr) in sh_eth_dev_init()
1485 sh_eth_write(ndev, mdp->cd->fcftr_value, FCFTR); in sh_eth_dev_init()
1487 if (!mdp->cd->no_trimd) in sh_eth_dev_init()
1491 sh_eth_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, in sh_eth_dev_init()
1495 mdp->irq_enabled = true; in sh_eth_dev_init()
1496 sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR); in sh_eth_dev_init()
1499 sh_eth_write(ndev, ECMR_ZPF | (mdp->duplex ? ECMR_DM : 0) | in sh_eth_dev_init()
1500 (ndev->features & NETIF_F_RXCSUM ? ECMR_RCSC : 0) | in sh_eth_dev_init()
1503 if (mdp->cd->set_rate) in sh_eth_dev_init()
1504 mdp->cd->set_rate(ndev); in sh_eth_dev_init()
1506 /* E-MAC Status Register clear */ in sh_eth_dev_init()
1507 sh_eth_write(ndev, mdp->cd->ecsr_value, ECSR); in sh_eth_dev_init()
1509 /* E-MAC Interrupt Enable register */ in sh_eth_dev_init()
1510 sh_eth_write(ndev, mdp->cd->ecsipr_value, ECSIPR); in sh_eth_dev_init()
1516 if (mdp->cd->apr) in sh_eth_dev_init()
1518 if (mdp->cd->mpr) in sh_eth_dev_init()
1520 if (mdp->cd->tpauser) in sh_eth_dev_init()
1537 for (i = 0; i < mdp->num_tx_ring; i++) in sh_eth_dev_exit()
1538 mdp->tx_ring[i].status &= ~cpu_to_le32(TD_TACT); in sh_eth_dev_exit()
1553 mdp->cd->soft_reset(ndev); in sh_eth_dev_exit()
1556 if (mdp->cd->rmiimode) in sh_eth_dev_exit()
1568 if (unlikely(skb->len < sizeof(__sum16))) in sh_eth_rx_csum()
1570 hw_csum = skb_tail_pointer(skb) - sizeof(__sum16); in sh_eth_rx_csum()
1571 skb->csum = csum_unfold((__force __sum16)get_unaligned_le16(hw_csum)); in sh_eth_rx_csum()
1572 skb->ip_summed = CHECKSUM_COMPLETE; in sh_eth_rx_csum()
1573 skb_trim(skb, skb->len - sizeof(__sum16)); in sh_eth_rx_csum()
1582 int entry = mdp->cur_rx % mdp->num_rx_ring; in sh_eth_rx()
1583 int boguscnt = (mdp->dirty_rx + mdp->num_rx_ring) - mdp->cur_rx; in sh_eth_rx()
1587 int skbuff_size = mdp->rx_buf_sz + SH_ETH_RX_ALIGN + 32 - 1; in sh_eth_rx()
1594 rxdesc = &mdp->rx_ring[entry]; in sh_eth_rx()
1595 while (!(rxdesc->status & cpu_to_le32(RD_RACT))) { in sh_eth_rx()
1598 desc_status = le32_to_cpu(rxdesc->status); in sh_eth_rx()
1599 pkt_len = le32_to_cpu(rxdesc->len) & RD_RFL; in sh_eth_rx()
1601 if (--boguscnt < 0) in sh_eth_rx()
1609 ndev->stats.rx_length_errors++; in sh_eth_rx()
1617 if (mdp->cd->csmr) in sh_eth_rx()
1620 skb = mdp->rx_skbuff[entry]; in sh_eth_rx()
1623 ndev->stats.rx_errors++; in sh_eth_rx()
1625 ndev->stats.rx_crc_errors++; in sh_eth_rx()
1627 ndev->stats.rx_frame_errors++; in sh_eth_rx()
1629 ndev->stats.rx_length_errors++; in sh_eth_rx()
1631 ndev->stats.rx_length_errors++; in sh_eth_rx()
1633 ndev->stats.rx_missed_errors++; in sh_eth_rx()
1635 ndev->stats.rx_over_errors++; in sh_eth_rx()
1637 dma_addr = le32_to_cpu(rxdesc->addr); in sh_eth_rx()
1638 if (!mdp->cd->hw_swap) in sh_eth_rx()
1642 mdp->rx_skbuff[entry] = NULL; in sh_eth_rx()
1643 if (mdp->cd->rpadir) in sh_eth_rx()
1645 dma_unmap_single(&mdp->pdev->dev, dma_addr, in sh_eth_rx()
1646 ALIGN(mdp->rx_buf_sz, 32), in sh_eth_rx()
1649 skb->protocol = eth_type_trans(skb, ndev); in sh_eth_rx()
1650 if (ndev->features & NETIF_F_RXCSUM) in sh_eth_rx()
1653 ndev->stats.rx_packets++; in sh_eth_rx()
1654 ndev->stats.rx_bytes += pkt_len; in sh_eth_rx()
1656 ndev->stats.multicast++; in sh_eth_rx()
1658 entry = (++mdp->cur_rx) % mdp->num_rx_ring; in sh_eth_rx()
1659 rxdesc = &mdp->rx_ring[entry]; in sh_eth_rx()
1663 for (; mdp->cur_rx - mdp->dirty_rx > 0; mdp->dirty_rx++) { in sh_eth_rx()
1664 entry = mdp->dirty_rx % mdp->num_rx_ring; in sh_eth_rx()
1665 rxdesc = &mdp->rx_ring[entry]; in sh_eth_rx()
1667 buf_len = ALIGN(mdp->rx_buf_sz, 32); in sh_eth_rx()
1668 rxdesc->len = cpu_to_le32(buf_len << 16); in sh_eth_rx()
1670 if (mdp->rx_skbuff[entry] == NULL) { in sh_eth_rx()
1675 dma_addr = dma_map_single(&mdp->pdev->dev, skb->data, in sh_eth_rx()
1677 if (dma_mapping_error(&mdp->pdev->dev, dma_addr)) { in sh_eth_rx()
1681 mdp->rx_skbuff[entry] = skb; in sh_eth_rx()
1684 rxdesc->addr = cpu_to_le32(dma_addr); in sh_eth_rx()
1687 if (entry >= mdp->num_rx_ring - 1) in sh_eth_rx()
1688 rxdesc->status |= in sh_eth_rx()
1691 rxdesc->status |= cpu_to_le32(RD_RACT | RD_RFP); in sh_eth_rx()
1695 /* If we don't need to check status, don't. -KDU */ in sh_eth_rx()
1698 if (intr_status & EESR_RDE && !mdp->cd->no_xdfar) { in sh_eth_rx()
1699 u32 count = (sh_eth_read(ndev, RDFAR) - in sh_eth_rx()
1702 mdp->cur_rx = count; in sh_eth_rx()
1703 mdp->dirty_rx = count; in sh_eth_rx()
1708 *quota -= limit - boguscnt - 1; in sh_eth_rx()
1725 /* E-MAC interrupt handler */
1735 ndev->stats.tx_carrier_errors++; in sh_eth_emac_interrupt()
1737 pm_wakeup_event(&mdp->pdev->dev, 0); in sh_eth_emac_interrupt()
1740 if (mdp->cd->no_psr || mdp->no_ether_link) in sh_eth_emac_interrupt()
1743 if (mdp->ether_link_active_low) in sh_eth_emac_interrupt()
1768 ndev->stats.tx_aborted_errors++; in sh_eth_error()
1777 ndev->stats.rx_frame_errors++; in sh_eth_error()
1783 ndev->stats.tx_fifo_errors++; in sh_eth_error()
1789 ndev->stats.tx_fifo_errors++; in sh_eth_error()
1795 ndev->stats.rx_over_errors++; in sh_eth_error()
1800 ndev->stats.rx_fifo_errors++; in sh_eth_error()
1803 if (!mdp->cd->no_ade && (intr_status & EESR_ADE)) { in sh_eth_error()
1805 ndev->stats.tx_fifo_errors++; in sh_eth_error()
1810 if (mdp->cd->no_ade) in sh_eth_error()
1818 intr_status, mdp->cur_tx, mdp->dirty_tx, in sh_eth_error()
1819 (u32)ndev->state, edtrr); in sh_eth_error()
1824 if (edtrr ^ mdp->cd->edtrr_trns) { in sh_eth_error()
1826 sh_eth_write(ndev, mdp->cd->edtrr_trns, EDTRR); in sh_eth_error()
1837 struct sh_eth_cpu_data *cd = mdp->cd; in sh_eth_interrupt()
1841 spin_lock(&mdp->lock); in sh_eth_interrupt()
1853 if (intr_status & (EESR_RX_CHECK | cd->tx_check | EESR_ECI | in sh_eth_interrupt()
1854 cd->eesr_err_check)) in sh_eth_interrupt()
1859 if (unlikely(!mdp->irq_enabled)) { in sh_eth_interrupt()
1865 if (napi_schedule_prep(&mdp->napi)) { in sh_eth_interrupt()
1869 __napi_schedule(&mdp->napi); in sh_eth_interrupt()
1878 if (intr_status & cd->tx_check) { in sh_eth_interrupt()
1880 sh_eth_write(ndev, intr_status & cd->tx_check, EESR); in sh_eth_interrupt()
1886 /* E-MAC interrupt */ in sh_eth_interrupt()
1890 if (intr_status & cd->eesr_err_check) { in sh_eth_interrupt()
1892 sh_eth_write(ndev, intr_status & cd->eesr_err_check, EESR); in sh_eth_interrupt()
1898 spin_unlock(&mdp->lock); in sh_eth_interrupt()
1907 struct net_device *ndev = napi->dev; in sh_eth_poll()
1925 if (mdp->irq_enabled) in sh_eth_poll()
1926 sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR); in sh_eth_poll()
1928 return budget - quota; in sh_eth_poll()
1935 struct phy_device *phydev = ndev->phydev; in sh_eth_adjust_link()
1939 spin_lock_irqsave(&mdp->lock, flags); in sh_eth_adjust_link()
1941 /* Disable TX and RX right over here, if E-MAC change is ignored */ in sh_eth_adjust_link()
1942 if (mdp->cd->no_psr || mdp->no_ether_link) in sh_eth_adjust_link()
1945 if (phydev->link) { in sh_eth_adjust_link()
1946 if (phydev->duplex != mdp->duplex) { in sh_eth_adjust_link()
1948 mdp->duplex = phydev->duplex; in sh_eth_adjust_link()
1949 if (mdp->cd->set_duplex) in sh_eth_adjust_link()
1950 mdp->cd->set_duplex(ndev); in sh_eth_adjust_link()
1953 if (phydev->speed != mdp->speed) { in sh_eth_adjust_link()
1955 mdp->speed = phydev->speed; in sh_eth_adjust_link()
1956 if (mdp->cd->set_rate) in sh_eth_adjust_link()
1957 mdp->cd->set_rate(ndev); in sh_eth_adjust_link()
1959 if (!mdp->link) { in sh_eth_adjust_link()
1962 mdp->link = phydev->link; in sh_eth_adjust_link()
1964 } else if (mdp->link) { in sh_eth_adjust_link()
1966 mdp->link = 0; in sh_eth_adjust_link()
1967 mdp->speed = 0; in sh_eth_adjust_link()
1968 mdp->duplex = -1; in sh_eth_adjust_link()
1971 /* Enable TX and RX right over here, if E-MAC change is ignored */ in sh_eth_adjust_link()
1972 if ((mdp->cd->no_psr || mdp->no_ether_link) && phydev->link) in sh_eth_adjust_link()
1975 spin_unlock_irqrestore(&mdp->lock, flags); in sh_eth_adjust_link()
1984 struct device_node *np = ndev->dev.parent->of_node; in sh_eth_phy_init()
1988 mdp->link = 0; in sh_eth_phy_init()
1989 mdp->speed = 0; in sh_eth_phy_init()
1990 mdp->duplex = -1; in sh_eth_phy_init()
1996 pn = of_parse_phandle(np, "phy-handle", 0); in sh_eth_phy_init()
1999 mdp->phy_interface); in sh_eth_phy_init()
2003 phydev = ERR_PTR(-ENOENT); in sh_eth_phy_init()
2008 mdp->mii_bus->id, mdp->phy_id); in sh_eth_phy_init()
2011 mdp->phy_interface); in sh_eth_phy_init()
2020 if (mdp->cd->register_type != SH_ETH_REG_GIGABIT) { in sh_eth_phy_init()
2043 phy_start(ndev->phydev); in sh_eth_phy_start()
2059 struct sh_eth_cpu_data *cd = mdp->cd; in __sh_eth_get_regs()
2083 if (mdp->reg_offset[reg] != SH_ETH_OFFSET_INVALID) { \ in __sh_eth_get_regs()
2101 if (!cd->no_xdfar) in __sh_eth_get_regs()
2106 if (!cd->no_xdfar) in __sh_eth_get_regs()
2117 if (cd->rmiimode) in __sh_eth_get_regs()
2120 if (cd->rpadir) in __sh_eth_get_regs()
2122 if (!cd->no_trimd) in __sh_eth_get_regs()
2128 if (!cd->no_psr) in __sh_eth_get_regs()
2133 if (cd->apr) in __sh_eth_get_regs()
2135 if (cd->mpr) in __sh_eth_get_regs()
2139 if (cd->tpauser) in __sh_eth_get_regs()
2142 if (cd->gecmr) in __sh_eth_get_regs()
2144 if (cd->bculr) in __sh_eth_get_regs()
2148 if (!cd->no_tx_cntrs) { in __sh_eth_get_regs()
2158 if (cd->cexcr) { in __sh_eth_get_regs()
2163 if (cd->rtrate) in __sh_eth_get_regs()
2165 if (cd->csmr) in __sh_eth_get_regs()
2167 if (cd->select_mii) in __sh_eth_get_regs()
2169 if (cd->tsu) { in __sh_eth_get_regs()
2172 if (cd->dual_port) { in __sh_eth_get_regs()
2184 if (cd->dual_port) { in __sh_eth_get_regs()
2206 *buf++ = ioread32(mdp->tsu_addr + in __sh_eth_get_regs()
2207 mdp->reg_offset[TSU_ADRH0] + in __sh_eth_get_regs()
2231 regs->version = SH_ETH_REG_DUMP_VERSION; in sh_eth_get_regs()
2233 pm_runtime_get_sync(&mdp->pdev->dev); in sh_eth_get_regs()
2235 pm_runtime_put_sync(&mdp->pdev->dev); in sh_eth_get_regs()
2241 return mdp->msg_enable; in sh_eth_get_msglevel()
2247 mdp->msg_enable = value; in sh_eth_set_msglevel()
2262 return -EOPNOTSUPP; in sh_eth_get_sset_count()
2272 /* device-specific stats */ in sh_eth_get_ethtool_stats()
2273 data[i++] = mdp->cur_rx; in sh_eth_get_ethtool_stats()
2274 data[i++] = mdp->cur_tx; in sh_eth_get_ethtool_stats()
2275 data[i++] = mdp->dirty_rx; in sh_eth_get_ethtool_stats()
2276 data[i++] = mdp->dirty_tx; in sh_eth_get_ethtool_stats()
2294 ring->rx_max_pending = RX_RING_MAX; in sh_eth_get_ringparam()
2295 ring->tx_max_pending = TX_RING_MAX; in sh_eth_get_ringparam()
2296 ring->rx_pending = mdp->num_rx_ring; in sh_eth_get_ringparam()
2297 ring->tx_pending = mdp->num_tx_ring; in sh_eth_get_ringparam()
2306 if (ring->tx_pending > TX_RING_MAX || in sh_eth_set_ringparam()
2307 ring->rx_pending > RX_RING_MAX || in sh_eth_set_ringparam()
2308 ring->tx_pending < TX_RING_MIN || in sh_eth_set_ringparam()
2309 ring->rx_pending < RX_RING_MIN) in sh_eth_set_ringparam()
2310 return -EINVAL; in sh_eth_set_ringparam()
2311 if (ring->rx_mini_pending || ring->rx_jumbo_pending) in sh_eth_set_ringparam()
2312 return -EINVAL; in sh_eth_set_ringparam()
2321 * won't be re-enabled. in sh_eth_set_ringparam()
2323 mdp->irq_enabled = false; in sh_eth_set_ringparam()
2324 synchronize_irq(ndev->irq); in sh_eth_set_ringparam()
2325 napi_synchronize(&mdp->napi); in sh_eth_set_ringparam()
2335 mdp->num_rx_ring = ring->rx_pending; in sh_eth_set_ringparam()
2336 mdp->num_tx_ring = ring->tx_pending; in sh_eth_set_ringparam()
2362 wol->supported = 0; in sh_eth_get_wol()
2363 wol->wolopts = 0; in sh_eth_get_wol()
2365 if (mdp->cd->magic) { in sh_eth_get_wol()
2366 wol->supported = WAKE_MAGIC; in sh_eth_get_wol()
2367 wol->wolopts = mdp->wol_enabled ? WAKE_MAGIC : 0; in sh_eth_get_wol()
2375 if (!mdp->cd->magic || wol->wolopts & ~WAKE_MAGIC) in sh_eth_set_wol()
2376 return -EOPNOTSUPP; in sh_eth_set_wol()
2378 mdp->wol_enabled = !!(wol->wolopts & WAKE_MAGIC); in sh_eth_set_wol()
2380 device_set_wakeup_enable(&mdp->pdev->dev, mdp->wol_enabled); in sh_eth_set_wol()
2409 pm_runtime_get_sync(&mdp->pdev->dev); in sh_eth_open()
2411 napi_enable(&mdp->napi); in sh_eth_open()
2413 ret = request_irq(ndev->irq, sh_eth_interrupt, in sh_eth_open()
2414 mdp->cd->irq_flags, ndev->name, ndev); in sh_eth_open()
2437 mdp->is_opened = 1; in sh_eth_open()
2442 free_irq(ndev->irq, ndev); in sh_eth_open()
2444 napi_disable(&mdp->napi); in sh_eth_open()
2445 pm_runtime_put_sync(&mdp->pdev->dev); in sh_eth_open()
2463 ndev->stats.tx_errors++; in sh_eth_tx_timeout()
2466 for (i = 0; i < mdp->num_rx_ring; i++) { in sh_eth_tx_timeout()
2467 rxdesc = &mdp->rx_ring[i]; in sh_eth_tx_timeout()
2468 rxdesc->status = cpu_to_le32(0); in sh_eth_tx_timeout()
2469 rxdesc->addr = cpu_to_le32(0xBADF00D0); in sh_eth_tx_timeout()
2470 dev_kfree_skb(mdp->rx_skbuff[i]); in sh_eth_tx_timeout()
2471 mdp->rx_skbuff[i] = NULL; in sh_eth_tx_timeout()
2473 for (i = 0; i < mdp->num_tx_ring; i++) { in sh_eth_tx_timeout()
2474 dev_kfree_skb(mdp->tx_skbuff[i]); in sh_eth_tx_timeout()
2475 mdp->tx_skbuff[i] = NULL; in sh_eth_tx_timeout()
2494 spin_lock_irqsave(&mdp->lock, flags); in sh_eth_start_xmit()
2495 if ((mdp->cur_tx - mdp->dirty_tx) >= (mdp->num_tx_ring - 4)) { in sh_eth_start_xmit()
2499 spin_unlock_irqrestore(&mdp->lock, flags); in sh_eth_start_xmit()
2503 spin_unlock_irqrestore(&mdp->lock, flags); in sh_eth_start_xmit()
2508 entry = mdp->cur_tx % mdp->num_tx_ring; in sh_eth_start_xmit()
2509 mdp->tx_skbuff[entry] = skb; in sh_eth_start_xmit()
2510 txdesc = &mdp->tx_ring[entry]; in sh_eth_start_xmit()
2512 if (!mdp->cd->hw_swap) in sh_eth_start_xmit()
2513 sh_eth_soft_swap(PTR_ALIGN(skb->data, 4), skb->len + 2); in sh_eth_start_xmit()
2514 dma_addr = dma_map_single(&mdp->pdev->dev, skb->data, skb->len, in sh_eth_start_xmit()
2516 if (dma_mapping_error(&mdp->pdev->dev, dma_addr)) { in sh_eth_start_xmit()
2520 txdesc->addr = cpu_to_le32(dma_addr); in sh_eth_start_xmit()
2521 txdesc->len = cpu_to_le32(skb->len << 16); in sh_eth_start_xmit()
2524 if (entry >= mdp->num_tx_ring - 1) in sh_eth_start_xmit()
2525 txdesc->status |= cpu_to_le32(TD_TACT | TD_TDLE); in sh_eth_start_xmit()
2527 txdesc->status |= cpu_to_le32(TD_TACT); in sh_eth_start_xmit()
2529 mdp->cur_tx++; in sh_eth_start_xmit()
2531 if (!(sh_eth_read(ndev, EDTRR) & mdp->cd->edtrr_trns)) in sh_eth_start_xmit()
2532 sh_eth_write(ndev, mdp->cd->edtrr_trns, EDTRR); in sh_eth_start_xmit()
2537 /* The statistics registers have write-clear behaviour, which means we
2539 * this by only clearing when we read a non-zero value, so we will
2557 if (mdp->cd->no_tx_cntrs) in sh_eth_get_stats()
2558 return &ndev->stats; in sh_eth_get_stats()
2560 if (!mdp->is_opened) in sh_eth_get_stats()
2561 return &ndev->stats; in sh_eth_get_stats()
2563 sh_eth_update_stat(ndev, &ndev->stats.tx_dropped, TROCR); in sh_eth_get_stats()
2564 sh_eth_update_stat(ndev, &ndev->stats.collisions, CDCR); in sh_eth_get_stats()
2565 sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, LCCR); in sh_eth_get_stats()
2567 if (mdp->cd->cexcr) { in sh_eth_get_stats()
2568 sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, in sh_eth_get_stats()
2570 sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, in sh_eth_get_stats()
2573 sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, in sh_eth_get_stats()
2577 return &ndev->stats; in sh_eth_get_stats()
2589 * ensure that interrupts won't be re-enabled. in sh_eth_close()
2591 mdp->irq_enabled = false; in sh_eth_close()
2592 synchronize_irq(ndev->irq); in sh_eth_close()
2593 napi_disable(&mdp->napi); in sh_eth_close()
2599 if (ndev->phydev) { in sh_eth_close()
2600 phy_stop(ndev->phydev); in sh_eth_close()
2601 phy_disconnect(ndev->phydev); in sh_eth_close()
2604 free_irq(ndev->irq, ndev); in sh_eth_close()
2609 pm_runtime_put_sync(&mdp->pdev->dev); in sh_eth_close()
2611 mdp->is_opened = 0; in sh_eth_close()
2619 return -EBUSY; in sh_eth_change_mtu()
2621 ndev->mtu = new_mtu; in sh_eth_change_mtu()
2630 return 0x0f << (28 - ((entry % 8) * 4)); in sh_eth_tsu_get_post_mask()
2635 return (0x08 >> (mdp->port << 1)) << (28 - ((entry % 8) * 4)); in sh_eth_tsu_get_post_bit()
2673 timeout--; in sh_eth_tsu_busy()
2676 return -ETIMEDOUT; in sh_eth_tsu_busy()
2690 iowrite32(val, mdp->tsu_addr + offset); in sh_eth_tsu_write_entry()
2692 return -EBUSY; in sh_eth_tsu_write_entry()
2695 iowrite32(val, mdp->tsu_addr + offset + 4); in sh_eth_tsu_write_entry()
2697 return -EBUSY; in sh_eth_tsu_write_entry()
2707 val = ioread32(mdp->tsu_addr + offset); in sh_eth_tsu_read_entry()
2712 val = ioread32(mdp->tsu_addr + offset + 4); in sh_eth_tsu_read_entry()
2731 return -ENOENT; in sh_eth_tsu_find_entry()
2741 return (entry < 0) ? -ENOMEM : entry; in sh_eth_tsu_find_empty()
2753 ~(1 << (31 - entry)), TSU_TEN); in sh_eth_tsu_disable_cam_entry_table()
2768 if (!mdp->cd->tsu) in sh_eth_tsu_add_entry()
2776 return -ENOMEM; in sh_eth_tsu_add_entry()
2783 (1 << (31 - i)), TSU_TEN); in sh_eth_tsu_add_entry()
2797 if (!mdp->cd->tsu) in sh_eth_tsu_del_entry()
2820 if (!mdp->cd->tsu) in sh_eth_tsu_purge_all()
2843 if (!mdp->cd->tsu) in sh_eth_tsu_purge_mcast()
2861 spin_lock_irqsave(&mdp->lock, flags); in sh_eth_set_rx_mode()
2863 * Depending on ndev->flags, set PRM or clear MCT in sh_eth_set_rx_mode()
2866 if (mdp->cd->tsu) in sh_eth_set_rx_mode()
2869 if (!(ndev->flags & IFF_MULTICAST)) { in sh_eth_set_rx_mode()
2873 if (ndev->flags & IFF_ALLMULTI) { in sh_eth_set_rx_mode()
2879 if (ndev->flags & IFF_PROMISC) { in sh_eth_set_rx_mode()
2882 } else if (mdp->cd->tsu) { in sh_eth_set_rx_mode()
2885 if (mcast_all && is_multicast_ether_addr(ha->addr)) in sh_eth_set_rx_mode()
2888 if (sh_eth_tsu_add_entry(ndev, ha->addr) < 0) { in sh_eth_set_rx_mode()
2901 spin_unlock_irqrestore(&mdp->lock, flags); in sh_eth_set_rx_mode()
2909 spin_lock_irqsave(&mdp->lock, flags); in sh_eth_set_rx_csum()
2920 spin_unlock_irqrestore(&mdp->lock, flags); in sh_eth_set_rx_csum()
2926 netdev_features_t changed = ndev->features ^ features; in sh_eth_set_features()
2929 if (changed & NETIF_F_RXCSUM && mdp->cd->rx_csum) in sh_eth_set_features()
2932 ndev->features = features; in sh_eth_set_features()
2939 if (!mdp->port) in sh_eth_get_vtag_index()
2951 if (unlikely(!mdp->cd->tsu)) in sh_eth_vlan_rx_add_vid()
2952 return -EPERM; in sh_eth_vlan_rx_add_vid()
2958 mdp->vlan_num_ids++; in sh_eth_vlan_rx_add_vid()
2963 if (mdp->vlan_num_ids > 1) { in sh_eth_vlan_rx_add_vid()
2981 if (unlikely(!mdp->cd->tsu)) in sh_eth_vlan_rx_kill_vid()
2982 return -EPERM; in sh_eth_vlan_rx_kill_vid()
2988 mdp->vlan_num_ids--; in sh_eth_vlan_rx_kill_vid()
2997 if (!mdp->cd->dual_port) { in sh_eth_tsu_init()
3004 sh_eth_tsu_write(mdp, 0, TSU_FWEN0); /* Disable forward(0->1) */ in sh_eth_tsu_init()
3005 sh_eth_tsu_write(mdp, 0, TSU_FWEN1); /* Disable forward(1->0) */ in sh_eth_tsu_init()
3006 sh_eth_tsu_write(mdp, 0, TSU_FCM); /* forward fifo 3k-3k */ in sh_eth_tsu_init()
3014 sh_eth_tsu_write(mdp, 0, TSU_QTAGM0); /* Disable QTAG(0->1) */ in sh_eth_tsu_init()
3015 sh_eth_tsu_write(mdp, 0, TSU_QTAGM1); /* Disable QTAG(1->0) */ in sh_eth_tsu_init()
3019 sh_eth_tsu_write(mdp, 0, TSU_POST1); /* Disable CAM entry [ 0- 7] */ in sh_eth_tsu_init()
3020 sh_eth_tsu_write(mdp, 0, TSU_POST2); /* Disable CAM entry [ 8-15] */ in sh_eth_tsu_init()
3021 sh_eth_tsu_write(mdp, 0, TSU_POST3); /* Disable CAM entry [16-23] */ in sh_eth_tsu_init()
3022 sh_eth_tsu_write(mdp, 0, TSU_POST4); /* Disable CAM entry [24-31] */ in sh_eth_tsu_init()
3029 mdiobus_unregister(mdp->mii_bus); in sh_mdio_release()
3032 free_mdio_bitbang(mdp->mii_bus); in sh_mdio_release()
3043 struct platform_device *pdev = mdp->pdev; in sh_mdio_init()
3044 struct device *dev = &mdp->pdev->dev; in sh_mdio_init()
3049 return -ENOMEM; in sh_mdio_init()
3052 bitbang->addr = mdp->addr + mdp->reg_offset[PIR]; in sh_mdio_init()
3053 bitbang->set_gate = pd->set_mdio_gate; in sh_mdio_init()
3054 bitbang->ctrl.ops = &bb_ops; in sh_mdio_init()
3057 mdp->mii_bus = alloc_mdio_bitbang(&bitbang->ctrl); in sh_mdio_init()
3058 if (!mdp->mii_bus) in sh_mdio_init()
3059 return -ENOMEM; in sh_mdio_init()
3062 mdp->mii_bus->name = "sh_mii"; in sh_mdio_init()
3063 mdp->mii_bus->parent = dev; in sh_mdio_init()
3064 snprintf(mdp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in sh_mdio_init()
3065 pdev->name, pdev->id); in sh_mdio_init()
3068 if (pd->phy_irq > 0) in sh_mdio_init()
3069 mdp->mii_bus->irq[pd->phy] = pd->phy_irq; in sh_mdio_init()
3071 ret = of_mdiobus_register(mdp->mii_bus, dev->of_node); in sh_mdio_init()
3078 free_mdio_bitbang(mdp->mii_bus); in sh_mdio_init()
3137 struct device_node *np = dev->of_node; in sh_eth_parse_dt()
3150 pdata->phy_interface = interface; in sh_eth_parse_dt()
3154 ether_addr_copy(pdata->mac_addr, mac_addr); in sh_eth_parse_dt()
3156 pdata->no_ether_link = in sh_eth_parse_dt()
3157 of_property_read_bool(np, "renesas,no-ether-link"); in sh_eth_parse_dt()
3158 pdata->ether_link_active_low = in sh_eth_parse_dt()
3159 of_property_read_bool(np, "renesas,ether-link-active-low"); in sh_eth_parse_dt()
3165 { .compatible = "renesas,gether-r8a7740", .data = &r8a7740_data },
3166 { .compatible = "renesas,ether-r8a7743", .data = &rcar_gen2_data },
3167 { .compatible = "renesas,ether-r8a7745", .data = &rcar_gen2_data },
3168 { .compatible = "renesas,ether-r8a7778", .data = &rcar_gen1_data },
3169 { .compatible = "renesas,ether-r8a7779", .data = &rcar_gen1_data },
3170 { .compatible = "renesas,ether-r8a7790", .data = &rcar_gen2_data },
3171 { .compatible = "renesas,ether-r8a7791", .data = &rcar_gen2_data },
3172 { .compatible = "renesas,ether-r8a7793", .data = &rcar_gen2_data },
3173 { .compatible = "renesas,ether-r8a7794", .data = &rcar_gen2_data },
3174 { .compatible = "renesas,gether-r8a77980", .data = &r8a77980_data },
3175 { .compatible = "renesas,ether-r7s72100", .data = &r7s72100_data },
3176 { .compatible = "renesas,ether-r7s9210", .data = &r7s9210_data },
3177 { .compatible = "renesas,rcar-gen1-ether", .data = &rcar_gen1_data },
3178 { .compatible = "renesas,rcar-gen2-ether", .data = &rcar_gen2_data },
3192 struct sh_eth_plat_data *pd = dev_get_platdata(&pdev->dev); in sh_eth_drv_probe()
3203 return -ENOMEM; in sh_eth_drv_probe()
3205 pm_runtime_enable(&pdev->dev); in sh_eth_drv_probe()
3206 pm_runtime_get_sync(&pdev->dev); in sh_eth_drv_probe()
3211 ndev->irq = ret; in sh_eth_drv_probe()
3213 SET_NETDEV_DEV(ndev, &pdev->dev); in sh_eth_drv_probe()
3216 mdp->num_tx_ring = TX_RING_SIZE; in sh_eth_drv_probe()
3217 mdp->num_rx_ring = RX_RING_SIZE; in sh_eth_drv_probe()
3218 mdp->addr = devm_ioremap_resource(&pdev->dev, res); in sh_eth_drv_probe()
3219 if (IS_ERR(mdp->addr)) { in sh_eth_drv_probe()
3220 ret = PTR_ERR(mdp->addr); in sh_eth_drv_probe()
3224 ndev->base_addr = res->start; in sh_eth_drv_probe()
3226 spin_lock_init(&mdp->lock); in sh_eth_drv_probe()
3227 mdp->pdev = pdev; in sh_eth_drv_probe()
3229 if (pdev->dev.of_node) in sh_eth_drv_probe()
3230 pd = sh_eth_parse_dt(&pdev->dev); in sh_eth_drv_probe()
3232 dev_err(&pdev->dev, "no platform data\n"); in sh_eth_drv_probe()
3233 ret = -EINVAL; in sh_eth_drv_probe()
3238 mdp->phy_id = pd->phy; in sh_eth_drv_probe()
3239 mdp->phy_interface = pd->phy_interface; in sh_eth_drv_probe()
3240 mdp->no_ether_link = pd->no_ether_link; in sh_eth_drv_probe()
3241 mdp->ether_link_active_low = pd->ether_link_active_low; in sh_eth_drv_probe()
3245 mdp->cd = (struct sh_eth_cpu_data *)id->driver_data; in sh_eth_drv_probe()
3247 mdp->cd = (struct sh_eth_cpu_data *)of_device_get_match_data(&pdev->dev); in sh_eth_drv_probe()
3249 mdp->reg_offset = sh_eth_get_register_offset(mdp->cd->register_type); in sh_eth_drv_probe()
3250 if (!mdp->reg_offset) { in sh_eth_drv_probe()
3251 dev_err(&pdev->dev, "Unknown register type (%d)\n", in sh_eth_drv_probe()
3252 mdp->cd->register_type); in sh_eth_drv_probe()
3253 ret = -EINVAL; in sh_eth_drv_probe()
3256 sh_eth_set_default_cpu_data(mdp->cd); in sh_eth_drv_probe()
3262 ndev->max_mtu = 2000 - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); in sh_eth_drv_probe()
3263 ndev->min_mtu = ETH_MIN_MTU; in sh_eth_drv_probe()
3265 if (mdp->cd->rx_csum) { in sh_eth_drv_probe()
3266 ndev->features = NETIF_F_RXCSUM; in sh_eth_drv_probe()
3267 ndev->hw_features = NETIF_F_RXCSUM; in sh_eth_drv_probe()
3271 if (mdp->cd->tsu) in sh_eth_drv_probe()
3272 ndev->netdev_ops = &sh_eth_netdev_ops_tsu; in sh_eth_drv_probe()
3274 ndev->netdev_ops = &sh_eth_netdev_ops; in sh_eth_drv_probe()
3275 ndev->ethtool_ops = &sh_eth_ethtool_ops; in sh_eth_drv_probe()
3276 ndev->watchdog_timeo = TX_TIMEOUT; in sh_eth_drv_probe()
3279 mdp->msg_enable = SH_ETH_DEF_MSG_ENABLE; in sh_eth_drv_probe()
3282 read_mac_address(ndev, pd->mac_addr); in sh_eth_drv_probe()
3283 if (!is_valid_ether_addr(ndev->dev_addr)) { in sh_eth_drv_probe()
3284 dev_warn(&pdev->dev, in sh_eth_drv_probe()
3289 if (mdp->cd->tsu) { in sh_eth_drv_probe()
3290 int port = pdev->id < 0 ? 0 : pdev->id % 2; in sh_eth_drv_probe()
3295 dev_err(&pdev->dev, "no TSU resource\n"); in sh_eth_drv_probe()
3296 ret = -ENODEV; in sh_eth_drv_probe()
3303 !devm_request_mem_region(&pdev->dev, rtsu->start, in sh_eth_drv_probe()
3305 dev_name(&pdev->dev))) { in sh_eth_drv_probe()
3306 dev_err(&pdev->dev, "can't request TSU resource.\n"); in sh_eth_drv_probe()
3307 ret = -EBUSY; in sh_eth_drv_probe()
3311 mdp->tsu_addr = devm_ioremap(&pdev->dev, rtsu->start, in sh_eth_drv_probe()
3313 if (!mdp->tsu_addr) { in sh_eth_drv_probe()
3314 dev_err(&pdev->dev, "TSU region ioremap() failed.\n"); in sh_eth_drv_probe()
3315 ret = -ENOMEM; in sh_eth_drv_probe()
3318 mdp->port = port; in sh_eth_drv_probe()
3319 ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; in sh_eth_drv_probe()
3323 if (mdp->cd->chip_reset) in sh_eth_drv_probe()
3324 mdp->cd->chip_reset(ndev); in sh_eth_drv_probe()
3331 if (mdp->cd->rmiimode) in sh_eth_drv_probe()
3337 if (ret != -EPROBE_DEFER) in sh_eth_drv_probe()
3338 dev_err(&pdev->dev, "MDIO init failed: %d\n", ret); in sh_eth_drv_probe()
3342 netif_napi_add(ndev, &mdp->napi, sh_eth_poll, 64); in sh_eth_drv_probe()
3349 if (mdp->cd->magic) in sh_eth_drv_probe()
3350 device_set_wakeup_capable(&pdev->dev, 1); in sh_eth_drv_probe()
3354 (u32)ndev->base_addr, ndev->dev_addr, ndev->irq); in sh_eth_drv_probe()
3356 pm_runtime_put(&pdev->dev); in sh_eth_drv_probe()
3362 netif_napi_del(&mdp->napi); in sh_eth_drv_probe()
3369 pm_runtime_put(&pdev->dev); in sh_eth_drv_probe()
3370 pm_runtime_disable(&pdev->dev); in sh_eth_drv_probe()
3380 netif_napi_del(&mdp->napi); in sh_eth_drv_remove()
3382 pm_runtime_disable(&pdev->dev); in sh_eth_drv_remove()
3395 synchronize_irq(ndev->irq); in sh_eth_wol_setup()
3396 napi_disable(&mdp->napi); in sh_eth_wol_setup()
3402 return enable_irq_wake(ndev->irq); in sh_eth_wol_setup()
3410 napi_enable(&mdp->napi); in sh_eth_wol_restore()
3427 return disable_irq_wake(ndev->irq); in sh_eth_wol_restore()
3441 if (mdp->wol_enabled) in sh_eth_suspend()
3458 if (mdp->wol_enabled) in sh_eth_resume()
3474 /* Runtime PM callback shared between ->runtime_suspend() in sh_eth_runtime_nop()
3475 * and ->runtime_resume(). Simply returns success. in sh_eth_runtime_nop()
3477 * This driver re-initializes all registers after in sh_eth_runtime_nop()
3494 { "sh7619-ether", (kernel_ulong_t)&sh7619_data },
3495 { "sh771x-ether", (kernel_ulong_t)&sh771x_data },
3496 { "sh7724-ether", (kernel_ulong_t)&sh7724_data },
3497 { "sh7734-gether", (kernel_ulong_t)&sh7734_data },
3498 { "sh7757-ether", (kernel_ulong_t)&sh7757_data },
3499 { "sh7757-gether", (kernel_ulong_t)&sh7757_data_giga },
3500 { "sh7763-gether", (kernel_ulong_t)&sh7763_data },