Lines Matching +full:ecam +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
26 #include <linux/dma-mapping.h>
38 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
39 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
40 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
41 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
42 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
43 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
44 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
45 #define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
46 #define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
47 #define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
48 #define FIRMWARE_8411_2 "rtl_nic/rtl8411-2.fw"
49 #define FIRMWARE_8106E_1 "rtl_nic/rtl8106e-1.fw"
50 #define FIRMWARE_8106E_2 "rtl_nic/rtl8106e-2.fw"
51 #define FIRMWARE_8168G_2 "rtl_nic/rtl8168g-2.fw"
52 #define FIRMWARE_8168G_3 "rtl_nic/rtl8168g-3.fw"
53 #define FIRMWARE_8168H_1 "rtl_nic/rtl8168h-1.fw"
54 #define FIRMWARE_8168H_2 "rtl_nic/rtl8168h-2.fw"
55 #define FIRMWARE_8168FP_3 "rtl_nic/rtl8168fp-3.fw"
56 #define FIRMWARE_8107E_1 "rtl_nic/rtl8107e-1.fw"
57 #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
58 #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
59 #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
61 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
62 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
69 #define R8169_RX_BUF_SIZE (SZ_16K - 1)
80 #define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
81 #define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
82 #define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
83 #define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
84 #define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
85 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))
87 #define JUMBO_4K (4 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
88 #define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
89 #define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
90 #define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
102 /* PCI-E devices. */
197 #define TXCFG_AUTO_FIFO (1 << 7) /* 8111e-vl */
198 #define TXCFG_EMPTY (1 << 11) /* 8111e-vl */
399 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
418 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
605 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
606 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
637 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
665 return &tp->pci_dev->dev; in tp_to_dev()
686 return tp->mac_version >= RTL_GIGA_MAC_VER_60; in rtl_is_8125()
691 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_is_8168evl_up()
692 tp->mac_version != RTL_GIGA_MAC_VER_39 && in rtl_is_8168evl_up()
693 tp->mac_version <= RTL_GIGA_MAC_VER_52; in rtl_is_8168evl_up()
698 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_supports_eee()
699 tp->mac_version != RTL_GIGA_MAC_VER_37 && in rtl_supports_eee()
700 tp->mac_version != RTL_GIGA_MAC_VER_39; in rtl_supports_eee()
709 start = u64_stats_fetch_begin_irq(&stats->syncp); in rtl_get_priv_stats()
710 *pkts = stats->packets; in rtl_get_priv_stats()
711 *bytes = stats->bytes; in rtl_get_priv_stats()
712 } while (u64_stats_fetch_retry_irq(&stats->syncp, start)); in rtl_get_priv_stats()
718 u64_stats_update_begin(&stats->syncp); in rtl_inc_priv_stats()
719 stats->packets += pkts; in rtl_inc_priv_stats()
720 stats->bytes += bytes; in rtl_inc_priv_stats()
721 u64_stats_update_end(&stats->syncp); in rtl_inc_priv_stats()
743 if (c->check(tp) == high) in rtl_loop_wait()
749 netdev_err(tp->dev, "%s == %d (loop: %d, delay: %lu).\n", in rtl_loop_wait()
750 c->msg, !high, n, usecs); in rtl_loop_wait()
782 netdev_err(tp->dev, "Invalid ocp reg %x!\n", reg); in rtl_ocp_reg_failure()
811 (RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT; in r8168_phy_ocp_read()
843 tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE; in r8168g_mdio_write()
847 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_write()
848 reg -= 0x10; in r8168g_mdio_write()
850 r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value); in r8168g_mdio_write()
856 return tp->ocp_base == OCP_STD_PHY_BASE ? 0 : tp->ocp_base >> 4; in r8168g_mdio_read()
858 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_read()
859 reg -= 0x10; in r8168g_mdio_read()
861 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2); in r8168g_mdio_read()
867 tp->ocp_base = value << 4; in mac_mcu_write()
871 r8168_mac_ocp_write(tp, tp->ocp_base + reg, value); in mac_mcu_write()
876 return r8168_mac_ocp_read(tp, tp->ocp_base + reg); in mac_mcu_read()
903 RTL_R32(tp, PHYAR) & 0xffff : -ETIMEDOUT; in r8169_mdio_read()
943 RTL_R32(tp, OCPDR) & OCPDR_DATA_MASK : -ETIMEDOUT; in r8168dp_1_mdio_read()
986 switch (tp->mac_version) { in rtl_writephy()
1005 switch (tp->mac_version) { in rtl_readphy()
1043 /* based on RTL8168FP_OOBMAC_BASE in vendor driver */ in r8168fp_adjust_ocp_cmd()
1044 if (tp->mac_version == RTL_GIGA_MAC_VER_52 && type == ERIAR_OOB) in r8168fp_adjust_ocp_cmd()
1145 return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10; in rtl8168_get_ocp_reg()
1190 switch (tp->mac_version) { in rtl8168_driver_start()
1221 switch (tp->mac_version) { in rtl8168_driver_stop()
1250 switch (tp->mac_version) { in r8168_check_dash()
1308 RTL_W32(tp, IntrMask_8125, tp->irq_mask); in rtl_irq_enable()
1310 RTL_W16(tp, IntrMask, tp->irq_mask); in rtl_irq_enable()
1322 struct phy_device *phydev = tp->phydev; in rtl_link_chg_patch()
1324 if (tp->mac_version == RTL_GIGA_MAC_VER_34 || in rtl_link_chg_patch()
1325 tp->mac_version == RTL_GIGA_MAC_VER_38) { in rtl_link_chg_patch()
1326 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1329 } else if (phydev->speed == SPEED_100) { in rtl_link_chg_patch()
1337 } else if (tp->mac_version == RTL_GIGA_MAC_VER_35 || in rtl_link_chg_patch()
1338 tp->mac_version == RTL_GIGA_MAC_VER_36) { in rtl_link_chg_patch()
1339 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1346 } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) { in rtl_link_chg_patch()
1347 if (phydev->speed == SPEED_10) { in rtl_link_chg_patch()
1362 wol->supported = WAKE_ANY; in rtl8169_get_wol()
1363 wol->wolopts = tp->saved_wolopts; in rtl8169_get_wol()
1386 tmp--; in __rtl8169_set_wol()
1392 tmp--; in __rtl8169_set_wol()
1406 switch (tp->mac_version) { in __rtl8169_set_wol()
1428 tp->dev->wol_enabled = wolopts ? 1 : 0; in __rtl8169_set_wol()
1435 if (wol->wolopts & ~WAKE_ANY) in rtl8169_set_wol()
1436 return -EINVAL; in rtl8169_set_wol()
1438 tp->saved_wolopts = wol->wolopts; in rtl8169_set_wol()
1439 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_set_wol()
1448 struct rtl_fw *rtl_fw = tp->rtl_fw; in rtl8169_get_drvinfo()
1450 strlcpy(info->driver, MODULENAME, sizeof(info->driver)); in rtl8169_get_drvinfo()
1451 strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info)); in rtl8169_get_drvinfo()
1452 BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); in rtl8169_get_drvinfo()
1454 strlcpy(info->fw_version, rtl_fw->version, in rtl8169_get_drvinfo()
1455 sizeof(info->fw_version)); in rtl8169_get_drvinfo()
1468 if (dev->mtu > TD_MSS_MAX) in rtl8169_fix_features()
1471 if (dev->mtu > ETH_DATA_LEN && in rtl8169_fix_features()
1472 tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl8169_fix_features()
1506 tp->cp_cmd |= RxChkSum; in rtl8169_set_features()
1508 tp->cp_cmd &= ~RxChkSum; in rtl8169_set_features()
1512 tp->cp_cmd |= RxVlan; in rtl8169_set_features()
1514 tp->cp_cmd &= ~RxVlan; in rtl8169_set_features()
1517 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl8169_set_features()
1531 u32 opts2 = le32_to_cpu(desc->opts2); in rtl8169_rx_vlan_tag()
1541 u32 __iomem *data = tp->mmio_addr; in rtl8169_get_regs()
1571 return -EOPNOTSUPP; in rtl8169_get_sset_count()
1582 dma_addr_t paddr = tp->counters_phys_addr; in rtl8169_do_counters()
1600 if (tp->mac_version >= RTL_GIGA_MAC_VER_19) in rtl8169_reset_counters()
1610 * is disabled. If 0xff chip may be in a PCI power-save state. in rtl8169_update_counters()
1618 struct rtl8169_counters *counters = tp->counters; in rtl8169_init_counter_offsets()
1635 if (tp->tc_offset.inited) in rtl8169_init_counter_offsets()
1641 tp->tc_offset.tx_errors = counters->tx_errors; in rtl8169_init_counter_offsets()
1642 tp->tc_offset.tx_multi_collision = counters->tx_multi_collision; in rtl8169_init_counter_offsets()
1643 tp->tc_offset.tx_aborted = counters->tx_aborted; in rtl8169_init_counter_offsets()
1644 tp->tc_offset.rx_missed = counters->rx_missed; in rtl8169_init_counter_offsets()
1645 tp->tc_offset.inited = true; in rtl8169_init_counter_offsets()
1654 counters = tp->counters; in rtl8169_get_ethtool_stats()
1657 data[0] = le64_to_cpu(counters->tx_packets); in rtl8169_get_ethtool_stats()
1658 data[1] = le64_to_cpu(counters->rx_packets); in rtl8169_get_ethtool_stats()
1659 data[2] = le64_to_cpu(counters->tx_errors); in rtl8169_get_ethtool_stats()
1660 data[3] = le32_to_cpu(counters->rx_errors); in rtl8169_get_ethtool_stats()
1661 data[4] = le16_to_cpu(counters->rx_missed); in rtl8169_get_ethtool_stats()
1662 data[5] = le16_to_cpu(counters->align_errors); in rtl8169_get_ethtool_stats()
1663 data[6] = le32_to_cpu(counters->tx_one_collision); in rtl8169_get_ethtool_stats()
1664 data[7] = le32_to_cpu(counters->tx_multi_collision); in rtl8169_get_ethtool_stats()
1665 data[8] = le64_to_cpu(counters->rx_unicast); in rtl8169_get_ethtool_stats()
1666 data[9] = le64_to_cpu(counters->rx_broadcast); in rtl8169_get_ethtool_stats()
1667 data[10] = le32_to_cpu(counters->rx_multicast); in rtl8169_get_ethtool_stats()
1668 data[11] = le16_to_cpu(counters->tx_aborted); in rtl8169_get_ethtool_stats()
1669 data[12] = le16_to_cpu(counters->tx_underun); in rtl8169_get_ethtool_stats()
1684 * > 1 - the availability of the IntrMitigate (0xe2) register through the
1689 * > 2 - the Tx timer unit at gigabit speed
1739 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_coalesce_info()
1745 if (tp->phydev->speed == SPEED_UNKNOWN) in rtl_coalesce_info()
1748 for (; ci->speed; ci++) { in rtl_coalesce_info()
1749 if (tp->phydev->speed == ci->speed) in rtl_coalesce_info()
1753 return ERR_PTR(-ELNRNG); in rtl_coalesce_info()
1764 return -EOPNOTSUPP; in rtl_get_coalesce()
1773 scale = ci->scale_nsecs[tp->cp_cmd & INTT_MASK]; in rtl_get_coalesce()
1778 ec->tx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
1782 ec->tx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
1785 ec->rx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
1788 ec->rx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
1805 if (usec <= ci->scale_nsecs[i] * RTL_COALESCE_T_MAX / 1000U) { in rtl_coalesce_choose_scale()
1807 return ci->scale_nsecs[i]; in rtl_coalesce_choose_scale()
1811 return -ERANGE; in rtl_coalesce_choose_scale()
1817 u32 tx_fr = ec->tx_max_coalesced_frames; in rtl_set_coalesce()
1818 u32 rx_fr = ec->rx_max_coalesced_frames; in rtl_set_coalesce()
1824 return -EOPNOTSUPP; in rtl_set_coalesce()
1827 return -ERANGE; in rtl_set_coalesce()
1829 coal_usec_max = max(ec->rx_coalesce_usecs, ec->tx_coalesce_usecs); in rtl_set_coalesce()
1837 * - both rx_usecs=0 & rx_frames=0 in hardware (no delay on RX) in rtl_set_coalesce()
1838 * - rtl_get_coalesce returns rx_usecs=0, rx_frames=1 in rtl_set_coalesce()
1839 * - then user does `ethtool -C eth0 rx-usecs 100` in rtl_set_coalesce()
1850 if ((tx_fr && !ec->tx_coalesce_usecs) || in rtl_set_coalesce()
1851 (rx_fr && !ec->rx_coalesce_usecs)) in rtl_set_coalesce()
1852 return -EINVAL; in rtl_set_coalesce()
1857 units = DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
1859 units = DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
1864 /* Meaning of PktCntrDisable bit changed from RTL8168e-vl */ in rtl_set_coalesce()
1868 tp->cp_cmd |= PktCntrDisable; in rtl_set_coalesce()
1870 tp->cp_cmd &= ~PktCntrDisable; in rtl_set_coalesce()
1873 tp->cp_cmd = (tp->cp_cmd & ~INTT_MASK) | cp01; in rtl_set_coalesce()
1874 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_set_coalesce()
1885 return -EOPNOTSUPP; in rtl8169_get_eee()
1887 return phy_ethtool_get_eee(tp->phydev, data); in rtl8169_get_eee()
1896 return -EOPNOTSUPP; in rtl8169_set_eee()
1898 ret = phy_ethtool_set_eee(tp->phydev, data); in rtl8169_set_eee()
1901 tp->eee_adv = phy_read_mmd(dev->phydev, MDIO_MMD_AN, in rtl8169_set_eee()
1930 struct phy_device *phydev = tp->phydev; in rtl_enable_eee()
1934 if (tp->eee_adv >= 0) in rtl_enable_eee()
1935 adv = tp->eee_adv; in rtl_enable_eee()
2035 /* FIXME: where did these entries come from ? -- FR */ in rtl8169_get_mac_version()
2046 /* Catch-all */ in rtl8169_get_mac_version()
2052 while ((xid & p->mask) != p->val) in rtl8169_get_mac_version()
2054 ver = p->ver; in rtl8169_get_mac_version()
2070 if (tp->rtl_fw) { in rtl_release_firmware()
2071 rtl_fw_release_firmware(tp->rtl_fw); in rtl_release_firmware()
2072 kfree(tp->rtl_fw); in rtl_release_firmware()
2073 tp->rtl_fw = NULL; in rtl_release_firmware()
2082 if (tp->rtl_fw) { in r8169_apply_firmware()
2083 rtl_fw_write_firmware(tp, tp->rtl_fw); in r8169_apply_firmware()
2084 /* At least one firmware doesn't reset tp->ocp_base. */ in r8169_apply_firmware()
2085 tp->ocp_base = OCP_STD_PHY_BASE; in r8169_apply_firmware()
2088 phy_read_poll_timeout(tp->phydev, MII_BMCR, val, in r8169_apply_firmware()
2097 if (tp->mac_version != RTL_GIGA_MAC_VER_38) in rtl8168_config_eee_mac()
2111 RTL_W16(tp, EEE_TXIDLE_TIMER_8125, tp->dev->mtu + ETH_HLEN + 0x20); in rtl8125_set_eee_txidle_timer()
2152 set_bit(flag, tp->wk.flags); in rtl_schedule_task()
2153 schedule_work(&tp->wk.work); in rtl_schedule_task()
2158 r8169_hw_phy_config(tp, tp->phydev, tp->mac_version); in rtl8169_init_phy()
2160 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { in rtl8169_init_phy()
2161 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); in rtl8169_init_phy()
2162 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl8169_init_phy()
2167 if (tp->mac_version == RTL_GIGA_MAC_VER_05 && in rtl8169_init_phy()
2168 tp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_GIGABYTE && in rtl8169_init_phy()
2169 tp->pci_dev->subsystem_device == 0xe000) in rtl8169_init_phy()
2170 phy_write_paged(tp->phydev, 0x0001, 0x10, 0xf01b); in rtl8169_init_phy()
2173 phy_speed_up(tp->phydev); in rtl8169_init_phy()
2178 genphy_soft_reset(tp->phydev); in rtl8169_init_phy()
2191 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl_rar_set()
2206 rtl_rar_set(tp, dev->dev_addr); in rtl_set_mac_address()
2213 switch (tp->mac_version) { in rtl_wol_suspend_quirk()
2235 if (tp->mac_version == RTL_GIGA_MAC_VER_32 || in rtl_pll_power_down()
2236 tp->mac_version == RTL_GIGA_MAC_VER_33) in rtl_pll_power_down()
2240 phy_speed_down(tp->phydev, false); in rtl_pll_power_down()
2245 switch (tp->mac_version) { in rtl_pll_power_down()
2271 switch (tp->mac_version) { in rtl_pll_power_up()
2296 phy_resume(tp->phydev); in rtl_pll_power_up()
2301 switch (tp->mac_version) { in rtl_init_rxcfg()
2325 tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0; in rtl8169_init_ring_indexes()
2376 bool jumbo = tp->dev->mtu > ETH_DATA_LEN; in rtl_jumbo_config()
2379 switch (tp->mac_version) { in rtl_jumbo_config()
2383 pcie_set_readrq(tp->pci_dev, 512); in rtl_jumbo_config()
2391 pcie_set_readrq(tp->pci_dev, 512); in rtl_jumbo_config()
2405 pcie_set_readrq(tp->pci_dev, 512); in rtl_jumbo_config()
2416 if (!jumbo && pci_is_pcie(tp->pci_dev) && tp->supports_gmii) in rtl_jumbo_config()
2417 pcie_set_readrq(tp->pci_dev, 4096); in rtl_jumbo_config()
2437 if (tp->rtl_fw || !tp->fw_name) in rtl_request_firmware()
2444 rtl_fw->phy_write = rtl_writephy; in rtl_request_firmware()
2445 rtl_fw->phy_read = rtl_readphy; in rtl_request_firmware()
2446 rtl_fw->mac_mcu_write = mac_mcu_write; in rtl_request_firmware()
2447 rtl_fw->mac_mcu_read = mac_mcu_read; in rtl_request_firmware()
2448 rtl_fw->fw_name = tp->fw_name; in rtl_request_firmware()
2449 rtl_fw->dev = tp_to_dev(tp); in rtl_request_firmware()
2454 tp->rtl_fw = rtl_fw; in rtl_request_firmware()
2485 switch (tp->mac_version) { in rtl_wait_txrx_fifo_empty()
2534 RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2535 RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2536 RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2537 RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2544 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl8169_set_magic_reg()
2546 else if (tp->mac_version == RTL_GIGA_MAC_VER_06) in rtl8169_set_magic_reg()
2565 if (dev->flags & IFF_PROMISC) { in rtl_set_rx_mode()
2568 dev->flags & IFF_ALLMULTI || in rtl_set_rx_mode()
2569 tp->mac_version == RTL_GIGA_MAC_VER_35) { in rtl_set_rx_mode()
2582 if (tp->mac_version > RTL_GIGA_MAC_VER_06) { in rtl_set_rx_mode()
2603 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_write()
2614 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_read()
2625 struct pci_dev *pdev = tp->pci_dev; in rtl_csi_access_enable()
2629 * controls the L0s/L1 entrance latency. We try standard ECAM access in rtl_csi_access_enable()
2632 if (pdev->cfg_size > 0x070f && in rtl_csi_access_enable()
2636 netdev_notice_once(tp->dev, in rtl_csi_access_enable()
2658 while (len-- > 0) { in __rtl_ephy_init()
2659 w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits; in __rtl_ephy_init()
2660 rtl_ephy_write(tp, e->offset, w); in __rtl_ephy_init()
2669 pcie_capability_clear_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_disable_clock_request()
2675 pcie_capability_set_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_enable_clock_request()
2688 if (enable && tp->aspm_manageable) { in rtl_hw_aspm_clkreq_enable()
3040 /* The following Realtek-provided magic fixes an issue with the RX unit in rtl_hw_start_8411_2()
3041 * getting confused after the PHY having been powered-down. in rtl_hw_start_8411_2()
3223 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8168h_1()
3379 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8117()
3569 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3574 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3600 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3750 if (hw_configs[tp->mac_version]) in rtl_hw_config()
3751 hw_configs[tp->mac_version](tp); in rtl_hw_config()
3782 tp->cp_cmd |= PCIMulRW; in rtl_hw_start_8169()
3784 if (tp->mac_version == RTL_GIGA_MAC_VER_02 || in rtl_hw_start_8169()
3785 tp->mac_version == RTL_GIGA_MAC_VER_03) in rtl_hw_start_8169()
3786 tp->cp_cmd |= EnAnaPLL; in rtl_hw_start_8169()
3788 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8169()
3800 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start()
3802 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_hw_start()
3815 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ in rtl_hw_start()
3821 rtl_set_rx_config_features(tp, tp->dev->features); in rtl_hw_start()
3822 rtl_set_rx_mode(tp->dev); in rtl_hw_start()
3830 dev->mtu = new_mtu; in rtl8169_change_mtu()
3834 switch (tp->mac_version) { in rtl8169_change_mtu()
3848 u32 eor = le32_to_cpu(desc->opts1) & RingEnd; in rtl8169_mark_to_asic()
3850 desc->opts2 = 0; in rtl8169_mark_to_asic()
3853 WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | R8169_RX_BUF_SIZE)); in rtl8169_mark_to_asic()
3870 netdev_err(tp->dev, "Failed to map RX DMA!\n"); in rtl8169_alloc_rx_data()
3875 desc->addr = cpu_to_le64(mapping); in rtl8169_alloc_rx_data()
3885 for (i = 0; i < NUM_RX_DESC && tp->Rx_databuff[i]; i++) { in rtl8169_rx_clear()
3887 le64_to_cpu(tp->RxDescArray[i].addr), in rtl8169_rx_clear()
3889 __free_pages(tp->Rx_databuff[i], get_order(R8169_RX_BUF_SIZE)); in rtl8169_rx_clear()
3890 tp->Rx_databuff[i] = NULL; in rtl8169_rx_clear()
3891 tp->RxDescArray[i].addr = 0; in rtl8169_rx_clear()
3892 tp->RxDescArray[i].opts1 = 0; in rtl8169_rx_clear()
3903 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i); in rtl8169_rx_fill()
3906 return -ENOMEM; in rtl8169_rx_fill()
3908 tp->Rx_databuff[i] = data; in rtl8169_rx_fill()
3912 tp->RxDescArray[NUM_RX_DESC - 1].opts1 |= cpu_to_le32(RingEnd); in rtl8169_rx_fill()
3921 memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); in rtl8169_init_ring()
3922 memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); in rtl8169_init_ring()
3929 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_unmap_tx_skb()
3930 struct TxDesc *desc = tp->TxDescArray + entry; in rtl8169_unmap_tx_skb()
3932 dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), tx_skb->len, in rtl8169_unmap_tx_skb()
3945 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_tx_clear_range()
3946 unsigned int len = tx_skb->len; in rtl8169_tx_clear_range()
3949 struct sk_buff *skb = tx_skb->skb; in rtl8169_tx_clear_range()
3960 rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC); in rtl8169_tx_clear()
3961 netdev_reset_queue(tp->dev); in rtl8169_tx_clear()
3966 napi_disable(&tp->napi); in rtl8169_cleanup()
3976 if (going_down && tp->dev->wol_enabled) in rtl8169_cleanup()
3979 switch (tp->mac_version) { in rtl8169_cleanup()
4009 netif_stop_queue(tp->dev); in rtl_reset_work()
4014 rtl8169_mark_to_asic(tp->RxDescArray + i); in rtl_reset_work()
4016 napi_enable(&tp->napi); in rtl_reset_work()
4030 struct TxDesc *txd = tp->TxDescArray + entry; in rtl8169_tx_map()
4040 netdev_err(tp->dev, "Failed to map TX data!\n"); in rtl8169_tx_map()
4044 txd->addr = cpu_to_le64(mapping); in rtl8169_tx_map()
4045 txd->opts2 = cpu_to_le32(opts[1]); in rtl8169_tx_map()
4048 if (entry == NUM_TX_DESC - 1) in rtl8169_tx_map()
4052 txd->opts1 = cpu_to_le32(opts1); in rtl8169_tx_map()
4054 tp->tx_skb[entry].len = len; in rtl8169_tx_map()
4065 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { in rtl8169_xmit_frags()
4066 const skb_frag_t *frag = info->frags + cur_frag; in rtl8169_xmit_frags()
4079 rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag); in rtl8169_xmit_frags()
4080 return -EIO; in rtl8169_xmit_frags()
4085 switch (tp->mac_version) { in rtl_test_hw_pad_bug()
4098 u32 mss = skb_shinfo(skb)->gso_size; in rtl8169_tso_csum_v1()
4103 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v1()
4106 if (ip->protocol == IPPROTO_TCP) in rtl8169_tso_csum_v1()
4108 else if (ip->protocol == IPPROTO_UDP) in rtl8169_tso_csum_v1()
4120 u32 mss = shinfo->gso_size; in rtl8169_tso_csum_v2()
4123 if (shinfo->gso_type & SKB_GSO_TCPV4) { in rtl8169_tso_csum_v2()
4125 } else if (shinfo->gso_type & SKB_GSO_TCPV6) { in rtl8169_tso_csum_v2()
4137 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v2()
4143 ip_protocol = ip_hdr(skb)->protocol; in rtl8169_tso_csum_v2()
4148 ip_protocol = ipv6_hdr(skb)->nexthdr; in rtl8169_tso_csum_v2()
4165 if (unlikely(skb->len < ETH_ZLEN && rtl_test_hw_pad_bug(tp))) in rtl8169_tso_csum_v2()
4176 unsigned int slots_avail = tp->dirty_tx + NUM_TX_DESC - tp->cur_tx; in rtl_tx_slots_avail()
4185 switch (tp->mac_version) { in rtl_chip_supports_csum_v2()
4205 unsigned int frags = skb_shinfo(skb)->nr_frags; in rtl8169_start_xmit()
4207 unsigned int entry = tp->cur_tx % NUM_TX_DESC; in rtl8169_start_xmit()
4212 txd_first = tp->TxDescArray + entry; in rtl8169_start_xmit()
4220 if (unlikely(le32_to_cpu(txd_first->opts1) & DescOwn)) in rtl8169_start_xmit()
4231 if (unlikely(rtl8169_tx_map(tp, opts, skb_headlen(skb), skb->data, in rtl8169_start_xmit()
4241 txd_last = tp->TxDescArray + entry; in rtl8169_start_xmit()
4242 txd_last->opts1 |= cpu_to_le32(LastFrag); in rtl8169_start_xmit()
4243 tp->tx_skb[entry].skb = skb; in rtl8169_start_xmit()
4250 door_bell = __netdev_sent_queue(dev, skb->len, netdev_xmit_more()); in rtl8169_start_xmit()
4252 txd_first->opts1 |= cpu_to_le32(DescOwn | FirstFrag); in rtl8169_start_xmit()
4254 /* rtl_tx needs to see descriptor changes before updated tp->cur_tx */ in rtl8169_start_xmit()
4257 tp->cur_tx += frags + 1; in rtl8169_start_xmit()
4261 /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must in rtl8169_start_xmit()
4274 * - publish queue status and cur_tx ring index (write barrier) in rtl8169_start_xmit()
4275 * - refresh dirty_tx ring index (read barrier). in rtl8169_start_xmit()
4291 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4296 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4303 unsigned int nr_frags = info->nr_frags; in rtl_last_frag_len()
4308 return skb_frag_size(info->frags + nr_frags - 1); in rtl_last_frag_len()
4321 else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4 && in rtl8168evl_fix_tso()
4339 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl8169_features_check()
4345 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_features_check()
4347 if (skb->len < ETH_ZLEN) in rtl8169_features_check()
4361 struct pci_dev *pdev = tp->pci_dev; in rtl8169_pcierr_interrupt()
4374 * - it seems to work; in rtl8169_pcierr_interrupt()
4375 * - I did not see what else could be done; in rtl8169_pcierr_interrupt()
4376 * - it makes iop3xx happy. in rtl8169_pcierr_interrupt()
4380 if (pdev->broken_parity_status) in rtl8169_pcierr_interrupt()
4395 dirty_tx = tp->dirty_tx; in rtl_tx()
4398 for (tx_left = tp->cur_tx - dirty_tx; tx_left > 0; tx_left--) { in rtl_tx()
4400 struct sk_buff *skb = tp->tx_skb[entry].skb; in rtl_tx()
4403 status = le32_to_cpu(tp->TxDescArray[entry].opts1); in rtl_tx()
4411 bytes_compl += skb->len; in rtl_tx()
4417 if (tp->dirty_tx != dirty_tx) { in rtl_tx()
4420 rtl_inc_priv_stats(&tp->tx_stats, pkts_compl, bytes_compl); in rtl_tx()
4422 tp->dirty_tx = dirty_tx; in rtl_tx()
4424 * - publish dirty_tx ring index (write barrier) in rtl_tx()
4425 * - refresh cur_tx ring index and queue status (read barrier) in rtl_tx()
4439 * it is slow enough). -- FR in rtl_tx()
4441 if (tp->cur_tx != dirty_tx) in rtl_tx()
4457 skb->ip_summed = CHECKSUM_UNNECESSARY; in rtl8169_rx_csum()
4467 cur_rx = tp->cur_rx; in rtl_rx()
4469 for (rx_left = min(budget, NUM_RX_DESC); rx_left > 0; rx_left--, cur_rx++) { in rtl_rx()
4471 struct RxDesc *desc = tp->RxDescArray + entry; in rtl_rx()
4477 status = le32_to_cpu(desc->opts1); in rtl_rx()
4491 dev->stats.rx_errors++; in rtl_rx()
4493 dev->stats.rx_length_errors++; in rtl_rx()
4495 dev->stats.rx_crc_errors++; in rtl_rx()
4497 if (!(dev->features & NETIF_F_RXALL)) in rtl_rx()
4504 if (likely(!(dev->features & NETIF_F_RXFCS))) in rtl_rx()
4505 pkt_size -= ETH_FCS_LEN; in rtl_rx()
4508 * They are seen as a symptom of over-mtu sized frames. in rtl_rx()
4511 dev->stats.rx_dropped++; in rtl_rx()
4512 dev->stats.rx_length_errors++; in rtl_rx()
4516 skb = napi_alloc_skb(&tp->napi, pkt_size); in rtl_rx()
4518 dev->stats.rx_dropped++; in rtl_rx()
4522 addr = le64_to_cpu(desc->addr); in rtl_rx()
4523 rx_buf = page_address(tp->Rx_databuff[entry]); in rtl_rx()
4528 skb->tail += pkt_size; in rtl_rx()
4529 skb->len = pkt_size; in rtl_rx()
4533 skb->protocol = eth_type_trans(skb, dev); in rtl_rx()
4537 if (skb->pkt_type == PACKET_MULTICAST) in rtl_rx()
4538 dev->stats.multicast++; in rtl_rx()
4540 napi_gro_receive(&tp->napi, skb); in rtl_rx()
4542 rtl_inc_priv_stats(&tp->rx_stats, 1, pkt_size); in rtl_rx()
4547 count = cur_rx - tp->cur_rx; in rtl_rx()
4548 tp->cur_rx = cur_rx; in rtl_rx()
4558 if ((status & 0xffff) == 0xffff || !(status & tp->irq_mask)) in rtl8169_interrupt()
4562 rtl8169_pcierr_interrupt(tp->dev); in rtl8169_interrupt()
4567 phy_mac_interrupt(tp->phydev); in rtl8169_interrupt()
4570 tp->mac_version == RTL_GIGA_MAC_VER_11)) { in rtl8169_interrupt()
4571 netif_stop_queue(tp->dev); in rtl8169_interrupt()
4576 napi_schedule(&tp->napi); in rtl8169_interrupt()
4590 if (!netif_running(tp->dev) || in rtl_task()
4591 !test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags)) in rtl_task()
4594 if (test_and_clear_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags)) { in rtl_task()
4596 netif_wake_queue(tp->dev); in rtl_task()
4605 struct net_device *dev = tp->dev; in rtl8169_poll()
4624 pm_request_resume(&tp->pci_dev->dev); in r8169_phylink_handler()
4626 pm_runtime_idle(&tp->pci_dev->dev); in r8169_phylink_handler()
4630 phy_print_status(tp->phydev); in r8169_phylink_handler()
4635 struct phy_device *phydev = tp->phydev; in r8169_phy_connect()
4639 phy_mode = tp->supports_gmii ? PHY_INTERFACE_MODE_GMII : in r8169_phy_connect()
4642 ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler, in r8169_phy_connect()
4647 if (!tp->supports_gmii) in r8169_phy_connect()
4660 bitmap_zero(tp->wk.flags, RTL_FLAG_MAX); in rtl8169_down()
4662 phy_stop(tp->phydev); in rtl8169_down()
4675 napi_enable(&tp->napi); in rtl8169_up()
4676 set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags); in rtl8169_up()
4679 phy_start(tp->phydev); in rtl8169_up()
4685 struct pci_dev *pdev = tp->pci_dev; in rtl8169_close()
4687 pm_runtime_get_sync(&pdev->dev); in rtl8169_close()
4693 cancel_work_sync(&tp->wk.work); in rtl8169_close()
4695 phy_disconnect(tp->phydev); in rtl8169_close()
4699 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl8169_close()
4700 tp->RxPhyAddr); in rtl8169_close()
4701 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl8169_close()
4702 tp->TxPhyAddr); in rtl8169_close()
4703 tp->TxDescArray = NULL; in rtl8169_close()
4704 tp->RxDescArray = NULL; in rtl8169_close()
4706 pm_runtime_put_sync(&pdev->dev); in rtl8169_close()
4716 rtl8169_interrupt(pci_irq_vector(tp->pci_dev, 0), tp); in rtl8169_netpoll()
4723 struct pci_dev *pdev = tp->pci_dev; in rtl_open()
4724 int retval = -ENOMEM; in rtl_open()
4726 pm_runtime_get_sync(&pdev->dev); in rtl_open()
4732 tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES, in rtl_open()
4733 &tp->TxPhyAddr, GFP_KERNEL); in rtl_open()
4734 if (!tp->TxDescArray) in rtl_open()
4737 tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES, in rtl_open()
4738 &tp->RxPhyAddr, GFP_KERNEL); in rtl_open()
4739 if (!tp->RxDescArray) in rtl_open()
4749 IRQF_SHARED, dev->name, tp); in rtl_open()
4761 pm_runtime_put_sync(&pdev->dev); in rtl_open()
4771 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl_open()
4772 tp->RxPhyAddr); in rtl_open()
4773 tp->RxDescArray = NULL; in rtl_open()
4775 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl_open()
4776 tp->TxPhyAddr); in rtl_open()
4777 tp->TxDescArray = NULL; in rtl_open()
4779 pm_runtime_put_noidle(&pdev->dev); in rtl_open()
4787 struct pci_dev *pdev = tp->pci_dev; in rtl8169_get_stats64()
4788 struct rtl8169_counters *counters = tp->counters; in rtl8169_get_stats64()
4790 pm_runtime_get_noresume(&pdev->dev); in rtl8169_get_stats64()
4792 netdev_stats_to_stats64(stats, &dev->stats); in rtl8169_get_stats64()
4794 rtl_get_priv_stats(&tp->rx_stats, &stats->rx_packets, &stats->rx_bytes); in rtl8169_get_stats64()
4795 rtl_get_priv_stats(&tp->tx_stats, &stats->tx_packets, &stats->tx_bytes); in rtl8169_get_stats64()
4801 if (pm_runtime_active(&pdev->dev)) in rtl8169_get_stats64()
4808 stats->tx_errors = le64_to_cpu(counters->tx_errors) - in rtl8169_get_stats64()
4809 le64_to_cpu(tp->tc_offset.tx_errors); in rtl8169_get_stats64()
4810 stats->collisions = le32_to_cpu(counters->tx_multi_collision) - in rtl8169_get_stats64()
4811 le32_to_cpu(tp->tc_offset.tx_multi_collision); in rtl8169_get_stats64()
4812 stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) - in rtl8169_get_stats64()
4813 le16_to_cpu(tp->tc_offset.tx_aborted); in rtl8169_get_stats64()
4814 stats->rx_missed_errors = le16_to_cpu(counters->rx_missed) - in rtl8169_get_stats64()
4815 le16_to_cpu(tp->tc_offset.rx_missed); in rtl8169_get_stats64()
4817 pm_runtime_put_noidle(&pdev->dev); in rtl8169_get_stats64()
4822 netif_device_detach(tp->dev); in rtl8169_net_suspend()
4824 if (netif_running(tp->dev)) in rtl8169_net_suspend()
4832 rtl_rar_set(tp, tp->dev->dev_addr); in rtl8169_net_resume()
4834 if (tp->TxDescArray) in rtl8169_net_resume()
4837 netif_device_attach(tp->dev); in rtl8169_net_resume()
4849 clk_disable_unprepare(tp->clk); in rtl8169_suspend()
4860 clk_prepare_enable(tp->clk); in rtl8169_resume()
4863 if (tp->mac_version == RTL_GIGA_MAC_VER_37) in rtl8169_resume()
4873 if (!tp->TxDescArray) { in rtl8169_runtime_suspend()
4874 netif_device_detach(tp->dev); in rtl8169_runtime_suspend()
4890 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_runtime_resume()
4899 if (!netif_running(tp->dev) || !netif_carrier_ok(tp->dev)) in rtl8169_runtime_idle()
4902 return -EBUSY; in rtl8169_runtime_idle()
4916 switch (tp->mac_version) { in rtl_wol_shutdown_quirk()
4920 pci_clear_master(tp->pci_dev); in rtl_wol_shutdown_quirk()
4939 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_shutdown()
4942 if (tp->saved_wolopts) { in rtl_shutdown()
4957 pm_runtime_get_noresume(&pdev->dev); in rtl_remove_one()
4959 unregister_netdev(tp->dev); in rtl_remove_one()
4967 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_remove_one()
4992 tp->irq_mask = RxOK | RxErr | TxOK | TxErr | LinkChg; in rtl_set_irq_mask()
4994 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_set_irq_mask()
4995 tp->irq_mask |= SYSErr | RxOverflow | RxFIFOOver; in rtl_set_irq_mask()
4996 else if (tp->mac_version == RTL_GIGA_MAC_VER_11) in rtl_set_irq_mask()
4998 tp->irq_mask |= RxFIFOOver; in rtl_set_irq_mask()
5000 tp->irq_mask |= RxOverflow; in rtl_set_irq_mask()
5007 switch (tp->mac_version) { in rtl_alloc_irq()
5021 return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags); in rtl_alloc_irq()
5028 if (rtl_is_8168evl_up(tp) && tp->mac_version != RTL_GIGA_MAC_VER_34) { in rtl_read_mac_address()
5056 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_read_reg()
5059 return -ENODEV; in r8169_mdio_read_reg()
5067 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_write_reg()
5070 return -ENODEV; in r8169_mdio_write_reg()
5079 struct pci_dev *pdev = tp->pci_dev; in r8169_mdio_register()
5083 new_bus = devm_mdiobus_alloc(&pdev->dev); in r8169_mdio_register()
5085 return -ENOMEM; in r8169_mdio_register()
5087 new_bus->name = "r8169"; in r8169_mdio_register()
5088 new_bus->priv = tp; in r8169_mdio_register()
5089 new_bus->parent = &pdev->dev; in r8169_mdio_register()
5090 new_bus->irq[0] = PHY_IGNORE_INTERRUPT; in r8169_mdio_register()
5091 snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x", pci_dev_id(pdev)); in r8169_mdio_register()
5093 new_bus->read = r8169_mdio_read_reg; in r8169_mdio_register()
5094 new_bus->write = r8169_mdio_write_reg; in r8169_mdio_register()
5096 ret = devm_mdiobus_register(&pdev->dev, new_bus); in r8169_mdio_register()
5100 tp->phydev = mdiobus_get_phy(new_bus, 0); in r8169_mdio_register()
5101 if (!tp->phydev) { in r8169_mdio_register()
5102 return -ENODEV; in r8169_mdio_register()
5103 } else if (!tp->phydev->drv) { in r8169_mdio_register()
5107 …dev_err(&pdev->dev, "no dedicated PHY driver found for PHY ID 0x%08x, maybe realtek.ko needs to be… in r8169_mdio_register()
5108 tp->phydev->phy_id); in r8169_mdio_register()
5109 return -EUNATCH; in r8169_mdio_register()
5113 phy_suspend(tp->phydev); in r8169_mdio_register()
5152 switch (tp->mac_version) { in rtl_hw_initialize()
5169 /* Non-GBit versions don't support jumbo frames */ in rtl_jumbo_max()
5170 if (!tp->supports_gmii) in rtl_jumbo_max()
5173 switch (tp->mac_version) { in rtl_jumbo_max()
5204 if (rc == -ENOENT) in rtl_get_ether_clk()
5205 /* clk-core allows NULL (for suspend / resume) */ in rtl_get_ether_clk()
5207 else if (rc != -EPROBE_DEFER) in rtl_get_ether_clk()
5210 tp->clk = clk; in rtl_get_ether_clk()
5223 struct net_device *dev = tp->dev; in rtl_init_mac_address()
5224 u8 *mac_addr = dev->dev_addr; in rtl_init_mac_address()
5253 dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp)); in rtl_init_one()
5255 return -ENOMEM; in rtl_init_one()
5257 SET_NETDEV_DEV(dev, &pdev->dev); in rtl_init_one()
5258 dev->netdev_ops = &rtl_netdev_ops; in rtl_init_one()
5260 tp->dev = dev; in rtl_init_one()
5261 tp->pci_dev = pdev; in rtl_init_one()
5262 tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1; in rtl_init_one()
5263 tp->eee_adv = -1; in rtl_init_one()
5264 tp->ocp_base = OCP_STD_PHY_BASE; in rtl_init_one()
5276 tp->aspm_manageable = !rc; in rtl_init_one()
5281 dev_err(&pdev->dev, "enable failure\n"); in rtl_init_one()
5286 dev_info(&pdev->dev, "Mem-Wr-Inval unavailable\n"); in rtl_init_one()
5289 region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1; in rtl_init_one()
5291 dev_err(&pdev->dev, "no MMIO resource found\n"); in rtl_init_one()
5292 return -ENODEV; in rtl_init_one()
5297 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n"); in rtl_init_one()
5298 return -ENODEV; in rtl_init_one()
5303 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); in rtl_init_one()
5307 tp->mmio_addr = pcim_iomap_table(pdev)[region]; in rtl_init_one()
5312 chipset = rtl8169_get_mac_version(xid, tp->supports_gmii); in rtl_init_one()
5314 dev_err(&pdev->dev, "unknown chip XID %03x\n", xid); in rtl_init_one()
5315 return -ENODEV; in rtl_init_one()
5318 tp->mac_version = chipset; in rtl_init_one()
5320 tp->cp_cmd = RTL_R16(tp, CPlusCmd) & CPCMD_MASK; in rtl_init_one()
5322 if (sizeof(dma_addr_t) > 4 && tp->mac_version >= RTL_GIGA_MAC_VER_18 && in rtl_init_one()
5323 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) in rtl_init_one()
5324 dev->features |= NETIF_F_HIGHDMA; in rtl_init_one()
5338 dev_err(&pdev->dev, "Can't allocate interrupt\n"); in rtl_init_one()
5342 INIT_WORK(&tp->wk.work, rtl_task); in rtl_init_one()
5343 u64_stats_init(&tp->rx_stats.syncp); in rtl_init_one()
5344 u64_stats_init(&tp->tx_stats.syncp); in rtl_init_one()
5348 dev->ethtool_ops = &rtl8169_ethtool_ops; in rtl_init_one()
5350 netif_napi_add(dev, &tp->napi, rtl8169_poll, NAPI_POLL_WEIGHT); in rtl_init_one()
5352 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM | in rtl_init_one()
5354 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; in rtl_init_one()
5355 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in rtl_init_one()
5361 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl_init_one()
5363 dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX; in rtl_init_one()
5366 dev->hw_features |= NETIF_F_IPV6_CSUM; in rtl_init_one()
5368 dev->features |= dev->hw_features; in rtl_init_one()
5376 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6; in rtl_init_one()
5377 dev->gso_max_size = RTL_GSO_MAX_SIZE_V2; in rtl_init_one()
5378 dev->gso_max_segs = RTL_GSO_MAX_SEGS_V2; in rtl_init_one()
5380 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO; in rtl_init_one()
5381 dev->gso_max_size = RTL_GSO_MAX_SIZE_V1; in rtl_init_one()
5382 dev->gso_max_segs = RTL_GSO_MAX_SEGS_V1; in rtl_init_one()
5385 dev->hw_features |= NETIF_F_RXALL; in rtl_init_one()
5386 dev->hw_features |= NETIF_F_RXFCS; in rtl_init_one()
5389 rtl8169_set_features(dev, dev->features); in rtl_init_one()
5393 dev->max_mtu = jumbo_max; in rtl_init_one()
5397 tp->fw_name = rtl_chip_infos[chipset].fw_name; in rtl_init_one()
5399 tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters), in rtl_init_one()
5400 &tp->counters_phys_addr, in rtl_init_one()
5402 if (!tp->counters) in rtl_init_one()
5403 return -ENOMEM; in rtl_init_one()
5419 rtl_chip_infos[chipset].name, dev->dev_addr, xid, in rtl_init_one()
5424 jumbo_max, tp->mac_version <= RTL_GIGA_MAC_VER_06 ? in rtl_init_one()
5433 pm_runtime_put_sync(&pdev->dev); in rtl_init_one()