Lines Matching +full:rx +full:- +full:delay +full:- +full:ps
1 /* SPDX-License-Identifier: GPL-2.0 */
12 ushort rx_status; /* Unknown bit assignments :-<. */
39 TxSTAT = 8, RxSTAT = 9, /* Tx and Rx status. */
60 #define CMR1h_RxENABLE 0x02 /* Rx unit enable. */
99 inbyte(port + PAR_STATUS); /* Settling time delay */ in read_nibble()
116 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode0()
117 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode0()
130 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode2()
166 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg()
186 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg_high()
206 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg_byte()
258 /* Delay between EEPROM clock transitions. */
260 do { int _i = 40; while (--_i > 0) { __SLOW_DOWN_IO; } } while (0)
262 /* The EEPROM commands include the alway-set leading bit. */