673 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))  macro
742 	RTL_W8 (ChipCmd, CmdReset);  in rtl8139_chip_reset()
835 	RTL_W8 (HltClk, 'R');  in rtl8139_init_board()
870 			RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_init_board()
871 			RTL_W8 (Config1, tmp8);  in rtl8139_init_board()
872 			RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_init_board()
877 				RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_init_board()
878 				RTL_W8 (Config4, tmp8 & ~LWPTN);  in rtl8139_init_board()
879 				RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_init_board()
886 		RTL_W8 (Config1, tmp8);  in rtl8139_init_board()
1103 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */  in rtl8139_init_one()
1158 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);  in read_eeprom()
1159 	RTL_W8 (Cfg9346, EE_ENB);  in read_eeprom()
1165 		RTL_W8 (Cfg9346, EE_ENB | dataval);  in read_eeprom()
1167 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);  in read_eeprom()
1170 	RTL_W8 (Cfg9346, EE_ENB);  in read_eeprom()
1174 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);  in read_eeprom()
1179 		RTL_W8 (Cfg9346, EE_ENB);  in read_eeprom()
1184 	RTL_W8(Cfg9346, 0);  in read_eeprom()
1225 		RTL_W8 (Config4, MDIO_WRITE1);  in mdio_sync()
1227 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);  in mdio_sync()
1255 		RTL_W8 (Config4, MDIO_DIR | dataval);  in mdio_read()
1257 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);  in mdio_read()
1263 		RTL_W8 (Config4, 0);  in mdio_read()
1266 		RTL_W8 (Config4, MDIO_CLK);  in mdio_read()
1288 			RTL_W8 (Cfg9346, Cfg9346_Unlock);  in mdio_write()
1290 			RTL_W8 (Cfg9346, Cfg9346_Lock);  in mdio_write()
1303 		RTL_W8 (Config4, dataval);  in mdio_write()
1305 		RTL_W8 (Config4, dataval | MDIO_CLK);  in mdio_write()
1310 		RTL_W8 (Config4, 0);  in mdio_write()
1312 		RTL_W8 (Config4, MDIO_CLK);  in mdio_write()
1389 		RTL_W8 (HltClk, 'R');  in rtl8139_hw_start()
1405 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);  in rtl8139_hw_start()
1417 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);  in rtl8139_hw_start()
1423 	RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_hw_start()
1439 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);  in rtl8139_hw_start()
1589 			RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_thread_iter()
1590 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);  in rtl8139_thread_iter()
1591 			RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_thread_iter()
1684 		RTL_W8 (ChipCmd, CmdRxEnb);  in rtl8139_tx_timeout_task()
1862 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);  in rtl8139_rx_err()
1863 	RTL_W8 (ChipCmd, tmp8);  in rtl8139_rx_err()
1895 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);  in rtl8139_rx_err()
1904 	RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_rx_err()
2270 	RTL_W8 (ChipCmd, 0);  in rtl8139_close()
2293 	RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_close()
2296 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */  in rtl8139_close()
2359 	RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_set_wol()
2360 	RTL_W8 (Config3, cfg3);  in rtl8139_set_wol()
2361 	RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_set_wol()
2373 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */  in rtl8139_set_wol()
2622 	RTL_W8 (ChipCmd, 0);  in rtl8139_suspend()