1135 		rxdp->control_0	= rxdp->control_1 = 0;  in vxge_hw_ring_rxd_reserve()
1202 	rxdp->control_0	= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_post_post()
1226 	rxdp->control_0	= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_post()
1286 	u64 control_0, own;  in vxge_hw_ring_rxd_next_completed()  local
1298 	control_0 = rxdp->control_0;  in vxge_hw_ring_rxd_next_completed()
1299 	own = control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_next_completed()
1300 	*t_code	= (u8)VXGE_HW_RING_RXD_T_CODE_GET(control_0);  in vxge_hw_ring_rxd_next_completed()
1388 		&fifo->nofl_db->control_0);  in __vxge_hw_non_offload_db_post()
1454 			txdp->control_0 = txdp->control_1 = 0;  in vxge_hw_fifo_txdl_reserve()
1489 		txdp->control_0 = txdp->control_1 = 0;  in vxge_hw_fifo_txdl_buffer_set()
1491 		txdp->control_0 |= VXGE_HW_FIFO_TXD_GATHER_CODE(  in vxge_hw_fifo_txdl_buffer_set()
1499 			txdp_last->control_0 |= VXGE_HW_FIFO_TXD_GATHER_CODE(  in vxge_hw_fifo_txdl_buffer_set()
1507 	txdp->control_0 |= VXGE_HW_FIFO_TXD_BUFFER_SIZE(size);  in vxge_hw_fifo_txdl_buffer_set()
1532 	txdp_last->control_0 |=  in vxge_hw_fifo_txdl_post()
1534 	txdp_first->control_0 |= VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER;  in vxge_hw_fifo_txdl_post()
1602 	if (!(txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER)) {  in vxge_hw_fifo_txdl_next_completed()
1608 		*t_code = (u8)VXGE_HW_FIFO_TXD_T_CODE_GET(txdp->control_0);  in vxge_hw_fifo_txdl_next_completed()