Lines Matching refs:vxge_vBIT
850 m0[0] |= vxge_vBIT(0x8, (i*4), 4); \
851 m0[1] |= vxge_vBIT(0x4, (i*4), 4); \
861 m0[0] &= ~vxge_vBIT(0x8, (i*4), 4); \
862 m0[1] &= ~vxge_vBIT(0x4, (i*4), 4); \
1114 #define VXGE_HW_NODBW_TYPE(val) vxge_vBIT(val, 0, 8)
1118 #define VXGE_HW_NODBW_LAST_TXD_NUMBER(val) vxge_vBIT(val, 32, 8)
1121 #define VXGE_HW_NODBW_LIST_NO_SNOOP(val) vxge_vBIT(val, 56, 8)
1264 #define VXGE_HW_FIFO_TXD_T_CODE(val) vxge_vBIT(val, 12, 4)
1268 #define VXGE_HW_FIFO_TXD_GATHER_CODE(val) vxge_vBIT(val, 22, 2)
1275 #define VXGE_HW_FIFO_TXD_LSO_MSS(val) vxge_vBIT(val, 34, 14)
1277 #define VXGE_HW_FIFO_TXD_BUFFER_SIZE(val) vxge_vBIT(val, 48, 16)
1285 #define VXGE_HW_FIFO_TXD_VLAN_TAG(val) vxge_vBIT(val, 16, 16)
1287 #define VXGE_HW_FIFO_TXD_INT_NUMBER(val) vxge_vBIT(val, 34, 6)
1399 #define VXGE_HW_RING_RXD_T_CODE(val) vxge_vBIT(val, 12, 4)
1426 #define VXGE_HW_RING_RXD_1_BUFFER0_SIZE(val) vxge_vBIT(val, 2, 14)
1427 #define VXGE_HW_RING_RXD_1_BUFFER0_SIZE_MASK vxge_vBIT(0x3FFF, 2, 14)