Lines Matching refs:pmlp_pl

446 	char pmlp_pl[MLXSW_REG_PMLP_LEN];  in mlxsw_sp_port_module_info_get()  local
453 mlxsw_reg_pmlp_pack(pmlp_pl, local_port); in mlxsw_sp_port_module_info_get()
454 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_info_get()
457 module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0); in mlxsw_sp_port_module_info_get()
458 width = mlxsw_reg_pmlp_width_get(pmlp_pl); in mlxsw_sp_port_module_info_get()
459 separate_rxtx = mlxsw_reg_pmlp_rxtx_get(pmlp_pl); in mlxsw_sp_port_module_info_get()
468 if (mlxsw_reg_pmlp_module_get(pmlp_pl, i) != module) { in mlxsw_sp_port_module_info_get()
474 mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) != in mlxsw_sp_port_module_info_get()
475 mlxsw_reg_pmlp_rx_lane_get(pmlp_pl, i)) { in mlxsw_sp_port_module_info_get()
480 if (mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) != i) { in mlxsw_sp_port_module_info_get()
489 port_mapping->lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0); in mlxsw_sp_port_module_info_get()
497 char pmlp_pl[MLXSW_REG_PMLP_LEN]; in mlxsw_sp_port_module_map() local
500 mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port); in mlxsw_sp_port_module_map()
501 mlxsw_reg_pmlp_width_set(pmlp_pl, port_mapping->width); in mlxsw_sp_port_module_map()
503 mlxsw_reg_pmlp_module_set(pmlp_pl, i, port_mapping->module); in mlxsw_sp_port_module_map()
504 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, port_mapping->lane + i); /* Rx & Tx */ in mlxsw_sp_port_module_map()
507 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_map()
513 char pmlp_pl[MLXSW_REG_PMLP_LEN]; in mlxsw_sp_port_module_unmap() local
515 mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port); in mlxsw_sp_port_module_unmap()
516 mlxsw_reg_pmlp_width_set(pmlp_pl, 0); in mlxsw_sp_port_module_unmap()
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_unmap()