181 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);  in mlxsw_sp_flow_counter_get()
198 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);  in mlxsw_sp_flow_counter_clear()
274 	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);  in mlxsw_sp_port_vid_stp_set()
284 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);  in mlxsw_sp_base_mac_get()
300 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);  in mlxsw_sp_port_admin_status_set()
311 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);  in mlxsw_sp_port_dev_addr_set()
331 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);  in mlxsw_sp_port_max_mtu_get()
349 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);  in mlxsw_sp_port_mtu_set()
358 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);  in mlxsw_sp_port_swid_set()
367 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);  in mlxsw_sp_port_vp_mode_set()
382 	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);  in mlxsw_sp_port_vid_learning_set()
394 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);  in __mlxsw_sp_port_pvid_set()
404 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);  in mlxsw_sp_port_allow_untagged_set()
439 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);  in mlxsw_sp_port_system_port_mapping_set()
454 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);  in mlxsw_sp_port_module_info_get()
507 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);  in mlxsw_sp_port_module_map()
517 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);  in mlxsw_sp_port_module_unmap()
703 	return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);  in mlxsw_sp_port_get_stats_raw()
835 	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);  in __mlxsw_sp_port_vlan_set()
1027 	err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pplr),  in mlxsw_sp_feature_loopback()
1187 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);  in mlxsw_sp_port_speed_by_width_set()
1197 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);  in mlxsw_sp_port_speed_by_width_set()
1212 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);  in mlxsw_sp_port_speed_get()
1233 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);  in mlxsw_sp_port_ets_set()
1248 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);  in mlxsw_sp_port_ets_maxrate_set()
1263 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);  in mlxsw_sp_port_min_bw_set()
1274 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);  in mlxsw_sp_port_prio_tc_set()
1370 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtctm), qtctm_pl);  in mlxsw_sp_port_tc_mc_mode_set()
2266 		err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);  in mlxsw_sp_cpu_policers_set()
2313 		err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);  in mlxsw_sp_trap_groups_set()
2434 	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);  in mlxsw_sp_lag_init()
2465 	err =  mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);  in mlxsw_sp_basic_trap_groups_set()
2473 	err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);  in mlxsw_sp_basic_trap_groups_set()
2481 	err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);  in mlxsw_sp_basic_trap_groups_set()
2489 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);  in mlxsw_sp_basic_trap_groups_set()
3427 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);  in mlxsw_sp_lag_create()
3435 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);  in mlxsw_sp_lag_destroy()
3446 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);  in mlxsw_sp_lag_col_port_add()
3457 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);  in mlxsw_sp_lag_col_port_remove()
3468 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);  in mlxsw_sp_lag_col_port_enable()
3479 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);  in mlxsw_sp_lag_col_port_disable()
3632 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);  in mlxsw_sp_lag_dist_port_add()
3643 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);  in mlxsw_sp_lag_dist_port_remove()
3718 	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);  in mlxsw_sp_port_stp_set()