1280 				 unsigned int itr)  in ice_adjust_itr_by_size_and_speed()  argument
1284 		itr += DIV_ROUND_UP(17 * (avg_pkt_size + 24),  in ice_adjust_itr_by_size_and_speed()
1288 		itr += DIV_ROUND_UP(34 * (avg_pkt_size + 24),  in ice_adjust_itr_by_size_and_speed()
1292 		itr += DIV_ROUND_UP(43 * (avg_pkt_size + 24),  in ice_adjust_itr_by_size_and_speed()
1296 		itr += DIV_ROUND_UP(68 * (avg_pkt_size + 24),  in ice_adjust_itr_by_size_and_speed()
1300 		itr += DIV_ROUND_UP(85 * (avg_pkt_size + 24),  in ice_adjust_itr_by_size_and_speed()
1305 		itr += DIV_ROUND_UP(170 * (avg_pkt_size + 24),  in ice_adjust_itr_by_size_and_speed()
1310 	if ((itr & ICE_ITR_MASK) > ICE_ITR_ADAPTIVE_MAX_USECS) {  in ice_adjust_itr_by_size_and_speed()
1311 		itr &= ICE_ITR_ADAPTIVE_LATENCY;  in ice_adjust_itr_by_size_and_speed()
1312 		itr += ICE_ITR_ADAPTIVE_MAX_USECS;  in ice_adjust_itr_by_size_and_speed()
1315 	return itr;  in ice_adjust_itr_by_size_and_speed()
1335 	unsigned int packets, bytes, itr;  in ice_update_itr()  local
1348 		itr = rc->target_itr;  in ice_update_itr()
1356 	itr = container_is_rx ?  in ice_update_itr()
1381 			itr = ICE_ITR_ADAPTIVE_LATENCY;  in ice_update_itr()
1410 		itr = rc->target_itr + ICE_ITR_ADAPTIVE_MIN_INC;  in ice_update_itr()
1411 		if ((itr & ICE_ITR_MASK) > ICE_ITR_ADAPTIVE_MAX_USECS) {  in ice_update_itr()
1412 			itr &= ICE_ITR_ADAPTIVE_LATENCY;  in ice_update_itr()
1413 			itr += ICE_ITR_ADAPTIVE_MAX_USECS;  in ice_update_itr()
1419 		itr = min(q_vector->tx.current_itr, q_vector->rx.current_itr);  in ice_update_itr()
1420 		itr &= ICE_ITR_MASK;  in ice_update_itr()
1434 		itr >>= 1;  in ice_update_itr()
1435 		itr &= ICE_ITR_MASK;  in ice_update_itr()
1436 		if (itr < ICE_ITR_ADAPTIVE_MIN_USECS)  in ice_update_itr()
1437 			itr = ICE_ITR_ADAPTIVE_MIN_USECS;  in ice_update_itr()
1448 	itr = ICE_ITR_ADAPTIVE_BULK;  in ice_update_itr()
1453 	itr = ice_adjust_itr_by_size_and_speed(q_vector->vsi->port_info,  in ice_update_itr()
1454 					       bytes / packets, itr);  in ice_update_itr()
1458 	rc->target_itr = itr;  in ice_update_itr()
1472 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)  in ice_buildreg_itr()  argument
1481 	itr &= ICE_ITR_MASK;  in ice_buildreg_itr()
1485 		(itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));  in ice_buildreg_itr()