1009 	unsigned int avg_wire_size, packets, bytes, itr;  in i40e_update_itr()  local
1021 	itr = i40e_container_is_rx(q_vector, rc) ?  in i40e_update_itr()
1040 		itr = rc->target_itr;  in i40e_update_itr()
1055 			itr = I40E_ITR_ADAPTIVE_LATENCY;  in i40e_update_itr()
1084 		itr = rc->target_itr + I40E_ITR_ADAPTIVE_MIN_INC;  in i40e_update_itr()
1085 		if ((itr & I40E_ITR_MASK) > I40E_ITR_ADAPTIVE_MAX_USECS) {  in i40e_update_itr()
1086 			itr &= I40E_ITR_ADAPTIVE_LATENCY;  in i40e_update_itr()
1087 			itr += I40E_ITR_ADAPTIVE_MAX_USECS;  in i40e_update_itr()
1093 		itr = min(q_vector->tx.current_itr, q_vector->rx.current_itr);  in i40e_update_itr()
1094 		itr &= I40E_ITR_MASK;  in i40e_update_itr()
1108 		itr /= 2;  in i40e_update_itr()
1109 		itr &= I40E_ITR_MASK;  in i40e_update_itr()
1110 		if (itr < I40E_ITR_ADAPTIVE_MIN_USECS)  in i40e_update_itr()
1111 			itr = I40E_ITR_ADAPTIVE_MIN_USECS;  in i40e_update_itr()
1122 	itr = I40E_ITR_ADAPTIVE_BULK;  in i40e_update_itr()
1170 	if (itr & I40E_ITR_ADAPTIVE_LATENCY)  in i40e_update_itr()
1180 	itr += DIV_ROUND_UP(avg_wire_size, i40e_itr_divisor(q_vector)) *  in i40e_update_itr()
1183 	if ((itr & I40E_ITR_MASK) > I40E_ITR_ADAPTIVE_MAX_USECS) {  in i40e_update_itr()
1184 		itr &= I40E_ITR_ADAPTIVE_LATENCY;  in i40e_update_itr()
1185 		itr += I40E_ITR_ADAPTIVE_MAX_USECS;  in i40e_update_itr()
1190 	rc->target_itr = itr;  in i40e_update_itr()
2471 static inline u32 i40e_buildreg_itr(const int type, u16 itr)  in i40e_buildreg_itr()  argument
2490 	itr &= I40E_ITR_MASK;  in i40e_buildreg_itr()
2494 	      (itr << (I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT - 1));  in i40e_buildreg_itr()