22 		hw->aq.asq.tail = I40E_VF_ATQT1;  in i40e_adminq_init_regs()
23 		hw->aq.asq.head = I40E_VF_ATQH1;  in i40e_adminq_init_regs()
24 		hw->aq.asq.len  = I40E_VF_ATQLEN1;  in i40e_adminq_init_regs()
25 		hw->aq.asq.bal  = I40E_VF_ATQBAL1;  in i40e_adminq_init_regs()
26 		hw->aq.asq.bah  = I40E_VF_ATQBAH1;  in i40e_adminq_init_regs()
27 		hw->aq.arq.tail = I40E_VF_ARQT1;  in i40e_adminq_init_regs()
28 		hw->aq.arq.head = I40E_VF_ARQH1;  in i40e_adminq_init_regs()
29 		hw->aq.arq.len  = I40E_VF_ARQLEN1;  in i40e_adminq_init_regs()
30 		hw->aq.arq.bal  = I40E_VF_ARQBAL1;  in i40e_adminq_init_regs()
31 		hw->aq.arq.bah  = I40E_VF_ARQBAH1;  in i40e_adminq_init_regs()
33 		hw->aq.asq.tail = I40E_PF_ATQT;  in i40e_adminq_init_regs()
34 		hw->aq.asq.head = I40E_PF_ATQH;  in i40e_adminq_init_regs()
35 		hw->aq.asq.len  = I40E_PF_ATQLEN;  in i40e_adminq_init_regs()
36 		hw->aq.asq.bal  = I40E_PF_ATQBAL;  in i40e_adminq_init_regs()
37 		hw->aq.asq.bah  = I40E_PF_ATQBAH;  in i40e_adminq_init_regs()
38 		hw->aq.arq.tail = I40E_PF_ARQT;  in i40e_adminq_init_regs()
39 		hw->aq.arq.head = I40E_PF_ARQH;  in i40e_adminq_init_regs()
40 		hw->aq.arq.len  = I40E_PF_ARQLEN;  in i40e_adminq_init_regs()
41 		hw->aq.arq.bal  = I40E_PF_ARQBAL;  in i40e_adminq_init_regs()
42 		hw->aq.arq.bah  = I40E_PF_ARQBAH;  in i40e_adminq_init_regs()
54 	ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,  in i40e_alloc_adminq_asq_ring()
56 					 (hw->aq.num_asq_entries *  in i40e_alloc_adminq_asq_ring()
62 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf,  in i40e_alloc_adminq_asq_ring()
63 					  (hw->aq.num_asq_entries *  in i40e_alloc_adminq_asq_ring()
66 		i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_alloc_adminq_asq_ring()
81 	ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,  in i40e_alloc_adminq_arq_ring()
83 					 (hw->aq.num_arq_entries *  in i40e_alloc_adminq_arq_ring()
99 	i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_free_adminq_asq()
111 	i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);  in i40e_free_adminq_arq()
130 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head,  in i40e_alloc_arq_bufs()
131 		(hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem)));  in i40e_alloc_arq_bufs()
134 	hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va;  in i40e_alloc_arq_bufs()
137 	for (i = 0; i < hw->aq.num_arq_entries; i++) {  in i40e_alloc_arq_bufs()
138 		bi = &hw->aq.arq.r.arq_bi[i];  in i40e_alloc_arq_bufs()
141 						 hw->aq.arq_buf_size,  in i40e_alloc_arq_bufs()
147 		desc = I40E_ADMINQ_DESC(hw->aq.arq, i);  in i40e_alloc_arq_bufs()
150 		if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF)  in i40e_alloc_arq_bufs()
175 		i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);  in i40e_alloc_arq_bufs()
176 	i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);  in i40e_alloc_arq_bufs()
192 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head,  in i40e_alloc_asq_bufs()
193 		(hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem)));  in i40e_alloc_asq_bufs()
196 	hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va;  in i40e_alloc_asq_bufs()
199 	for (i = 0; i < hw->aq.num_asq_entries; i++) {  in i40e_alloc_asq_bufs()
200 		bi = &hw->aq.asq.r.asq_bi[i];  in i40e_alloc_asq_bufs()
203 						 hw->aq.asq_buf_size,  in i40e_alloc_asq_bufs()
215 		i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);  in i40e_alloc_asq_bufs()
216 	i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);  in i40e_alloc_asq_bufs()
230 	for (i = 0; i < hw->aq.num_arq_entries; i++)  in i40e_free_arq_bufs()
231 		i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);  in i40e_free_arq_bufs()
234 	i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);  in i40e_free_arq_bufs()
237 	i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);  in i40e_free_arq_bufs()
249 	for (i = 0; i < hw->aq.num_asq_entries; i++)  in i40e_free_asq_bufs()
250 		if (hw->aq.asq.r.asq_bi[i].pa)  in i40e_free_asq_bufs()
251 			i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);  in i40e_free_asq_bufs()
254 	i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf);  in i40e_free_asq_bufs()
257 	i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_free_asq_bufs()
260 	i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);  in i40e_free_asq_bufs()
275 	wr32(hw, hw->aq.asq.head, 0);  in i40e_config_asq_regs()
276 	wr32(hw, hw->aq.asq.tail, 0);  in i40e_config_asq_regs()
279 	wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |  in i40e_config_asq_regs()
281 	wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa));  in i40e_config_asq_regs()
282 	wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa));  in i40e_config_asq_regs()
285 	reg = rd32(hw, hw->aq.asq.bal);  in i40e_config_asq_regs()
286 	if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))  in i40e_config_asq_regs()
304 	wr32(hw, hw->aq.arq.head, 0);  in i40e_config_arq_regs()
305 	wr32(hw, hw->aq.arq.tail, 0);  in i40e_config_arq_regs()
308 	wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |  in i40e_config_arq_regs()
310 	wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa));  in i40e_config_arq_regs()
311 	wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa));  in i40e_config_arq_regs()
314 	wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);  in i40e_config_arq_regs()
317 	reg = rd32(hw, hw->aq.arq.bal);  in i40e_config_arq_regs()
318 	if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa))  in i40e_config_arq_regs()
341 	if (hw->aq.asq.count > 0) {  in i40e_init_asq()
348 	if ((hw->aq.num_asq_entries == 0) ||  in i40e_init_asq()
349 	    (hw->aq.asq_buf_size == 0)) {  in i40e_init_asq()
354 	hw->aq.asq.next_to_use = 0;  in i40e_init_asq()
355 	hw->aq.asq.next_to_clean = 0;  in i40e_init_asq()
373 	hw->aq.asq.count = hw->aq.num_asq_entries;  in i40e_init_asq()
400 	if (hw->aq.arq.count > 0) {  in i40e_init_arq()
407 	if ((hw->aq.num_arq_entries == 0) ||  in i40e_init_arq()
408 	    (hw->aq.arq_buf_size == 0)) {  in i40e_init_arq()
413 	hw->aq.arq.next_to_use = 0;  in i40e_init_arq()
414 	hw->aq.arq.next_to_clean = 0;  in i40e_init_arq()
432 	hw->aq.arq.count = hw->aq.num_arq_entries;  in i40e_init_arq()
452 	mutex_lock(&hw->aq.asq_mutex);  in i40e_shutdown_asq()
454 	if (hw->aq.asq.count == 0) {  in i40e_shutdown_asq()
460 	wr32(hw, hw->aq.asq.head, 0);  in i40e_shutdown_asq()
461 	wr32(hw, hw->aq.asq.tail, 0);  in i40e_shutdown_asq()
462 	wr32(hw, hw->aq.asq.len, 0);  in i40e_shutdown_asq()
463 	wr32(hw, hw->aq.asq.bal, 0);  in i40e_shutdown_asq()
464 	wr32(hw, hw->aq.asq.bah, 0);  in i40e_shutdown_asq()
466 	hw->aq.asq.count = 0; /* to indicate uninitialized queue */  in i40e_shutdown_asq()
472 	mutex_unlock(&hw->aq.asq_mutex);  in i40e_shutdown_asq()
486 	mutex_lock(&hw->aq.arq_mutex);  in i40e_shutdown_arq()
488 	if (hw->aq.arq.count == 0) {  in i40e_shutdown_arq()
494 	wr32(hw, hw->aq.arq.head, 0);  in i40e_shutdown_arq()
495 	wr32(hw, hw->aq.arq.tail, 0);  in i40e_shutdown_arq()
496 	wr32(hw, hw->aq.arq.len, 0);  in i40e_shutdown_arq()
497 	wr32(hw, hw->aq.arq.bal, 0);  in i40e_shutdown_arq()
498 	wr32(hw, hw->aq.arq.bah, 0);  in i40e_shutdown_arq()
500 	hw->aq.arq.count = 0; /* to indicate uninitialized queue */  in i40e_shutdown_arq()
506 	mutex_unlock(&hw->aq.arq_mutex);  in i40e_shutdown_arq()
516 	struct i40e_adminq_info *aq = &hw->aq;  in i40e_set_hw_flags()  local
522 		if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
523 		    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
524 		     aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710)) {  in i40e_set_hw_flags()
535 		if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
536 		    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
537 		     aq->api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722))  in i40e_set_hw_flags()
540 		if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
541 		    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
542 		     aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_X722))  in i40e_set_hw_flags()
545 		if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
546 		    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
547 		     aq->api_min_ver >= I40E_MINOR_VER_FW_REQUEST_FEC_X722))  in i40e_set_hw_flags()
556 	if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
557 	    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
558 	     aq->api_min_ver >= 5))  in i40e_set_hw_flags()
561 	if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
562 	    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
563 	     aq->api_min_ver >= 8)) {  in i40e_set_hw_flags()
568 	if (aq->api_maj_ver > 1 ||  in i40e_set_hw_flags()
569 	    (aq->api_maj_ver == 1 &&  in i40e_set_hw_flags()
570 	     aq->api_min_ver >= 9))  in i40e_set_hw_flags()
593 	if ((hw->aq.num_arq_entries == 0) ||  in i40e_init_adminq()
594 	    (hw->aq.num_asq_entries == 0) ||  in i40e_init_adminq()
595 	    (hw->aq.arq_buf_size == 0) ||  in i40e_init_adminq()
596 	    (hw->aq.asq_buf_size == 0)) {  in i40e_init_adminq()
605 	hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT;  in i40e_init_adminq()
623 							&hw->aq.fw_maj_ver,  in i40e_init_adminq()
624 							&hw->aq.fw_min_ver,  in i40e_init_adminq()
625 							&hw->aq.fw_build,  in i40e_init_adminq()
626 							&hw->aq.api_maj_ver,  in i40e_init_adminq()
627 							&hw->aq.api_min_ver,  in i40e_init_adminq()
657 	    hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&  in i40e_init_adminq()
658 	    hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {  in i40e_init_adminq()
663 	    hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&  in i40e_init_adminq()
664 	    hw->aq.api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722) {  in i40e_init_adminq()
669 	if (hw->aq.api_maj_ver > 1 ||  in i40e_init_adminq()
670 	    (hw->aq.api_maj_ver == 1 &&  in i40e_init_adminq()
671 	     hw->aq.api_min_ver >= 7))  in i40e_init_adminq()
674 	if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {  in i40e_init_adminq()
723 	struct i40e_adminq_ring *asq = &(hw->aq.asq);  in i40e_clean_asq()
731 	while (rd32(hw, hw->aq.asq.head) != ntc) {  in i40e_clean_asq()
733 			   "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));  in i40e_clean_asq()
767 	return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;  in i40e_asq_done()
796 	mutex_lock(&hw->aq.asq_mutex);  in i40e_asq_send_command()
798 	if (hw->aq.asq.count == 0) {  in i40e_asq_send_command()
805 	hw->aq.asq_last_status = I40E_AQ_RC_OK;  in i40e_asq_send_command()
807 	val = rd32(hw, hw->aq.asq.head);  in i40e_asq_send_command()
808 	if (val >= hw->aq.num_asq_entries) {  in i40e_asq_send_command()
815 	details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use);  in i40e_asq_send_command()
837 	if (buff_size > hw->aq.asq_buf_size) {  in i40e_asq_send_command()
870 	desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use);  in i40e_asq_send_command()
877 		dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]);  in i40e_asq_send_command()
895 	(hw->aq.asq.next_to_use)++;  in i40e_asq_send_command()
896 	if (hw->aq.asq.next_to_use == hw->aq.asq.count)  in i40e_asq_send_command()
897 		hw->aq.asq.next_to_use = 0;  in i40e_asq_send_command()
899 		wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use);  in i40e_asq_send_command()
915 		} while (total_delay < hw->aq.asq_cmd_timeout);  in i40e_asq_send_command()
940 		hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval;  in i40e_asq_send_command()
954 		if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) {  in i40e_asq_send_command()
966 	mutex_unlock(&hw->aq.asq_mutex);  in i40e_asq_send_command()
1001 	u16 ntc = hw->aq.arq.next_to_clean;  in i40e_clean_arq_element()
1013 	mutex_lock(&hw->aq.arq_mutex);  in i40e_clean_arq_element()
1015 	if (hw->aq.arq.count == 0) {  in i40e_clean_arq_element()
1023 	ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;  in i40e_clean_arq_element()
1031 	desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);  in i40e_clean_arq_element()
1034 	hw->aq.arq_last_status =  in i40e_clean_arq_element()
1042 			   hw->aq.arq_last_status);  in i40e_clean_arq_element()
1049 		memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va,  in i40e_clean_arq_element()
1054 		      hw->aq.arq_buf_size);  in i40e_clean_arq_element()
1060 	bi = &hw->aq.arq.r.arq_bi[ntc];  in i40e_clean_arq_element()
1064 	if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF)  in i40e_clean_arq_element()
1071 	wr32(hw, hw->aq.arq.tail, ntc);  in i40e_clean_arq_element()
1074 	if (ntc == hw->aq.num_arq_entries)  in i40e_clean_arq_element()
1076 	hw->aq.arq.next_to_clean = ntc;  in i40e_clean_arq_element()
1077 	hw->aq.arq.next_to_use = ntu;  in i40e_clean_arq_element()
1083 		*pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);  in i40e_clean_arq_element()
1085 	mutex_unlock(&hw->aq.arq_mutex);  in i40e_clean_arq_element()
1093 	hw->aq.asq.next_to_use = 0;  in i40e_resume_aq()
1094 	hw->aq.asq.next_to_clean = 0;  in i40e_resume_aq()
1098 	hw->aq.arq.next_to_use = 0;  in i40e_resume_aq()
1099 	hw->aq.arq.next_to_clean = 0;  in i40e_resume_aq()