Lines Matching refs:ew32
651 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
668 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1142 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1148 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1820 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1900 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1944 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1954 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1971 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1974 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
2026 ew32(RFCTL, rfctl); in e1000_configure_msix()
2062 ew32(IVAR, ivar); in e1000_configure_msix()
2067 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_msix()
2262 ew32(IMC, ~0); in e1000_irq_disable()
2264 ew32(EIAC_82574, 0); in e1000_irq_disable()
2286 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); in e1000_irq_enable()
2287 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | in e1000_irq_enable()
2290 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); in e1000_irq_enable()
2292 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
2315 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); in e1000e_get_hw_control()
2318 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); in e1000e_get_hw_control()
2341 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); in e1000e_release_hw_control()
2344 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); in e1000e_release_hw_control()
2668 ew32(ITR, new_itr); in e1000e_write_itr()
2732 ew32(IMS, adapter->rx_ring->ims_val); in e1000e_poll()
2809 ew32(RCTL, rctl); in e1000e_vlan_filter_disable()
2833 ew32(RCTL, rctl); in e1000e_vlan_filter_enable()
2849 ew32(CTRL, ctrl); in e1000e_vlan_strip_disable()
2864 ew32(CTRL, ctrl); in e1000e_vlan_strip_enable()
2938 ew32(MDEF(i), (E1000_MDEF_PORT_623 | in e1000_init_manageability_pt()
2950 ew32(MANC2H, manc2h); in e1000_init_manageability_pt()
2951 ew32(MANC, manc); in e1000_init_manageability_pt()
2970 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); in e1000_configure_tx()
2971 ew32(TDBAH(0), (tdba >> 32)); in e1000_configure_tx()
2972 ew32(TDLEN(0), tdlen); in e1000_configure_tx()
2973 ew32(TDH(0), 0); in e1000_configure_tx()
2974 ew32(TDT(0), 0); in e1000_configure_tx()
2985 ew32(TIDV, adapter->tx_int_delay); in e1000_configure_tx()
2987 ew32(TADV, adapter->tx_abs_int_delay); in e1000_configure_tx()
3004 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
3007 ew32(TXDCTL(1), er32(TXDCTL(0))); in e1000_configure_tx()
3022 ew32(TARC(0), tarc); in e1000_configure_tx()
3029 ew32(TARC(0), tarc); in e1000_configure_tx()
3032 ew32(TARC(1), tarc); in e1000_configure_tx()
3045 ew32(TCTL, tctl); in e1000_configure_tx()
3055 ew32(IOSFPC, reg_val); in e1000_configure_tx()
3064 ew32(TARC(0), reg_val); in e1000_configure_tx()
3160 ew32(RFCTL, rfctl); in e1000_setup_rctl()
3202 ew32(PSRCTL, psrctl); in e1000_setup_rctl()
3222 ew32(RCTL, rctl); in e1000_setup_rctl()
3259 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_configure_rx()
3272 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3273 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3277 ew32(RDTR, adapter->rx_int_delay); in e1000_configure_rx()
3280 ew32(RADV, adapter->rx_abs_int_delay); in e1000_configure_rx()
3287 ew32(IAM, 0xffffffff); in e1000_configure_rx()
3288 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_rx()
3295 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); in e1000_configure_rx()
3296 ew32(RDBAH(0), (rdba >> 32)); in e1000_configure_rx()
3297 ew32(RDLEN(0), rdlen); in e1000_configure_rx()
3298 ew32(RDH(0), 0); in e1000_configure_rx()
3299 ew32(RDT(0), 0); in e1000_configure_rx()
3315 ew32(RXCSUM, rxcsum); in e1000_configure_rx()
3328 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8)); in e1000_configure_rx()
3340 ew32(RCTL, rctl); in e1000_configure_rx()
3430 ew32(RAH(rar_entries), 0); in e1000e_write_uc_addr_list()
3431 ew32(RAL(rar_entries), 0); in e1000e_write_uc_addr_list()
3490 ew32(RCTL, rctl); in e1000e_set_rx_mode()
3507 ew32(RSSRK(i), rss_key[i]); in e1000e_setup_rss_hash()
3511 ew32(RETA(i), 0); in e1000e_setup_rss_hash()
3519 ew32(RXCSUM, rxcsum); in e1000e_setup_rss_hash()
3527 ew32(MRQC, mrqc); in e1000e_setup_rss_hash()
3552 ew32(FEXTNVM7, fextnvm7 | BIT(0)); in e1000e_get_base_timinca()
3747 ew32(TSYNCTXCTL, regval); in e1000e_config_hwtstamp()
3758 ew32(TSYNCRXCTL, regval); in e1000e_config_hwtstamp()
3772 ew32(RXMTRL, rxmtrl); in e1000e_config_hwtstamp()
3779 ew32(RXUDP, rxudp); in e1000e_config_hwtstamp()
3859 ew32(TCTL, tctl | E1000_TCTL_EN); in e1000_flush_tx_ring()
3872 ew32(TDT(0), tx_ring->next_to_use); in e1000_flush_tx_ring()
3888 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3901 ew32(RXDCTL(0), rxdctl); in e1000_flush_rx_ring()
3903 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000_flush_rx_ring()
3906 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3930 ew32(FEXTNVM11, fext_nvm11); in e1000_flush_desc_rings()
3972 ew32(TIMINCA, timinca); in e1000e_systim_reset()
4011 ew32(PBA, pba); in e1000e_reset()
4053 ew32(PBA, pba); in e1000e_reset()
4076 ew32(PBA, pba); in e1000e_reset()
4119 ew32(PBA, pba); in e1000e_reset()
4164 ew32(WUC, 0); in e1000e_reset()
4172 ew32(VET, ETH_P_8021Q); in e1000e_reset()
4234 ew32(FEXTNVM7, reg); in e1000e_reset()
4239 ew32(FEXTNVM9, reg); in e1000e_reset()
4255 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER); in e1000e_trigger_lsc()
4257 ew32(ICS, E1000_ICS_LSC); in e1000e_trigger_lsc()
4284 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4285 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4293 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4294 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4323 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_down()
4331 ew32(TCTL, tctl); in e1000e_down()
4588 ew32(ICS, E1000_ICS_RXSEQ); in e1000_test_msi_interrupt()
5189 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000e_enable_receives()
5330 ew32(TARC(0), tarc0); in e1000_watchdog_task()
5363 ew32(TCTL, tctl); in e1000_watchdog_task()
5451 ew32(ICS, adapter->rx_ring->ims_val); in e1000_watchdog_task()
5453 ew32(ICS, E1000_ICS_RXDMT0); in e1000_watchdog_task()
6330 ew32(WUFC, wufc); in e1000_init_phy_wakeup()
6331 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME | in e1000_init_phy_wakeup()
6402 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6413 ew32(EXTCNF_CTRL, mac_data); in e1000e_s0ix_entry_flow()
6421 ew32(TDFH, 0); in e1000e_s0ix_entry_flow()
6424 ew32(TDFT, 0); in e1000e_s0ix_entry_flow()
6427 ew32(TDFHS, 0); in e1000e_s0ix_entry_flow()
6430 ew32(TDFTS, 0); in e1000e_s0ix_entry_flow()
6433 ew32(TDFPC, 0); in e1000e_s0ix_entry_flow()
6436 ew32(RDFH, 0); in e1000e_s0ix_entry_flow()
6439 ew32(RDFT, 0); in e1000e_s0ix_entry_flow()
6442 ew32(RDFHS, 0); in e1000e_s0ix_entry_flow()
6445 ew32(RDFTS, 0); in e1000e_s0ix_entry_flow()
6448 ew32(RDFPC, 0); in e1000e_s0ix_entry_flow()
6453 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6459 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6464 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6469 ew32(DPGFR, mac_data); in e1000e_s0ix_entry_flow()
6474 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_entry_flow()
6479 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_entry_flow()
6484 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_entry_flow()
6489 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_entry_flow()
6494 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6501 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_entry_flow()
6513 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6518 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6523 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_exit_flow()
6528 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_exit_flow()
6533 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_exit_flow()
6540 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_exit_flow()
6547 ew32(DPGFR, mac_data); in e1000e_s0ix_exit_flow()
6552 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6557 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6564 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_exit_flow()
6590 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6654 ew32(RCTL, rctl); in __e1000_shutdown()
6661 ew32(CTRL, ctrl); in __e1000_shutdown()
6669 ew32(CTRL_EXT, ctrl_ext); in __e1000_shutdown()
6685 ew32(WUFC, wufc); in __e1000_shutdown()
6686 ew32(WUC, E1000_WUC_PME_EN); in __e1000_shutdown()
6689 ew32(WUC, 0); in __e1000_shutdown()
6690 ew32(WUFC, 0); in __e1000_shutdown()
6943 ew32(WUS, ~0); in __e1000_resume()
7193 ew32(WUS, ~0); in e1000_io_slot_reset()