Lines Matching +full:low +full:- +full:power +full:- +full:disable
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
36 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
43 #define E1000_FWSM_ULP_CFG_DONE 0x00000400 /* Low power cfg done */
90 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
103 #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */
104 #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */
141 /* Half-duplex collision counts */
166 /* I218 Ultra Low Power Configuration 1 Register */
176 /* disable clear of sticky ULP on PERST */
178 #define I218_ULP_CONFIG1_DISABLE_SMB_PERST 0x1000 /* Disable on PERST# */
189 /* Strapping Option Register - RO */
198 #define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */
199 #define HV_OEM_BITS_GBE_DIS 0x0040 /* Gigabit Disable */
200 #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
211 /* PHY Power Management Control */
226 /* Low Power Idle GPIO Control */
230 /* PHY Low Power Idle Control */