Lines Matching +full:auto +full:- +full:detects
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
88 * e1000_set_phy_type - Set the phy type member in the hw struct.
93 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
94 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
96 switch (hw->phy_id) { in e1000_set_phy_type()
102 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
105 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
106 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
108 hw->mac_type == e1000_82547_rev_2) in e1000_set_phy_type()
109 hw->phy_type = e1000_phy_igp; in e1000_set_phy_type()
112 hw->phy_type = e1000_phy_8211; in e1000_set_phy_type()
115 hw->phy_type = e1000_phy_8201; in e1000_set_phy_type()
119 hw->phy_type = e1000_phy_undefined; in e1000_set_phy_type()
120 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
127 * e1000_phy_init_script - IGP phy init script - initializes the GbE PHY
134 if (hw->phy_init_script) { in e1000_phy_init_script()
149 switch (hw->mac_type) { in e1000_phy_init_script()
177 if (hw->mac_type == e1000_82547) { in e1000_phy_init_script()
196 coarse -= in e1000_phy_init_script()
198 fine -= IGP01E1000_ANALOG_FUSE_FINE_1; in e1000_phy_init_script()
201 fine -= IGP01E1000_ANALOG_FUSE_FINE_10; in e1000_phy_init_script()
221 * e1000_set_mac_type - Set the mac type member in the hw struct.
226 switch (hw->device_id) { in e1000_set_mac_type()
228 switch (hw->revision_id) { in e1000_set_mac_type()
230 hw->mac_type = e1000_82542_rev2_0; in e1000_set_mac_type()
233 hw->mac_type = e1000_82542_rev2_1; in e1000_set_mac_type()
237 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
242 hw->mac_type = e1000_82543; in e1000_set_mac_type()
248 hw->mac_type = e1000_82544; in e1000_set_mac_type()
255 hw->mac_type = e1000_82540; in e1000_set_mac_type()
259 hw->mac_type = e1000_82545; in e1000_set_mac_type()
264 hw->mac_type = e1000_82545_rev_3; in e1000_set_mac_type()
269 hw->mac_type = e1000_82546; in e1000_set_mac_type()
277 hw->mac_type = e1000_82546_rev_3; in e1000_set_mac_type()
282 hw->mac_type = e1000_82541; in e1000_set_mac_type()
288 hw->mac_type = e1000_82541_rev_2; in e1000_set_mac_type()
292 hw->mac_type = e1000_82547; in e1000_set_mac_type()
295 hw->mac_type = e1000_82547_rev_2; in e1000_set_mac_type()
298 hw->mac_type = e1000_ce4100; in e1000_set_mac_type()
302 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
305 switch (hw->mac_type) { in e1000_set_mac_type()
310 hw->asf_firmware_present = true; in e1000_set_mac_type()
319 if (hw->mac_type == e1000_82543) in e1000_set_mac_type()
320 hw->bad_tx_carr_stats_fd = true; in e1000_set_mac_type()
322 if (hw->mac_type > e1000_82544) in e1000_set_mac_type()
323 hw->has_smbus = true; in e1000_set_mac_type()
329 * e1000_set_media_type - Set media type and TBI compatibility.
336 if (hw->mac_type != e1000_82543) { in e1000_set_media_type()
338 hw->tbi_compatibility_en = false; in e1000_set_media_type()
341 switch (hw->device_id) { in e1000_set_media_type()
344 hw->media_type = e1000_media_type_internal_serdes; in e1000_set_media_type()
347 switch (hw->mac_type) { in e1000_set_media_type()
350 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
353 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
358 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
360 hw->tbi_compatibility_en = false; in e1000_set_media_type()
362 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
370 * e1000_reset_hw - reset the hardware completely
384 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
402 hw->tbi_compatibility_on = false; in e1000_reset_hw()
412 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_reset_hw()
420 * the current PCI configuration. The global reset bit is self- in e1000_reset_hw()
425 switch (hw->mac_type) { in e1000_reset_hw()
432 /* These controllers can't ack the 64-bit write when issuing the in e1000_reset_hw()
433 * reset, so use IO-mapping as a workaround to issue the reset in e1000_reset_hw()
448 /* After MAC reset, force reload of EEPROM to restore power-on settings in e1000_reset_hw()
452 switch (hw->mac_type) { in e1000_reset_hw()
474 /* Auto read done will delay 5ms or poll based on mac type */ in e1000_reset_hw()
482 if (hw->mac_type >= e1000_82540) { in e1000_reset_hw()
488 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_reset_hw()
506 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
507 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) in e1000_reset_hw()
515 * e1000_init_hw - Performs basic configuration of the adapter.
519 * post-reset uninitialized state. Initializes the receive address registers,
521 * configuration and flow control settings. Clears all on-chip counters. Leaves
544 if (hw->mac_type < e1000_82545_rev_3) in e1000_init_hw()
549 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
558 * Receive Address Registers (RARs 0 - 15). in e1000_init_hw()
563 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
567 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) in e1000_init_hw()
587 if (hw->dma_fairness && hw->mac_type <= e1000_82543) { in e1000_init_hw()
592 switch (hw->mac_type) { in e1000_init_hw()
597 /* Workaround for PCI-X problem when BIOS sets MMRBC in e1000_init_hw()
600 if (hw->bus_type == e1000_bus_type_pcix && in e1000_init_hw()
609 /* Set the transmit descriptor write-back policy */ in e1000_init_hw()
610 if (hw->mac_type > e1000_82544) { in e1000_init_hw()
625 if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER || in e1000_init_hw()
626 hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) { in e1000_init_hw()
639 * e1000_adjust_serdes_amplitude - Adjust SERDES output amplitude based on EEPROM setting.
647 if (hw->media_type != e1000_media_type_internal_serdes) in e1000_adjust_serdes_amplitude()
650 switch (hw->mac_type) { in e1000_adjust_serdes_amplitude()
676 * e1000_setup_link - Configures flow control and link settings.
679 * Determines which flow control settings to use. Calls the appropriate media-
694 * disabling auto-negotiation, and the direction of the in e1000_setup_link()
695 * SW defined pins. If there is no SW over-ride of the flow in e1000_setup_link()
696 * control setting, then the variable hw->fc will in e1000_setup_link()
699 if (hw->fc == E1000_FC_DEFAULT) { in e1000_setup_link()
704 return -E1000_ERR_EEPROM; in e1000_setup_link()
707 hw->fc = E1000_FC_NONE; in e1000_setup_link()
710 hw->fc = E1000_FC_TX_PAUSE; in e1000_setup_link()
712 hw->fc = E1000_FC_FULL; in e1000_setup_link()
719 if (hw->mac_type == e1000_82542_rev2_0) in e1000_setup_link()
720 hw->fc &= (~E1000_FC_TX_PAUSE); in e1000_setup_link()
722 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) in e1000_setup_link()
723 hw->fc &= (~E1000_FC_RX_PAUSE); in e1000_setup_link()
725 hw->original_fc = hw->fc; in e1000_setup_link()
727 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc); in e1000_setup_link()
736 if (hw->mac_type == e1000_82543) { in e1000_setup_link()
741 return -E1000_ERR_EEPROM; in e1000_setup_link()
749 ret_val = (hw->media_type == e1000_media_type_copper) ? in e1000_setup_link()
763 ew32(FCTTV, hw->fc_pause_time); in e1000_setup_link()
771 if (!(hw->fc & E1000_FC_TX_PAUSE)) { in e1000_setup_link()
779 if (hw->fc_send_xon) { in e1000_setup_link()
780 ew32(FCRTL, (hw->fc_low_water | E1000_FCRTL_XONE)); in e1000_setup_link()
781 ew32(FCRTH, hw->fc_high_water); in e1000_setup_link()
783 ew32(FCRTL, hw->fc_low_water); in e1000_setup_link()
784 ew32(FCRTH, hw->fc_high_water); in e1000_setup_link()
791 * e1000_setup_fiber_serdes_link - prepare fiber or serdes link
814 if (hw->media_type == e1000_media_type_fiber) in e1000_setup_fiber_serdes_link()
815 signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; in e1000_setup_fiber_serdes_link()
832 * the device accordingly. If auto-negotiation is enabled, then in e1000_setup_fiber_serdes_link()
834 * the Tranmsit Config Word Register (TXCW) and re-start in e1000_setup_fiber_serdes_link()
835 * auto-negotiation. However, if auto-negotiation is disabled, then in e1000_setup_fiber_serdes_link()
847 switch (hw->fc) { in e1000_setup_fiber_serdes_link()
849 /* Flow ctrl is completely disabled by a software over-ride */ in e1000_setup_fiber_serdes_link()
854 * a software over-ride. Since there really isn't a way to in e1000_setup_fiber_serdes_link()
864 * by a software over-ride. in e1000_setup_fiber_serdes_link()
870 * over-ride. in e1000_setup_fiber_serdes_link()
876 return -E1000_ERR_CONFIG; in e1000_setup_fiber_serdes_link()
879 /* Since auto-negotiation is enabled, take the link out of reset (the in e1000_setup_fiber_serdes_link()
881 * will restart auto-negotiation. If auto-negotiation is successful in e1000_setup_fiber_serdes_link()
882 * then the link-up status bit will be set and the flow control enable in e1000_setup_fiber_serdes_link()
885 e_dbg("Auto-negotiation enabled\n"); in e1000_setup_fiber_serdes_link()
891 hw->txcw = txcw; in e1000_setup_fiber_serdes_link()
895 * "Link-Up" indication in the Device Status Register. Time-out if a in e1000_setup_fiber_serdes_link()
896 * link isn't seen in 500 milliseconds seconds (Auto-negotiation should in e1000_setup_fiber_serdes_link()
901 if (hw->media_type == e1000_media_type_internal_serdes || in e1000_setup_fiber_serdes_link()
911 e_dbg("Never got a valid link from auto-neg!!!\n"); in e1000_setup_fiber_serdes_link()
912 hw->autoneg_failed = 1; in e1000_setup_fiber_serdes_link()
916 * communicate with non-autonegotiating link partners. in e1000_setup_fiber_serdes_link()
923 hw->autoneg_failed = 0; in e1000_setup_fiber_serdes_link()
925 hw->autoneg_failed = 0; in e1000_setup_fiber_serdes_link()
935 * e1000_copper_link_rtl_setup - Copper link setup for e1000_phy_rtl series.
959 switch (hw->phy_type) { in gbe_dhg_phy_setup()
996 * e1000_copper_link_preconfig - early configuration for copper
1012 if (hw->mac_type > e1000_82543) { in e1000_copper_link_preconfig()
1031 e_dbg("Phy ID = %x\n", hw->phy_id); in e1000_copper_link_preconfig()
1038 if ((hw->mac_type == e1000_82545_rev_3) || in e1000_copper_link_preconfig()
1039 (hw->mac_type == e1000_82546_rev_3)) { in e1000_copper_link_preconfig()
1047 if (hw->mac_type <= e1000_82543 || in e1000_copper_link_preconfig()
1048 hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || in e1000_copper_link_preconfig()
1049 hw->mac_type == e1000_82541_rev_2 || in e1000_copper_link_preconfig()
1050 hw->mac_type == e1000_82547_rev_2) in e1000_copper_link_preconfig()
1051 hw->phy_reset_disable = false; in e1000_copper_link_preconfig()
1057 * e1000_copper_link_igp_setup - Copper link setup for e1000_phy_igp series.
1066 if (hw->phy_reset_disable) in e1000_copper_link_igp_setup()
1084 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_igp_setup()
1093 /* Configure mdi-mdix settings */ in e1000_copper_link_igp_setup()
1098 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_copper_link_igp_setup()
1099 hw->dsp_config_state = e1000_dsp_config_disabled; in e1000_copper_link_igp_setup()
1104 hw->mdix = 1; in e1000_copper_link_igp_setup()
1107 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
1110 switch (hw->mdix) { in e1000_copper_link_igp_setup()
1127 /* set auto-master slave resolution settings */ in e1000_copper_link_igp_setup()
1128 if (hw->autoneg) { in e1000_copper_link_igp_setup()
1129 e1000_ms_type phy_ms_setting = hw->master_slave; in e1000_copper_link_igp_setup()
1131 if (hw->ffe_config_state == e1000_ffe_config_active) in e1000_copper_link_igp_setup()
1132 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_copper_link_igp_setup()
1134 if (hw->dsp_config_state == e1000_dsp_config_activated) in e1000_copper_link_igp_setup()
1135 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
1138 * should disable SmartSpeed and enable Auto MasterSlave in e1000_copper_link_igp_setup()
1141 if (hw->autoneg_advertised == ADVERTISE_1000_FULL) { in e1000_copper_link_igp_setup()
1154 /* Set auto Master/Slave resolution process */ in e1000_copper_link_igp_setup()
1171 hw->original_master_slave = (phy_data & CR_1000T_MS_ENABLE) ? in e1000_copper_link_igp_setup()
1198 * e1000_copper_link_mgp_setup - Copper link setup for e1000_phy_m88 series.
1206 if (hw->phy_reset_disable) in e1000_copper_link_mgp_setup()
1209 /* Enable CRS on TX. This must be set for half-duplex operation. */ in e1000_copper_link_mgp_setup()
1217 * MDI/MDI-X = 0 (default) in e1000_copper_link_mgp_setup()
1218 * 0 - Auto for all speeds in e1000_copper_link_mgp_setup()
1219 * 1 - MDI mode in e1000_copper_link_mgp_setup()
1220 * 2 - MDI-X mode in e1000_copper_link_mgp_setup()
1221 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in e1000_copper_link_mgp_setup()
1225 switch (hw->mdix) { in e1000_copper_link_mgp_setup()
1244 * 0 - Disabled in e1000_copper_link_mgp_setup()
1245 * 1 - Enabled in e1000_copper_link_mgp_setup()
1248 if (hw->disable_polarity_correction == 1) in e1000_copper_link_mgp_setup()
1254 if (hw->phy_revision < M88E1011_I_REV_4) { in e1000_copper_link_mgp_setup()
1266 if ((hw->phy_revision == E1000_REVISION_2) && in e1000_copper_link_mgp_setup()
1267 (hw->phy_id == M88E1111_I_PHY_ID)) { in e1000_copper_link_mgp_setup()
1301 * e1000_copper_link_autoneg - setup auto-neg
1304 * Setup auto-negotiation and flow control advertisements,
1305 * and then perform auto-negotiation.
1312 /* Perform some bounds checking on the hw->autoneg_advertised in e1000_copper_link_autoneg()
1315 hw->autoneg_advertised &= AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
1320 if (hw->autoneg_advertised == 0) in e1000_copper_link_autoneg()
1321 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
1324 if (hw->phy_type == e1000_phy_8201) in e1000_copper_link_autoneg()
1325 hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL; in e1000_copper_link_autoneg()
1327 e_dbg("Reconfiguring auto-neg advertisement params\n"); in e1000_copper_link_autoneg()
1330 e_dbg("Error Setting up Auto-Negotiation\n"); in e1000_copper_link_autoneg()
1333 e_dbg("Restarting Auto-Neg\n"); in e1000_copper_link_autoneg()
1335 /* Restart auto-negotiation by setting the Auto Neg Enable bit and in e1000_copper_link_autoneg()
1336 * the Auto Neg Restart bit in the PHY control register. in e1000_copper_link_autoneg()
1347 /* Does the user want to wait for Auto-Neg to complete here, or in e1000_copper_link_autoneg()
1350 if (hw->wait_autoneg_complete) { in e1000_copper_link_autoneg()
1359 hw->get_link_status = true; in e1000_copper_link_autoneg()
1365 * e1000_copper_link_postconfig - post link setup
1381 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) { in e1000_copper_link_postconfig()
1397 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_postconfig()
1409 * e1000_setup_copper_link - phy/speed/duplex setting
1412 * Detects which PHY is present and sets up the speed and duplex
1425 if (hw->phy_type == e1000_phy_igp) { in e1000_setup_copper_link()
1429 } else if (hw->phy_type == e1000_phy_m88) { in e1000_setup_copper_link()
1441 if (hw->autoneg) { in e1000_setup_copper_link()
1488 * e1000_phy_setup_autoneg - phy settings
1499 /* Read the MII Auto-Neg Advertisement Register (Address 4). */ in e1000_phy_setup_autoneg()
1504 /* Read the MII 1000Base-T Control Register (Address 9). */ in e1000_phy_setup_autoneg()
1508 else if (hw->phy_type == e1000_phy_8201) in e1000_phy_setup_autoneg()
1518 /* First we clear all the 10/100 mb speed bits in the Auto-Neg in e1000_phy_setup_autoneg()
1520 * the 1000Base-T Control Register (Address 9). in e1000_phy_setup_autoneg()
1525 e_dbg("autoneg_advertised %x\n", hw->autoneg_advertised); in e1000_phy_setup_autoneg()
1528 if (hw->autoneg_advertised & ADVERTISE_10_HALF) { in e1000_phy_setup_autoneg()
1534 if (hw->autoneg_advertised & ADVERTISE_10_FULL) { in e1000_phy_setup_autoneg()
1540 if (hw->autoneg_advertised & ADVERTISE_100_HALF) { in e1000_phy_setup_autoneg()
1546 if (hw->autoneg_advertised & ADVERTISE_100_FULL) { in e1000_phy_setup_autoneg()
1552 if (hw->autoneg_advertised & ADVERTISE_1000_HALF) { in e1000_phy_setup_autoneg()
1558 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) { in e1000_phy_setup_autoneg()
1565 * auto-negotiation is enabled, then software will have to set the in e1000_phy_setup_autoneg()
1566 * "PAUSE" bits to the correct value in the Auto-Negotiation in e1000_phy_setup_autoneg()
1567 * Advertisement Register (PHY_AUTONEG_ADV) and re-start in e1000_phy_setup_autoneg()
1568 * auto-negotiation. in e1000_phy_setup_autoneg()
1580 switch (hw->fc) { in e1000_phy_setup_autoneg()
1583 * software over-ride. in e1000_phy_setup_autoneg()
1589 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
1601 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
1608 * over-ride. in e1000_phy_setup_autoneg()
1614 return -E1000_ERR_CONFIG; in e1000_phy_setup_autoneg()
1621 e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
1623 if (hw->phy_type == e1000_phy_8201) { in e1000_phy_setup_autoneg()
1636 * e1000_phy_force_speed_duplex - force link settings
1639 * Force PHY speed and duplex settings to hw->forced_speed_duplex
1651 hw->fc = E1000_FC_NONE; in e1000_phy_force_speed_duplex()
1653 e_dbg("hw->fc = %d\n", hw->fc); in e1000_phy_force_speed_duplex()
1662 /* Clear the Auto Speed Detect Enable bit. */ in e1000_phy_force_speed_duplex()
1675 if (hw->forced_speed_duplex == e1000_100_full || in e1000_phy_force_speed_duplex()
1676 hw->forced_speed_duplex == e1000_10_full) { in e1000_phy_force_speed_duplex()
1693 if (hw->forced_speed_duplex == e1000_100_full || in e1000_phy_force_speed_duplex()
1694 hw->forced_speed_duplex == e1000_100_half) { in e1000_phy_force_speed_duplex()
1713 if (hw->phy_type == e1000_phy_m88) { in e1000_phy_force_speed_duplex()
1719 /* Clear Auto-Crossover to force MDI manually. M88E1000 requires in e1000_phy_force_speed_duplex()
1733 /* Disable MDI-X support for 10/100 */ in e1000_phy_force_speed_duplex()
1735 /* Clear Auto-Crossover to force MDI manually. IGP requires MDI in e1000_phy_force_speed_duplex()
1760 * Since we are forcing speed and duplex, Auto-Neg is not enabled. in e1000_phy_force_speed_duplex()
1766 if (hw->wait_autoneg_complete) { in e1000_phy_force_speed_duplex()
1772 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_phy_force_speed_duplex()
1773 /* Read the MII Status Register and wait for Auto-Neg in e1000_phy_force_speed_duplex()
1790 if ((i == 0) && (hw->phy_type == e1000_phy_m88)) { in e1000_phy_force_speed_duplex()
1800 /* This loop will early-out if the link condition has been in e1000_phy_force_speed_duplex()
1803 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_phy_force_speed_duplex()
1807 /* Read the MII Status Register and wait for Auto-Neg in e1000_phy_force_speed_duplex()
1822 if (hw->phy_type == e1000_phy_m88) { in e1000_phy_force_speed_duplex()
1823 /* Because we reset the PHY above, we need to re-force TX_CLK in in e1000_phy_force_speed_duplex()
1856 if ((hw->mac_type == e1000_82544 || in e1000_phy_force_speed_duplex()
1857 hw->mac_type == e1000_82543) && in e1000_phy_force_speed_duplex()
1858 (!hw->autoneg) && in e1000_phy_force_speed_duplex()
1859 (hw->forced_speed_duplex == e1000_10_full || in e1000_phy_force_speed_duplex()
1860 hw->forced_speed_duplex == e1000_10_half)) { in e1000_phy_force_speed_duplex()
1870 * e1000_config_collision_dist - set collision distance register
1881 if (hw->mac_type < e1000_82543) in e1000_config_collision_dist()
1896 * e1000_config_mac_to_phy - sync phy and mac settings
1909 /* 82544 or newer MAC, Auto Speed Detection takes care of in e1000_config_mac_to_phy()
1912 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) in e1000_config_mac_to_phy()
1922 switch (hw->phy_type) { in e1000_config_mac_to_phy()
1972 * e1000_force_mac_fc - force flow control settings
1989 /* Because we didn't get link via the internal auto-negotiation in e1000_force_mac_fc()
1991 * auto-neg), we have to manually enable/disable transmit an in e1000_force_mac_fc()
1995 * according to the "hw->fc" parameter. in e1000_force_mac_fc()
2007 switch (hw->fc) { in e1000_force_mac_fc()
2024 return -E1000_ERR_CONFIG; in e1000_force_mac_fc()
2028 if (hw->mac_type == e1000_82542_rev2_0) in e1000_force_mac_fc()
2036 * e1000_config_fc_after_link_up - configure flow control after autoneg
2055 /* Check for the case where we have fiber media and auto-neg failed in e1000_config_fc_after_link_up()
2059 if (((hw->media_type == e1000_media_type_fiber) && in e1000_config_fc_after_link_up()
2060 (hw->autoneg_failed)) || in e1000_config_fc_after_link_up()
2061 ((hw->media_type == e1000_media_type_internal_serdes) && in e1000_config_fc_after_link_up()
2062 (hw->autoneg_failed)) || in e1000_config_fc_after_link_up()
2063 ((hw->media_type == e1000_media_type_copper) && in e1000_config_fc_after_link_up()
2064 (!hw->autoneg))) { in e1000_config_fc_after_link_up()
2072 /* Check for the case where we have copper media and auto-neg is in e1000_config_fc_after_link_up()
2073 * enabled. In this case, we need to check and see if Auto-Neg in e1000_config_fc_after_link_up()
2077 if ((hw->media_type == e1000_media_type_copper) && hw->autoneg) { in e1000_config_fc_after_link_up()
2091 * read both the Auto Negotiation Advertisement Register in e1000_config_fc_after_link_up()
2105 /* Two bits in the Auto Negotiation Advertisement in e1000_config_fc_after_link_up()
2106 * Register (Address 4) and two bits in the Auto in e1000_config_fc_after_link_up()
2117 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2136 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2149 if (hw->original_fc == E1000_FC_FULL) { in e1000_config_fc_after_link_up()
2150 hw->fc = E1000_FC_FULL; in e1000_config_fc_after_link_up()
2153 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2162 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2170 hw->fc = E1000_FC_TX_PAUSE; in e1000_config_fc_after_link_up()
2178 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2186 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2212 else if ((hw->original_fc == E1000_FC_NONE || in e1000_config_fc_after_link_up()
2213 hw->original_fc == E1000_FC_TX_PAUSE) || in e1000_config_fc_after_link_up()
2214 hw->fc_strict_ieee) { in e1000_config_fc_after_link_up()
2215 hw->fc = E1000_FC_NONE; in e1000_config_fc_after_link_up()
2218 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2223 /* Now we need to do one last check... If we auto- in e1000_config_fc_after_link_up()
2236 hw->fc = E1000_FC_NONE; in e1000_config_fc_after_link_up()
2249 ("Copper PHY and Auto Neg has not completed.\n"); in e1000_config_fc_after_link_up()
2256 * e1000_check_for_serdes_link_generic - Check for link (Serdes)
2273 /* If we don't have link (auto-negotiation failed or link partner in e1000_check_for_serdes_link_generic()
2274 * cannot auto-negotiate), and our link partner is not trying to in e1000_check_for_serdes_link_generic()
2275 * auto-negotiate with us (we are receiving idles or data), in e1000_check_for_serdes_link_generic()
2276 * we need to force link up. We also need to give auto-negotiation in e1000_check_for_serdes_link_generic()
2281 if (hw->autoneg_failed == 0) { in e1000_check_for_serdes_link_generic()
2282 hw->autoneg_failed = 1; in e1000_check_for_serdes_link_generic()
2287 /* Disable auto-negotiation in the TXCW register */ in e1000_check_for_serdes_link_generic()
2288 ew32(TXCW, (hw->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_serdes_link_generic()
2290 /* Force link-up and also force full-duplex. */ in e1000_check_for_serdes_link_generic()
2303 * sets, re-enable auto-negotiation in the TXCW register in e1000_check_for_serdes_link_generic()
2305 * in an attempt to auto-negotiate with our link partner. in e1000_check_for_serdes_link_generic()
2308 ew32(TXCW, hw->txcw); in e1000_check_for_serdes_link_generic()
2311 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2313 /* If we force link for non-auto-negotiation switch, check in e1000_check_for_serdes_link_generic()
2322 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2323 e_dbg("SERDES: Link up - forced.\n"); in e1000_check_for_serdes_link_generic()
2326 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2327 e_dbg("SERDES: Link down - force failed.\n"); in e1000_check_for_serdes_link_generic()
2339 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2340 e_dbg("SERDES: Link up - autoneg " in e1000_check_for_serdes_link_generic()
2343 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2344 e_dbg("SERDES: Link down - invalid" in e1000_check_for_serdes_link_generic()
2348 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2349 e_dbg("SERDES: Link down - no sync.\n"); in e1000_check_for_serdes_link_generic()
2352 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2353 e_dbg("SERDES: Link down - autoneg failed\n"); in e1000_check_for_serdes_link_generic()
2383 if ((hw->media_type == e1000_media_type_fiber) || in e1000_check_for_link()
2384 (hw->media_type == e1000_media_type_internal_serdes)) { in e1000_check_for_link()
2387 if (hw->media_type == e1000_media_type_fiber) { in e1000_check_for_link()
2389 hw->get_link_status = false; in e1000_check_for_link()
2394 * registers to see if Auto-Neg has completed and/or if our link in e1000_check_for_link()
2399 if ((hw->media_type == e1000_media_type_copper) && hw->get_link_status) { in e1000_check_for_link()
2413 hw->get_link_status = false; in e1000_check_for_link()
2415 * immediately after link-up in e1000_check_for_link()
2428 if ((hw->mac_type == e1000_82544 || in e1000_check_for_link()
2429 hw->mac_type == e1000_82543) && in e1000_check_for_link()
2430 (!hw->autoneg) && in e1000_check_for_link()
2431 (hw->forced_speed_duplex == e1000_10_full || in e1000_check_for_link()
2432 hw->forced_speed_duplex == e1000_10_half)) { in e1000_check_for_link()
2450 if (!hw->autoneg) in e1000_check_for_link()
2451 return -E1000_ERR_CONFIG; in e1000_check_for_link()
2456 /* We have a M88E1000 PHY and Auto-Neg is enabled. If we in e1000_check_for_link()
2457 * have Si on board that is 82544 or newer, Auto in e1000_check_for_link()
2464 if ((hw->mac_type >= e1000_82544) && in e1000_check_for_link()
2465 (hw->mac_type != e1000_ce4100)) in e1000_check_for_link()
2476 /* Configure Flow Control now that Auto-Neg has completed. in e1000_check_for_link()
2478 * because we may have had to re-autoneg with a different link in e1000_check_for_link()
2488 * auto-negotiated link. These are conditions for checking the in e1000_check_for_link()
2495 if (hw->tbi_compatibility_en) { in e1000_check_for_link()
2510 if (hw->tbi_compatibility_on) { in e1000_check_for_link()
2517 hw->tbi_compatibility_on = false; in e1000_check_for_link()
2526 if (!hw->tbi_compatibility_on) { in e1000_check_for_link()
2527 hw->tbi_compatibility_on = true; in e1000_check_for_link()
2536 if ((hw->media_type == e1000_media_type_fiber) || in e1000_check_for_link()
2537 (hw->media_type == e1000_media_type_internal_serdes)) in e1000_check_for_link()
2549 * Detects the current speed and duplex settings of the hardware.
2557 if (hw->mac_type >= e1000_82543) { in e1000_get_speed_and_duplex()
2587 if (hw->phy_type == e1000_phy_igp && hw->speed_downgraded) { in e1000_get_speed_and_duplex()
2622 e_dbg("Waiting for Auto-Neg to complete.\n"); in e1000_wait_autoneg()
2625 for (i = PHY_AUTO_NEG_TIME; i > 0; i--) { in e1000_wait_autoneg()
2626 /* Read the MII Status Register and wait for Auto-Neg in e1000_wait_autoneg()
2644 * e1000_raise_mdi_clk - Raises the Management Data Clock
2659 * e1000_lower_mdi_clk - Lowers the Management Data Clock
2674 * e1000_shift_out_mdi_bits - Shifts data bits out to the PHY
2691 mask <<= (count - 1); in e1000_shift_out_mdi_bits()
2722 * e1000_shift_in_mdi_bits - Shifts data bits in from the PHY
2775 * e1000_read_phy_reg - read a phy register
2790 if ((hw->phy_type == e1000_phy_igp) && in e1000_read_phy_reg()
2811 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; in e1000_read_phy_reg_ex()
2815 return -E1000_ERR_PARAM; in e1000_read_phy_reg_ex()
2818 if (hw->mac_type > e1000_82543) { in e1000_read_phy_reg_ex()
2819 /* Set up Op-code, Phy Address, and register address in the MDI in e1000_read_phy_reg_ex()
2823 if (hw->mac_type == e1000_ce4100) { in e1000_read_phy_reg_ex()
2843 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2849 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2870 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2874 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2903 * need to "shift in" the 16-bit value (18 total bits) of the in e1000_read_phy_reg_ex()
2912 * e1000_write_phy_reg - write a phy register
2927 if ((hw->phy_type == e1000_phy_igp) && in e1000_write_phy_reg()
2949 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; in e1000_write_phy_reg_ex()
2953 return -E1000_ERR_PARAM; in e1000_write_phy_reg_ex()
2956 if (hw->mac_type > e1000_82543) { in e1000_write_phy_reg_ex()
2957 /* Set up Op-code, Phy Address, register address, and data in e1000_write_phy_reg_ex()
2962 if (hw->mac_type == e1000_ce4100) { in e1000_write_phy_reg_ex()
2982 return -E1000_ERR_PHY; in e1000_write_phy_reg_ex()
3003 return -E1000_ERR_PHY; in e1000_write_phy_reg_ex()
3032 * e1000_phy_hw_reset - reset the phy, hardware style
3035 * Returns the PHY to the power-on reset state
3044 if (hw->mac_type > e1000_82543) { in e1000_phy_hw_reset()
3048 * and de-assert. in e1000_phy_hw_reset()
3076 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_phy_hw_reset()
3089 * e1000_phy_reset - reset the phy to commit settings
3100 switch (hw->phy_type) { in e1000_phy_reset()
3120 if (hw->phy_type == e1000_phy_igp) in e1000_phy_reset()
3127 * e1000_detect_gig_phy - check the phy type
3138 if (hw->phy_id != 0) in e1000_detect_gig_phy()
3146 hw->phy_id = (u32)(phy_id_high << 16); in e1000_detect_gig_phy()
3152 hw->phy_id |= (u32)(phy_id_low & PHY_REVISION_MASK); in e1000_detect_gig_phy()
3153 hw->phy_revision = (u32)phy_id_low & ~PHY_REVISION_MASK; in e1000_detect_gig_phy()
3155 switch (hw->mac_type) { in e1000_detect_gig_phy()
3157 if (hw->phy_id == M88E1000_E_PHY_ID) in e1000_detect_gig_phy()
3161 if (hw->phy_id == M88E1000_I_PHY_ID) in e1000_detect_gig_phy()
3169 if (hw->phy_id == M88E1011_I_PHY_ID) in e1000_detect_gig_phy()
3173 if ((hw->phy_id == RTL8211B_PHY_ID) || in e1000_detect_gig_phy()
3174 (hw->phy_id == RTL8201N_PHY_ID) || in e1000_detect_gig_phy()
3175 (hw->phy_id == M88E1118_E_PHY_ID)) in e1000_detect_gig_phy()
3182 if (hw->phy_id == IGP01E1000_I_PHY_ID) in e1000_detect_gig_phy()
3186 e_dbg("Invalid MAC type %d\n", hw->mac_type); in e1000_detect_gig_phy()
3187 return -E1000_ERR_CONFIG; in e1000_detect_gig_phy()
3192 e_dbg("PHY ID 0x%X detected\n", hw->phy_id); in e1000_detect_gig_phy()
3195 e_dbg("Invalid PHY ID 0x%X\n", hw->phy_id); in e1000_detect_gig_phy()
3196 return -E1000_ERR_PHY; in e1000_detect_gig_phy()
3200 * e1000_phy_reset_dsp - reset DSP
3226 * e1000_phy_igp_get_info - get igp specific registers
3240 * and it stored in the hw->speed_downgraded parameter. in e1000_phy_igp_get_info()
3242 phy_info->downshift = (e1000_downshift) hw->speed_downgraded; in e1000_phy_igp_get_info()
3245 phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_normal; in e1000_phy_igp_get_info()
3248 phy_info->polarity_correction = e1000_polarity_reversal_enabled; in e1000_phy_igp_get_info()
3255 phy_info->cable_polarity = polarity; in e1000_phy_igp_get_info()
3261 phy_info->mdix_mode = in e1000_phy_igp_get_info()
3274 phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >> in e1000_phy_igp_get_info()
3277 phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >> in e1000_phy_igp_get_info()
3290 phy_info->cable_length = e1000_cable_length_50; in e1000_phy_igp_get_info()
3292 phy_info->cable_length = e1000_cable_length_50_80; in e1000_phy_igp_get_info()
3294 phy_info->cable_length = e1000_cable_length_80_110; in e1000_phy_igp_get_info()
3296 phy_info->cable_length = e1000_cable_length_110_140; in e1000_phy_igp_get_info()
3298 phy_info->cable_length = e1000_cable_length_140; in e1000_phy_igp_get_info()
3305 * e1000_phy_m88_get_info - get m88 specific registers
3319 * and it stored in the hw->speed_downgraded parameter. in e1000_phy_m88_get_info()
3321 phy_info->downshift = (e1000_downshift) hw->speed_downgraded; in e1000_phy_m88_get_info()
3327 phy_info->extended_10bt_distance = in e1000_phy_m88_get_info()
3333 phy_info->polarity_correction = in e1000_phy_m88_get_info()
3342 phy_info->cable_polarity = polarity; in e1000_phy_m88_get_info()
3348 phy_info->mdix_mode = in e1000_phy_m88_get_info()
3356 phy_info->cable_length = in e1000_phy_m88_get_info()
3365 phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >> in e1000_phy_m88_get_info()
3368 phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >> in e1000_phy_m88_get_info()
3377 * e1000_phy_get_info - request phy info
3388 phy_info->cable_length = e1000_cable_length_undefined; in e1000_phy_get_info()
3389 phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_undefined; in e1000_phy_get_info()
3390 phy_info->cable_polarity = e1000_rev_polarity_undefined; in e1000_phy_get_info()
3391 phy_info->downshift = e1000_downshift_undefined; in e1000_phy_get_info()
3392 phy_info->polarity_correction = e1000_polarity_reversal_undefined; in e1000_phy_get_info()
3393 phy_info->mdix_mode = e1000_auto_x_mode_undefined; in e1000_phy_get_info()
3394 phy_info->local_rx = e1000_1000t_rx_status_undefined; in e1000_phy_get_info()
3395 phy_info->remote_rx = e1000_1000t_rx_status_undefined; in e1000_phy_get_info()
3397 if (hw->media_type != e1000_media_type_copper) { in e1000_phy_get_info()
3399 return -E1000_ERR_CONFIG; in e1000_phy_get_info()
3412 return -E1000_ERR_CONFIG; in e1000_phy_get_info()
3415 if (hw->phy_type == e1000_phy_igp) in e1000_phy_get_info()
3417 else if ((hw->phy_type == e1000_phy_8211) || in e1000_phy_get_info()
3418 (hw->phy_type == e1000_phy_8201)) in e1000_phy_get_info()
3426 if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) { in e1000_validate_mdi_setting()
3428 hw->mdix = 1; in e1000_validate_mdi_setting()
3429 return -E1000_ERR_CONFIG; in e1000_validate_mdi_setting()
3435 * e1000_init_eeprom_params - initialize sw eeprom vars
3443 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_init_eeprom_params()
3448 switch (hw->mac_type) { in e1000_init_eeprom_params()
3453 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3454 eeprom->word_size = 64; in e1000_init_eeprom_params()
3455 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3456 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3457 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3464 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3465 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3466 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3468 eeprom->word_size = 256; in e1000_init_eeprom_params()
3469 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3471 eeprom->word_size = 64; in e1000_init_eeprom_params()
3472 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3480 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
3481 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
3482 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
3484 eeprom->page_size = 32; in e1000_init_eeprom_params()
3485 eeprom->address_bits = 16; in e1000_init_eeprom_params()
3487 eeprom->page_size = 8; in e1000_init_eeprom_params()
3488 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3491 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3492 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3493 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3495 eeprom->word_size = 256; in e1000_init_eeprom_params()
3496 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3498 eeprom->word_size = 64; in e1000_init_eeprom_params()
3499 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3507 if (eeprom->type == e1000_eeprom_spi) { in e1000_init_eeprom_params()
3512 eeprom->word_size = 64; in e1000_init_eeprom_params()
3525 eeprom->word_size = 1 << (eeprom_size + EEPROM_WORD_SIZE_SHIFT); in e1000_init_eeprom_params()
3531 * e1000_raise_ee_clk - Raises the EEPROM's clock input.
3543 udelay(hw->eeprom.delay_usec); in e1000_raise_ee_clk()
3547 * e1000_lower_ee_clk - Lowers the EEPROM's clock input.
3559 udelay(hw->eeprom.delay_usec); in e1000_lower_ee_clk()
3563 * e1000_shift_out_ee_bits - Shift data bits out to the EEPROM.
3570 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_shift_out_ee_bits()
3578 mask = 0x01 << (count - 1); in e1000_shift_out_ee_bits()
3580 if (eeprom->type == e1000_eeprom_microwire) in e1000_shift_out_ee_bits()
3582 else if (eeprom->type == e1000_eeprom_spi) in e1000_shift_out_ee_bits()
3600 udelay(eeprom->delay_usec); in e1000_shift_out_ee_bits()
3615 * e1000_shift_in_ee_bits - Shift data bits in from the EEPROM
3654 * e1000_acquire_eeprom - Prepares EEPROM for access
3662 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_acquire_eeprom()
3668 if (hw->mac_type > e1000_82544) { in e1000_acquire_eeprom()
3682 return -E1000_ERR_EEPROM; in e1000_acquire_eeprom()
3688 if (eeprom->type == e1000_eeprom_microwire) { in e1000_acquire_eeprom()
3696 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_acquire_eeprom()
3708 * e1000_standby_eeprom - Returns EEPROM to a "standby" state
3713 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_standby_eeprom()
3718 if (eeprom->type == e1000_eeprom_microwire) { in e1000_standby_eeprom()
3722 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3728 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3734 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3740 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3741 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_standby_eeprom()
3746 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3750 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3755 * e1000_release_eeprom - drop chip select
3766 if (hw->eeprom.type == e1000_eeprom_spi) { in e1000_release_eeprom()
3773 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3774 } else if (hw->eeprom.type == e1000_eeprom_microwire) { in e1000_release_eeprom()
3777 /* CS on Microwire is active-high */ in e1000_release_eeprom()
3786 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3792 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3796 if (hw->mac_type > e1000_82544) { in e1000_release_eeprom()
3803 * e1000_spi_eeprom_ready - Reads a 16 bit word from the EEPROM.
3819 hw->eeprom.opcode_bits); in e1000_spi_eeprom_ready()
3830 /* ATMEL SPI write time could vary from 0-20mSec on 3.3V devices (and in e1000_spi_eeprom_ready()
3831 * only 0-5mSec on 5V devices) in e1000_spi_eeprom_ready()
3835 return -E1000_ERR_EEPROM; in e1000_spi_eeprom_ready()
3842 * e1000_read_eeprom - Reads a 16 bit word from the EEPROM.
3861 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_do_read_eeprom()
3864 if (hw->mac_type == e1000_ce4100) { in e1000_do_read_eeprom()
3873 if ((offset >= eeprom->word_size) || in e1000_do_read_eeprom()
3874 (words > eeprom->word_size - offset) || in e1000_do_read_eeprom()
3877 "size = %d\n", offset, eeprom->word_size); in e1000_do_read_eeprom()
3878 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3881 /* EEPROM's that don't use EERD to read require us to bit-bang the SPI in e1000_do_read_eeprom()
3885 /* Prepare the EEPROM for bit-bang reading */ in e1000_do_read_eeprom()
3887 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3889 /* Set up the SPI or Microwire EEPROM for bit-bang reading. We have in e1000_do_read_eeprom()
3892 if (eeprom->type == e1000_eeprom_spi) { in e1000_do_read_eeprom()
3898 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3906 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_do_read_eeprom()
3910 e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits); in e1000_do_read_eeprom()
3912 eeprom->address_bits); in e1000_do_read_eeprom()
3916 * overhead of eeprom setup and tear-down. The address counter in e1000_do_read_eeprom()
3925 } else if (eeprom->type == e1000_eeprom_microwire) { in e1000_do_read_eeprom()
3930 eeprom->opcode_bits); in e1000_do_read_eeprom()
3932 eeprom->address_bits); in e1000_do_read_eeprom()
3935 * overhead of eeprom setup and tear-down. in e1000_do_read_eeprom()
3950 * e1000_validate_eeprom_checksum - Verifies that the EEPROM has a valid checksum
3965 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
3972 if ((hw->subsystem_vendor_id == 0x103C) && (eeprom_data == 0x16d6)) in e1000_validate_eeprom_checksum()
3980 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
3985 * e1000_update_eeprom_checksum - Calculates/writes the EEPROM checksum
3999 return -E1000_ERR_EEPROM; in e1000_update_eeprom_checksum()
4003 checksum = (u16)EEPROM_SUM - checksum; in e1000_update_eeprom_checksum()
4006 return -E1000_ERR_EEPROM; in e1000_update_eeprom_checksum()
4012 * e1000_write_eeprom - write words to the different EEPROM types.
4034 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_do_write_eeprom()
4037 if (hw->mac_type == e1000_ce4100) { in e1000_do_write_eeprom()
4046 if ((offset >= eeprom->word_size) || in e1000_do_write_eeprom()
4047 (words > eeprom->word_size - offset) || in e1000_do_write_eeprom()
4050 return -E1000_ERR_EEPROM; in e1000_do_write_eeprom()
4055 return -E1000_ERR_EEPROM; in e1000_do_write_eeprom()
4057 if (eeprom->type == e1000_eeprom_microwire) { in e1000_do_write_eeprom()
4071 * e1000_write_eeprom_spi - Writes a 16 bit word to a given offset in an SPI EEPROM.
4080 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_write_eeprom_spi()
4087 return -E1000_ERR_EEPROM; in e1000_write_eeprom_spi()
4094 eeprom->opcode_bits); in e1000_write_eeprom_spi()
4101 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_write_eeprom_spi()
4104 /* Send the Write command (8-bit opcode + addr) */ in e1000_write_eeprom_spi()
4105 e1000_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits); in e1000_write_eeprom_spi()
4108 eeprom->address_bits); in e1000_write_eeprom_spi()
4122 /* Some larger eeprom sizes are capable of a 32-byte in e1000_write_eeprom_spi()
4124 * capable of an 8-byte PAGE WRITE operation. Break the in e1000_write_eeprom_spi()
4127 if ((((offset + widx) * 2) % eeprom->page_size) == 0) { in e1000_write_eeprom_spi()
4138 * e1000_write_eeprom_microwire - Writes a 16 bit word to a given offset in a Microwire EEPROM.
4147 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_write_eeprom_microwire()
4152 /* Send the write enable command to the EEPROM (3-bit opcode plus in e1000_write_eeprom_microwire()
4153 * 6/8-bit dummy address beginning with 11). It's less work to include in e1000_write_eeprom_microwire()
4159 (u16)(eeprom->opcode_bits + 2)); in e1000_write_eeprom_microwire()
4161 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2)); in e1000_write_eeprom_microwire()
4167 /* Send the Write command (3-bit opcode + addr) */ in e1000_write_eeprom_microwire()
4169 eeprom->opcode_bits); in e1000_write_eeprom_microwire()
4172 eeprom->address_bits); in e1000_write_eeprom_microwire()
4195 return -E1000_ERR_EEPROM; in e1000_write_eeprom_microwire()
4205 /* Send the write disable command to the EEPROM (3-bit opcode plus in e1000_write_eeprom_microwire()
4206 * 6/8-bit dummy address beginning with 10). It's less work to include in e1000_write_eeprom_microwire()
4212 (u16)(eeprom->opcode_bits + 2)); in e1000_write_eeprom_microwire()
4214 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2)); in e1000_write_eeprom_microwire()
4220 * e1000_read_mac_addr - read the adapters MAC from eeprom
4235 return -E1000_ERR_EEPROM; in e1000_read_mac_addr()
4237 hw->perm_mac_addr[i] = (u8)(eeprom_data & 0x00FF); in e1000_read_mac_addr()
4238 hw->perm_mac_addr[i + 1] = (u8)(eeprom_data >> 8); in e1000_read_mac_addr()
4241 switch (hw->mac_type) { in e1000_read_mac_addr()
4247 hw->perm_mac_addr[5] ^= 0x01; in e1000_read_mac_addr()
4252 hw->mac_addr[i] = hw->perm_mac_addr[i]; in e1000_read_mac_addr()
4257 * e1000_init_rx_addrs - Initializes receive address filters.
4272 e1000_rar_set(hw, hw->mac_addr, 0); in e1000_init_rx_addrs()
4279 e_dbg("Clearing RAR[1-14]\n"); in e1000_init_rx_addrs()
4289 * e1000_hash_mc_addr - Hashes an address to determine its location in the multicast table
4300 switch (hw->mc_filter_type) { in e1000_hash_mc_addr()
4328 * e1000_rar_set - Puts an ethernet address into a receive address register.
4356 * addresses and undo the re-direction to manageability. in e1000_rar_set()
4359 * configure the Rx unit. Last, we re-enable the AV bits and continue in e1000_rar_set()
4362 switch (hw->mac_type) { in e1000_rar_set()
4376 * e1000_write_vfta - Writes a value to the specified offset in the VLAN filter table.
4385 if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) { in e1000_write_vfta()
4386 temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1)); in e1000_write_vfta()
4389 E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp); in e1000_write_vfta()
4398 * e1000_clear_vfta - Clears the VLAN filer table
4420 if (hw->mac_type < e1000_82540) { in e1000_id_led_init()
4426 hw->ledctl_default = ledctl; in e1000_id_led_init()
4427 hw->ledctl_mode1 = hw->ledctl_default; in e1000_id_led_init()
4428 hw->ledctl_mode2 = hw->ledctl_default; in e1000_id_led_init()
4432 return -E1000_ERR_EEPROM; in e1000_id_led_init()
4446 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4447 hw->ledctl_mode1 |= ledctl_on << (i << 3); in e1000_id_led_init()
4452 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4453 hw->ledctl_mode1 |= ledctl_off << (i << 3); in e1000_id_led_init()
4463 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4464 hw->ledctl_mode2 |= ledctl_on << (i << 3); in e1000_id_led_init()
4469 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4470 hw->ledctl_mode2 |= ledctl_off << (i << 3); in e1000_id_led_init()
4491 switch (hw->mac_type) { in e1000_setup_led()
4504 &hw->phy_spd_default); in e1000_setup_led()
4508 (u16)(hw->phy_spd_default & in e1000_setup_led()
4514 if (hw->media_type == e1000_media_type_fiber) { in e1000_setup_led()
4517 hw->ledctl_default = ledctl; in e1000_setup_led()
4525 } else if (hw->media_type == e1000_media_type_copper) in e1000_setup_led()
4526 ew32(LEDCTL, hw->ledctl_mode1); in e1000_setup_led()
4534 * e1000_cleanup_led - Restores the saved state of the SW controlable LED.
4541 switch (hw->mac_type) { in e1000_cleanup_led()
4554 hw->phy_spd_default); in e1000_cleanup_led()
4560 ew32(LEDCTL, hw->ledctl_default); in e1000_cleanup_led()
4568 * e1000_led_on - Turns on the software controllable LED
4575 switch (hw->mac_type) { in e1000_led_on()
4584 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_on()
4595 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_on()
4599 } else if (hw->media_type == e1000_media_type_copper) { in e1000_led_on()
4600 ew32(LEDCTL, hw->ledctl_mode2); in e1000_led_on()
4612 * e1000_led_off - Turns off the software controllable LED
4619 switch (hw->mac_type) { in e1000_led_off()
4628 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_off()
4639 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_off()
4643 } else if (hw->media_type == e1000_media_type_copper) { in e1000_led_off()
4644 ew32(LEDCTL, hw->ledctl_mode1); in e1000_led_off()
4656 * e1000_clear_hw_cntrs - Clears all hardware statistics counters.
4715 if (hw->mac_type < e1000_82543) in e1000_clear_hw_cntrs()
4725 if (hw->mac_type <= e1000_82544) in e1000_clear_hw_cntrs()
4734 * e1000_reset_adaptive - Resets Adaptive IFS to its default state.
4738 * hw->ifs_params_forced to true. However, you must initialize hw->
4744 if (hw->adaptive_ifs) { in e1000_reset_adaptive()
4745 if (!hw->ifs_params_forced) { in e1000_reset_adaptive()
4746 hw->current_ifs_val = 0; in e1000_reset_adaptive()
4747 hw->ifs_min_val = IFS_MIN; in e1000_reset_adaptive()
4748 hw->ifs_max_val = IFS_MAX; in e1000_reset_adaptive()
4749 hw->ifs_step_size = IFS_STEP; in e1000_reset_adaptive()
4750 hw->ifs_ratio = IFS_RATIO; in e1000_reset_adaptive()
4752 hw->in_ifs_mode = false; in e1000_reset_adaptive()
4760 * e1000_update_adaptive - update adaptive IFS
4768 if (hw->adaptive_ifs) { in e1000_update_adaptive()
4769 if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) { in e1000_update_adaptive()
4770 if (hw->tx_packet_delta > MIN_NUM_XMITS) { in e1000_update_adaptive()
4771 hw->in_ifs_mode = true; in e1000_update_adaptive()
4772 if (hw->current_ifs_val < hw->ifs_max_val) { in e1000_update_adaptive()
4773 if (hw->current_ifs_val == 0) in e1000_update_adaptive()
4774 hw->current_ifs_val = in e1000_update_adaptive()
4775 hw->ifs_min_val; in e1000_update_adaptive()
4777 hw->current_ifs_val += in e1000_update_adaptive()
4778 hw->ifs_step_size; in e1000_update_adaptive()
4779 ew32(AIT, hw->current_ifs_val); in e1000_update_adaptive()
4783 if (hw->in_ifs_mode && in e1000_update_adaptive()
4784 (hw->tx_packet_delta <= MIN_NUM_XMITS)) { in e1000_update_adaptive()
4785 hw->current_ifs_val = 0; in e1000_update_adaptive()
4786 hw->in_ifs_mode = false; in e1000_update_adaptive()
4805 switch (hw->mac_type) { in e1000_get_bus_info()
4808 hw->bus_type = e1000_bus_type_pci; in e1000_get_bus_info()
4809 hw->bus_speed = e1000_bus_speed_unknown; in e1000_get_bus_info()
4810 hw->bus_width = e1000_bus_width_unknown; in e1000_get_bus_info()
4814 hw->bus_type = (status & E1000_STATUS_PCIX_MODE) ? in e1000_get_bus_info()
4817 if (hw->device_id == E1000_DEV_ID_82546EB_QUAD_COPPER) { in e1000_get_bus_info()
4818 hw->bus_speed = (hw->bus_type == e1000_bus_type_pci) ? in e1000_get_bus_info()
4820 } else if (hw->bus_type == e1000_bus_type_pci) { in e1000_get_bus_info()
4821 hw->bus_speed = (status & E1000_STATUS_PCI66) ? in e1000_get_bus_info()
4826 hw->bus_speed = e1000_bus_speed_66; in e1000_get_bus_info()
4829 hw->bus_speed = e1000_bus_speed_100; in e1000_get_bus_info()
4832 hw->bus_speed = e1000_bus_speed_133; in e1000_get_bus_info()
4835 hw->bus_speed = e1000_bus_speed_reserved; in e1000_get_bus_info()
4839 hw->bus_width = (status & E1000_STATUS_BUS64) ? in e1000_get_bus_info()
4856 unsigned long io_addr = hw->io_base; in e1000_write_reg_io()
4857 unsigned long io_data = hw->io_base + 4; in e1000_write_reg_io()
4864 * e1000_get_cable_length - Estimates the cable length.
4869 * returns: - E1000_ERR_XXX
4888 if (hw->phy_type == e1000_phy_m88) { in e1000_get_cable_length()
4919 return -E1000_ERR_PHY; in e1000_get_cable_length()
4921 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */ in e1000_get_cable_length()
4941 IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) || in e1000_get_cable_length()
4943 return -E1000_ERR_PHY; in e1000_get_cable_length()
4955 agc_value -= min_agc_value; in e1000_get_cable_length()
4958 agc_value /= (IGP01E1000_PHY_CHANNEL_NUM - 1); in e1000_get_cable_length()
4965 *min_length = ((e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length()
4967 (e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length()
4977 * e1000_check_polarity - Check the cable polarity
4979 * @polarity: output parameter : 0 - Polarity is not reversed
4980 * 1 - Polarity is reversed.
4982 * returns: - E1000_ERR_XXX
4997 if (hw->phy_type == e1000_phy_m88) { in e1000_check_polarity()
5007 } else if (hw->phy_type == e1000_phy_igp) { in e1000_check_polarity()
5044 * e1000_check_downshift - Check if Downshift occurred
5047 * returns: - E1000_ERR_XXX
5060 if (hw->phy_type == e1000_phy_igp) { in e1000_check_downshift()
5066 hw->speed_downgraded = in e1000_check_downshift()
5068 } else if (hw->phy_type == e1000_phy_m88) { in e1000_check_downshift()
5074 hw->speed_downgraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) >> in e1000_check_downshift()
5098 if (hw->dsp_config_state != e1000_dsp_config_enabled) in e1000_1000Mb_check_cable_length()
5115 hw->dsp_config_state = e1000_dsp_config_activated; in e1000_1000Mb_check_cable_length()
5134 hw->ffe_config_state = e1000_ffe_config_active; in e1000_1000Mb_check_cable_length()
5158 * returns: - E1000_ERR_PHY if fail to read/write the PHY
5170 if (hw->phy_type != e1000_phy_igp) in e1000_config_dsp_after_link_change()
5186 if (hw->dsp_config_state == e1000_dsp_config_activated) { in e1000_config_dsp_after_link_change()
5239 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_config_dsp_after_link_change()
5242 if (hw->ffe_config_state == e1000_ffe_config_active) { in e1000_config_dsp_after_link_change()
5284 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_config_dsp_after_link_change()
5291 * e1000_set_phy_mode - Set PHY to class A mode
5296 * 2. Restart auto-negotiation or force link.
5303 if ((hw->mac_type == e1000_82545_rev_3) && in e1000_set_phy_mode()
5304 (hw->media_type == e1000_media_type_copper)) { in e1000_set_phy_mode()
5324 hw->phy_reset_disable = false; in e1000_set_phy_mode()
5332 * e1000_set_d3_lplu_state - set d3 link power state
5341 * returns: - E1000_ERR_PHY if fail to read/write the PHY
5349 if (hw->phy_type != e1000_phy_igp) in e1000_set_d3_lplu_state()
5356 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5357 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5365 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5366 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5380 if (hw->smart_speed == e1000_smart_speed_on) { in e1000_set_d3_lplu_state()
5393 } else if (hw->smart_speed == e1000_smart_speed_off) { in e1000_set_d3_lplu_state()
5407 } else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT) || in e1000_set_d3_lplu_state()
5408 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL) || in e1000_set_d3_lplu_state()
5409 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) { in e1000_set_d3_lplu_state()
5410 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5411 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5449 switch (hw->mac_type) { in e1000_set_vco_speed()
5501 * e1000_enable_mng_pass_thru - check for bmc pass through
5505 * returns: - true/false
5511 if (hw->asf_firmware_present) { in e1000_enable_mng_pass_thru()
5544 /* This loop will early-out if the NO link condition has been met. */ in e1000_polarity_reversal_workaround()
5545 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround()
5566 /* Now we will re-enable th transmitter on the PHY */ in e1000_polarity_reversal_workaround()
5588 /* This loop will early-out if the link condition has been met. */ in e1000_polarity_reversal_workaround()
5589 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround()
5613 * Check for EEPROM Auto Read bit done.
5614 * returns: - E1000_ERR_RESET if fail to reset MAC
5628 * returns: - E1000_ERR_RESET if fail to reset MAC