181 	u32 command_config;		/* 0x008 Ctrl and cfg */  member
378 	tmp = ioread32be(&regs->command_config);  in reset()
382 	iowrite32be(tmp, &regs->command_config);  in reset()
387 	} while ((ioread32be(&regs->command_config) & CMD_CFG_SW_RESET) &&  in reset()
430 	iowrite32be(tmp, &regs->command_config);  in init()
719 	tmp = ioread32be(&regs->command_config);  in memac_enable()
725 	iowrite32be(tmp, &regs->command_config);  in memac_enable()
738 	tmp = ioread32be(&regs->command_config);  in memac_disable()
744 	iowrite32be(tmp, &regs->command_config);  in memac_disable()
757 	tmp = ioread32be(&regs->command_config);  in memac_set_promiscuous()
763 	iowrite32be(tmp, &regs->command_config);  in memac_set_promiscuous()
853 	tmp = ioread32be(&regs->command_config);  in memac_set_tx_pause_frames()
856 	iowrite32be(tmp, &regs->command_config);  in memac_set_tx_pause_frames()
885 	tmp = ioread32be(&regs->command_config);  in memac_accept_rx_pause_frames()
891 	iowrite32be(tmp, &regs->command_config);  in memac_accept_rx_pause_frames()
1074 		reg32 = ioread32be(&memac->regs->command_config);  in memac_init()
1076 		iowrite32be(reg32, &memac->regs->command_config);  in memac_init()