Lines Matching +full:rx +full:- +full:tx +full:- +full:swap
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
31 #define MACB_RBQP 0x0018 /* RX Q Base Address */
32 #define MACB_TBQP 0x001c /* TX Q Base Address */
106 #define GEM_TX64CNT 0x0118 /* 64 byte Frames TX counter */
107 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
108 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
109 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
110 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
111 #define GEM_TX1024CNT 0x012c /* 1024-1518 byte Frames TX counter */
112 #define GEM_TX1519CNT 0x0130 /* 1519+ byte Frames TX counter */
113 #define GEM_TXURUNCNT 0x0134 /* TX under run error counter */
127 #define GEM_RX64CNT 0x0168 /* 64 byte Frames RX Counter */
128 #define GEM_RX65CNT 0x016c /* 65-127 byte Frames RX Counter */
129 #define GEM_RX128CNT 0x0170 /* 128-255 byte Frames RX Counter */
130 #define GEM_RX256CNT 0x0174 /* 256-511 byte Frames RX Counter */
131 #define GEM_RX512CNT 0x0178 /* 512-1023 byte Frames RX Counter */
132 #define GEM_RX1024CNT 0x017c /* 1024-1518 byte Frames RX Counter */
133 #define GEM_RX1519CNT 0x0180 /* 1519+ byte Frames RX Counter */
146 #define GEM_TISUBN 0x01bc /* 1588 Timer Increment Sub-ns */
152 #define GEM_EFTSL 0x01e0 /* PTP Event Frame Tx Seconds Low */
153 #define GEM_EFTN 0x01e4 /* PTP Event Frame Tx Nanoseconds */
154 #define GEM_EFRSL 0x01e8 /* PTP Event Frame Rx Seconds Low */
155 #define GEM_EFRN 0x01ec /* PTP Event Frame Rx Nanoseconds */
156 #define GEM_PEFTSL 0x01f0 /* PTP Peer Event Frame Tx Secs Low */
157 #define GEM_PEFTN 0x01f4 /* PTP Peer Event Frame Tx Ns */
158 #define GEM_PEFRSL 0x01f8 /* PTP Peer Event Frame Rx Sec Low */
159 #define GEM_PEFRN 0x01fc /* PTP Peer Event Frame Rx Ns */
170 #define GEM_TXBDCTRL 0x04cc /* TX Buffer Descriptor control register */
171 #define GEM_RXBDCTRL 0x04d0 /* RX Buffer Descriptor control register */
191 /* Which screening type 2 EtherType register will be used (0 - 7) */
240 #define MACB_BIT_RATE_OFFSET 2 /* Discard non-VLAN frames */
298 #define GEM_ENDIA_DESC_OFFSET 6 /* endian swap mode for management descriptor access */
300 #define GEM_ENDIA_PKT_OFFSET 7 /* endian swap mode for packet data access */
302 #define GEM_RXBMS_OFFSET 8 /* RX packet buffer memory size select */
304 #define GEM_TXPBMS_OFFSET 10 /* TX packet buffer memory size select */
306 #define GEM_TXCOEN_OFFSET 11 /* TX IP/TCP/UDP checksum gen offload */
312 #define GEM_RXEXT_OFFSET 28 /* RX extended Buffer Descriptor mode */
314 #define GEM_TXEXT_OFFSET 29 /* TX extended Buffer Descriptor mode */
316 #define GEM_ADDR64_OFFSET 30 /* Address bus width - 64b or 32b */
337 #define MACB_BEX_OFFSET 4 /* TX frame corruption due to AHB error */
359 #define MACB_RXUBR_OFFSET 2 /* RX used bit read */
361 #define MACB_TXUBR_OFFSET 3 /* TX used bit read */
363 #define MACB_ISR_TUND_OFFSET 4 /* Enable TX buffer under run interrupt */
367 #define MACB_TXERR_OFFSET 6 /* EN TX frame corrupt from error interrupt */
383 #define MACB_WOL_OFFSET 14 /* Enable wake-on-lan interrupt */
403 #define GEM_WOL_OFFSET 28 /* Enable wake-on-lan interrupt */
528 #define GEM_TXTSMODE_OFFSET 4 /* TX Descriptor Timestamp Insertion mode */
532 #define GEM_RXTSMODE_OFFSET 4 /* RX Descriptor Timestamp Insertion mode */
546 #define GEM_CMPA_OFFSET 13 /* Compare A - Index to screener type 2 Compare register */
550 #define GEM_CMPB_OFFSET 19 /* Compare B - Index to screener type 2 Compare register */
554 #define GEM_CMPC_OFFSET 25 /* Compare C - Index to screener type 2 Compare register */
619 #define GEM_DMA_SEC_MASK (GEM_DMA_SEC_TOP - 1)
675 (((value) & ((1 << MACB_##name##_SIZE) - 1)) \
679 & ((1 << MACB_##name##_SIZE) - 1))
681 (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \
688 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
692 & ((1 << GEM_##name##_SIZE) - 1))
694 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
699 #define macb_readl(port, reg) (port)->macb_reg_readl((port), MACB_##reg)
700 #define macb_writel(port, reg, value) (port)->macb_reg_writel((port), MACB_##reg, (value))
701 #define gem_readl(port, reg) (port)->macb_reg_readl((port), GEM_##reg)
702 #define gem_writel(port, reg, value) (port)->macb_reg_writel((port), GEM_##reg, (value))
703 #define queue_readl(queue, reg) (queue)->bp->macb_reg_readl((queue)->bp, (queue)->reg)
704 #define queue_writel(queue, reg, value) (queue)->bp->macb_reg_writel((queue)->bp, (queue)->reg, (va…
705 #define gem_readl_n(port, reg, idx) (port)->macb_reg_readl((port), GEM_##reg + idx * 4)
706 #define gem_writel_n(port, reg, idx, value) (port)->macb_reg_writel((port), GEM_##reg + idx * 4, (v…
735 /* struct macb_dma_desc - Hardware DMA descriptor
812 /* RX checksum offload disabled: bit 24 clear in NCFGR */
816 /* RX checksum offload enabled: bit 24 set in NCFGR */
852 /* limit RX checksum offload to TCP and UDP packets */
858 /* struct macb_tx_skb - data about an skb which is being transmitted
873 /* Hardware-collected statistics. Used when updating the network
949 * returned by `ethtool -S`. Also describes which net_device_stats statistics
1088 /* MACB-PTP interface: adapt to platform needs. */
1223 struct macb_ptp_info *ptp_info; /* macb-ptp interface */
1234 /* RX queue filer rule set*/
1251 #define TSU_SEC_MAX_VAL (((u64)1 << GEM_TSEC_SIZE) - 1)
1252 #define TSU_NSEC_MAX_VAL ((1 << GEM_TN_SIZE) - 1)
1267 if (queue->bp->tstamp_config.tx_type == TSTAMP_DISABLED) in gem_ptp_do_txstamp()
1268 return -ENOTSUPP; in gem_ptp_do_txstamp()
1275 if (bp->tstamp_config.rx_filter == TSTAMP_DISABLED) in gem_ptp_do_rxstamp()
1288 return -1; in gem_ptp_do_txstamp()
1296 return !!(bp->caps & MACB_CAPS_MACB_IS_GEM); in macb_is_gem()
1301 return !!(bp->caps & MACB_CAPS_GEM_HAS_PTP); in gem_has_ptp()
1305 * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration