Lines Matching refs:tw32_f

619 #define tw32_f(reg, val)		_tw32_flush(tp, (reg), (val), 0)  macro
639 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off); in tg3_write_mem()
640 tw32_f(TG3PCI_MEM_WIN_DATA, val); in tg3_write_mem()
643 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0); in tg3_write_mem()
666 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off); in tg3_read_mem()
670 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0); in tg3_read_mem()
1123 tw32_f(MAC_MI_MODE, in __tg3_readphy()
1138 tw32_f(MAC_MI_COM, frame_val); in __tg3_readphy()
1160 tw32_f(MAC_MI_MODE, tp->mi_mode); in __tg3_readphy()
1186 tw32_f(MAC_MI_MODE, in __tg3_writephy()
1200 tw32_f(MAC_MI_COM, frame_val); in __tg3_writephy()
1219 tw32_f(MAC_MI_MODE, tp->mi_mode); in __tg3_writephy()
1494 tw32_f(MAC_MI_MODE, tp->mi_mode); in tg3_mdio_start()
1625 tw32_f(GRC_RX_CPU_EVENT, val); in tg3_generate_fw_event()
1993 tw32_f(MAC_RX_MODE, tp->rx_mode); in tg3_setup_flow_control()
2001 tw32_f(MAC_TX_MODE, tp->tx_mode); in tg3_setup_flow_control()
2048 tw32_f(MAC_MODE, tp->mac_mode); in tg3_adjust_link()
2640 tw32_f(GRC_MISC_CFG, val & ~GRC_MISC_CFG_EPHY_IDDQ); in tg3_phy_reset()
2689 tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val); in tg3_phy_reset()
3083 tw32_f(GRC_MISC_CFG, val | GRC_MISC_CFG_EPHY_IDDQ); in tg3_power_down_phy()
3128 tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val); in tg3_power_down_phy()
3164 tw32_f(NVRAM_SWARB, SWARB_REQ_CLR1); in tg3_nvram_unlock()
3536 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & in tg3_nvram_write_block()
3573 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); in tg3_nvram_write_block()
3609 tw32_f(RX_CPU_BASE + CPU_MODE, CPU_MODE_HALT); in tg3_rxcpu_pause()
3625 tw32_f(cpu_base + CPU_MODE, 0x00000000); in tg3_resume_cpu()
3772 tw32_f(cpu_base + CPU_PC, pc); in tg3_pause_cpu_and_set_pc()
3779 tw32_f(cpu_base + CPU_PC, pc); in tg3_pause_cpu_and_set_pc()
4181 tw32_f(MAC_MODE, mac_mode); in tg3_power_down_prepare()
4184 tw32_f(MAC_RX_MODE, RX_MODE_ENABLE); in tg3_power_down_prepare()
4734 tw32_f(MAC_STATUS, in tg3_clear_mac_status()
4751 tw32_f(TG3_CPMU_EEE_LNKIDL_CTRL, val); in tg3_setup_eee()
4753 tw32_f(TG3_CPMU_EEE_CTRL, in tg3_setup_eee()
4767 tw32_f(TG3_CPMU_EEE_MODE, tp->eee.eee_enabled ? val : 0); in tg3_setup_eee()
4769 tw32_f(TG3_CPMU_EEE_DBTMR1, in tg3_setup_eee()
4773 tw32_f(TG3_CPMU_EEE_DBTMR2, in tg3_setup_eee()
4790 tw32_f(MAC_MI_MODE, in tg3_setup_copper_phy()
5044 tw32_f(MAC_MI_MODE, tp->mi_mode); in tg3_setup_copper_phy()
5048 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_copper_phy()
5055 tw32_f(MAC_EVENT, 0); in tg3_setup_copper_phy()
5057 tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); in tg3_setup_copper_phy()
5066 tw32_f(MAC_STATUS, in tg3_setup_copper_phy()
5236 tw32_f(MAC_MODE, tp->mac_mode); in tg3_fiber_aneg_smachine()
5265 tw32_f(MAC_MODE, tp->mac_mode); in tg3_fiber_aneg_smachine()
5280 tw32_f(MAC_MODE, tp->mac_mode); in tg3_fiber_aneg_smachine()
5366 tw32_f(MAC_MODE, tp->mac_mode); in tg3_fiber_aneg_smachine()
5415 tw32_f(MAC_TX_AUTO_NEG, 0); in fiber_autoneg()
5418 tw32_f(MAC_MODE, tmp | MAC_MODE_PORT_MODE_GMII); in fiber_autoneg()
5421 tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_SEND_CONFIGS); in fiber_autoneg()
5438 tw32_f(MAC_MODE, tp->mac_mode); in fiber_autoneg()
5538 tw32_f(MAC_SERDES_CFG, val); in tg3_setup_fiber_hw_autoneg()
5541 tw32_f(SG_DIG_CTRL, SG_DIG_COMMON_SETUP); in tg3_setup_fiber_hw_autoneg()
5571 tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011000); in tg3_setup_fiber_hw_autoneg()
5572 tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl | SG_DIG_SOFT_RESET); in tg3_setup_fiber_hw_autoneg()
5574 tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl); in tg3_setup_fiber_hw_autoneg()
5616 tw32_f(MAC_SERDES_CFG, val); in tg3_setup_fiber_hw_autoneg()
5619 tw32_f(SG_DIG_CTRL, SG_DIG_COMMON_SETUP); in tg3_setup_fiber_hw_autoneg()
5680 tw32_f(MAC_STATUS, in tg3_setup_fiber_by_hand()
5701 tw32_f(MAC_MODE, (tp->mac_mode | MAC_MODE_SEND_CONFIGS)); in tg3_setup_fiber_by_hand()
5704 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_fiber_by_hand()
5735 tw32_f(MAC_STATUS, (MAC_STATUS_SYNC_CHANGED | in tg3_setup_fiber_phy()
5741 tw32_f(MAC_TX_AUTO_NEG, 0); in tg3_setup_fiber_phy()
5745 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_fiber_phy()
5752 tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); in tg3_setup_fiber_phy()
5769 tw32_f(MAC_STATUS, (MAC_STATUS_SYNC_CHANGED | in tg3_setup_fiber_phy()
5783 tw32_f(MAC_MODE, (tp->mac_mode | in tg3_setup_fiber_phy()
5786 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_fiber_phy()
5855 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_fiber_mii_phy()
5864 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_fiber_mii_phy()
5905 tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); in tg3_setup_fiber_mii_phy()
5997 tw32_f(MAC_MODE, tp->mac_mode); in tg3_setup_fiber_mii_phy()
6000 tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); in tg3_setup_fiber_mii_phy()
6156 tw32_f(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_RESUME); in tg3_refclk_write()
7028 tw32_f(MAC_STATUS, in tg3_poll_link()
7210 tw32_f(HOSTCC_MODE, tp->coal_now); in tg3_poll_work()
8258 tw32_f(MAC_RX_MODE, RX_MODE_RESET); in tg3_phy_lpbk_set()
8260 tw32_f(MAC_RX_MODE, tp->rx_mode); in tg3_phy_lpbk_set()
8848 tw32_f(ofs, val); in tg3_stop_block()
8890 tw32_f(MAC_RX_MODE, tp->rx_mode); in tg3_abort_hw()
8909 tw32_f(MAC_MODE, tp->mac_mode); in tg3_abort_hw()
8913 tw32_f(MAC_TX_MODE, tp->tx_mode); in tg3_abort_hw()
9280 tw32_f(MAC_MODE, val); in tg3_chip_reset()
9803 tw32_f(MAC_RX_MODE, rx_mode); in __tg3_set_rx_mode()
10002 tw32_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_reset_hw()
10421 tw32_f(MAC_RX_MODE, RX_MODE_RESET); in tg3_reset_hw()
10434 tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR); in tg3_reset_hw()
10465 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); in tg3_reset_hw()
10479 tw32_f(DMAC_MODE, DMAC_MODE_ENABLE); in tg3_reset_hw()
10508 tw32_f(WDMAC_MODE, val); in tg3_reset_hw()
10527 tw32_f(RDMAC_MODE, rdmac_mode); in tg3_reset_hw()
10603 tw32_f(MAC_TX_MODE, tp->tx_mode); in tg3_reset_hw()
10632 tw32_f(MAC_RX_MODE, tp->rx_mode); in tg3_reset_hw()
10639 tw32_f(MAC_RX_MODE, RX_MODE_RESET); in tg3_reset_hw()
10642 tw32_f(MAC_RX_MODE, tp->rx_mode); in tg3_reset_hw()
10666 tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, val); in tg3_reset_hw()
11058 tw32_f(MAC_MODE, in tg3_timer()
11062 tw32_f(MAC_MODE, tp->mac_mode); in tg3_timer()
11308 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | in tg3_test_interrupt()
13526 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | in tg3_run_loopback()
13553 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | in tg3_run_loopback()
15005 tw32_f(GRC_EEPROM_ADDR, in tg3_nvram_init()
15013 tw32_f(GRC_LOCAL_CTRL, in tg3_nvram_init()
17008 tw32_f(NVRAM_CMD, NVRAM_CMD_RESET); in tg3_get_device_address()
17242 tw32_f(RDMAC_MODE, RDMAC_MODE_ENABLE); in tg3_do_test_dma()
17247 tw32_f(WDMAC_MODE, WDMAC_MODE_ENABLE); in tg3_do_test_dma()