Lines Matching refs:tg3_flag
91 #define tg3_flag(tp, flag) \ macro
130 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
137 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
141 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
212 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
213 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
565 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
585 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
586 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
587 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
595 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
597 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
598 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
632 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
659 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
711 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
772 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
849 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
940 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
963 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
987 if (!tg3_flag(tp, ENABLE_APE) || in tg3_send_ape_heartbeat()
1020 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1027 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1043 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1075 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1085 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1096 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1446 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1459 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1460 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1462 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1477 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1478 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1483 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1497 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1508 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1520 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1532 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1583 if (tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_init()
1585 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_init()
1587 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_init()
1611 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1702 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1722 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1741 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1767 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1788 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1816 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1819 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1843 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1859 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1972 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1977 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2227 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2228 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2258 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2433 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2625 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2693 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2743 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2755 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2815 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2842 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2864 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2947 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2969 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2976 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
2989 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
2992 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
2993 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
2998 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
2999 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3137 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3160 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3171 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3181 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3251 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3252 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3253 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3254 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3266 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3267 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3268 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3269 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3289 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3503 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3504 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3508 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3518 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3535 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3541 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3551 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3557 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3572 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3639 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3654 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3667 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3708 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3715 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3864 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3907 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4034 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4043 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4045 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4072 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4073 if (tg3_flag(tp, WOL_SPEED_100MB)) { in tg3_power_down_prepare()
4113 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4124 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4157 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4168 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4172 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4173 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4176 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4188 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4199 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4200 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4203 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4212 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4226 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4243 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4249 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4256 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4275 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4420 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4764 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4815 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4979 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
5009 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5053 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5064 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5076 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5458 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5725 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5727 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5759 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5981 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6113 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6122 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6169 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6358 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6370 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6379 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6423 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6435 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6447 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6460 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6515 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6548 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
6983 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7020 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7027 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7174 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7188 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7239 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7294 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7338 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7344 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7525 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7574 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7681 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7706 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7924 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
7972 tg3_flag(tp, TSO_BUG)) { in tg3_start_xmit()
7989 if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
7990 tg3_flag(tp, HW_TSO_2) || in tg3_start_xmit()
7991 tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7999 if (tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
8004 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_start_xmit()
8006 else if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
8035 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_start_xmit()
8045 tg3_flag(tp, TX_TSTAMP_EN)) { in tg3_start_xmit()
8062 if (tg3_flag(tp, 5701_DMA_BUG)) in tg3_start_xmit()
8072 if (!tg3_flag(tp, HW_TSO_1) && in tg3_start_xmit()
8073 !tg3_flag(tp, HW_TSO_2) && in tg3_start_xmit()
8074 !tg3_flag(tp, HW_TSO_3)) in tg3_start_xmit()
8175 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8185 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8257 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8319 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8346 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8362 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8399 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8435 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8440 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8512 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8635 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8689 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8702 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8780 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8829 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
8965 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
8968 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
8976 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
8984 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
8994 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
8999 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9085 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9131 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9134 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9159 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9192 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9214 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9232 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9241 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9287 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9290 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9321 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9383 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9419 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9430 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9463 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9497 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9516 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9518 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9520 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9538 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9559 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9561 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9565 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9582 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9615 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9619 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9627 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9637 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9672 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9673 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9676 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9690 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9693 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9703 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9752 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9820 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9876 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
9935 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
9949 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
9999 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
10000 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10006 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10012 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10039 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10044 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10076 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10098 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10108 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10184 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10189 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10197 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10199 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10208 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10209 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10218 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10233 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10285 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10289 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10294 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10305 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10306 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10307 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10310 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10323 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10361 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10366 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10389 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10415 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10428 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10430 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10443 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10461 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10468 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10473 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10478 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10491 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10496 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10502 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10511 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10545 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10557 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10561 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10562 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10563 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10566 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10584 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10592 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10606 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10618 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10624 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10662 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10685 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10714 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10718 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10768 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10911 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
10986 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
10992 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
10995 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
11000 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
11022 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
11028 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
11043 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11068 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11070 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11100 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11126 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11128 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11203 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11262 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11264 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11269 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11295 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11323 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11341 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11359 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11520 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11521 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11530 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11532 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11535 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11537 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11539 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11544 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11559 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11561 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11622 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11634 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11746 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
12006 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
12016 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12097 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12151 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_link_ksettings()
12182 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_link_ksettings()
12227 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_link_ksettings()
12329 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12334 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12347 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12385 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12413 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12421 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12439 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12453 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12457 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12488 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12510 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12611 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12636 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12677 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12720 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12807 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12892 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13242 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13244 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13255 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13378 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13380 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13383 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13387 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13440 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13442 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13479 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13480 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13481 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13489 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13494 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13496 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13508 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13669 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13684 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13690 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13698 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13712 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13715 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13731 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13735 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13793 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13849 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13936 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13940 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
13998 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14071 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14210 if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) { in tg3_get_stats64()
14238 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14245 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14355 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14397 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14492 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
14997 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
15044 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15222 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15228 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15263 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15305 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15310 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15317 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15331 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15337 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15342 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15362 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15364 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15490 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15507 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15513 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15520 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15558 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15599 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15600 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15913 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
15971 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
16021 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
16037 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
16038 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
16052 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
16054 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16153 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16164 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16174 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16175 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16179 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16334 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16363 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16365 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16368 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16386 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16387 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16388 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16389 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16409 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16418 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16423 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16440 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16453 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16457 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16458 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16459 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16490 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16491 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16510 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16538 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16584 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16587 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16599 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16601 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16605 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16628 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16643 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16644 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16664 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16679 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16685 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16707 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16718 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16725 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16741 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16772 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16776 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16797 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16849 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16875 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16886 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16889 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16899 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16952 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16958 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16979 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
16996 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
17004 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
17011 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
17036 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17081 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17094 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17113 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17138 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17311 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17314 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17317 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17333 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17356 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17469 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17483 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17557 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17560 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17579 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17584 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17615 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17760 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17762 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17801 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17809 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17810 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17811 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17814 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17817 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17836 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17848 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17884 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17943 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
17976 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
17978 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
17979 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
18026 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()