14386 	u32 nvcfg1;  in tg3_get_nvram_info()  local
14388 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_nvram_info()
14389 	if (nvcfg1 & NVRAM_CFG1_FLASHIF_ENAB) {  in tg3_get_nvram_info()
14392 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_nvram_info()
14393 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_nvram_info()
14398 		switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {  in tg3_get_nvram_info()
14464 	u32 nvcfg1;  in tg3_get_5752_nvram_info()  local
14466 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5752_nvram_info()
14469 	if (nvcfg1 & (1 << 27))  in tg3_get_5752_nvram_info()
14472 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5752_nvram_info()
14493 		tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5752_nvram_info()
14498 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5752_nvram_info()
14499 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5752_nvram_info()
14505 	u32 nvcfg1, protect = 0;  in tg3_get_5755_nvram_info()  local
14507 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5755_nvram_info()
14510 	if (nvcfg1 & (1 << 27)) {  in tg3_get_5755_nvram_info()
14515 	nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5755_nvram_info()
14516 	switch (nvcfg1) {  in tg3_get_5755_nvram_info()
14525 		if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 ||  in tg3_get_5755_nvram_info()
14526 		    nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5)  in tg3_get_5755_nvram_info()
14529 		else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2)  in tg3_get_5755_nvram_info()
14543 		if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10)  in tg3_get_5755_nvram_info()
14547 		else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20)  in tg3_get_5755_nvram_info()
14561 	u32 nvcfg1;  in tg3_get_5787_nvram_info()  local
14563 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5787_nvram_info()
14565 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5787_nvram_info()
14574 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5787_nvram_info()
14575 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5787_nvram_info()
14599 	u32 nvcfg1, protect = 0;  in tg3_get_5761_nvram_info()  local
14601 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5761_nvram_info()
14604 	if (nvcfg1 & (1 << 27)) {  in tg3_get_5761_nvram_info()
14609 	nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5761_nvram_info()
14610 	switch (nvcfg1) {  in tg3_get_5761_nvram_info()
14643 		switch (nvcfg1) {  in tg3_get_5761_nvram_info()
14681 	u32 nvcfg1;  in tg3_get_57780_nvram_info()  local
14683 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_57780_nvram_info()
14685 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14692 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_57780_nvram_info()
14693 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_57780_nvram_info()
14706 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14729 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14746 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_57780_nvram_info()
14754 	u32 nvcfg1;  in tg3_get_5717_nvram_info()  local
14756 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5717_nvram_info()
14758 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14765 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5717_nvram_info()
14766 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5717_nvram_info()
14779 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14806 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14825 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5717_nvram_info()
14832 	u32 nvcfg1, nvmpinstrp, nv_status;  in tg3_get_5720_nvram_info()  local
14834 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5720_nvram_info()
14835 	nvmpinstrp = nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5720_nvram_info()
14838 		if (!(nvcfg1 & NVRAM_CFG1_5762VENDOR_MASK)) {  in tg3_get_5720_nvram_info()
14882 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5720_nvram_info()
14883 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5720_nvram_info()
14978 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5720_nvram_info()