28 		val = bgmac_read(bgmac, reg);  in bgmac_wait_value()
56 		val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);  in bgmac_dma_tx_reset()
79 		val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);  in bgmac_dma_tx_reset()
91 	ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);  in bgmac_dma_tx_enable()
242 	empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);  in bgmac_dma_tx_free()
311 	ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL);  in bgmac_dma_rx_enable()
418 	end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS);  in bgmac_dma_rx_read()
512 		if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO))  in bgmac_dma_unaligned()
518 		if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO))  in bgmac_dma_unaligned()
752 	u32 cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);  in bgmac_cmdcfg_maskset()
799 				bgmac_read(bgmac,
803 				bgmac_read(bgmac,
820 		bgmac_read(bgmac, BGMAC_TX_GOOD_OCTETS + (i * 4));  in bgmac_clear_mib()
822 		bgmac_read(bgmac, BGMAC_RX_GOOD_OCTETS + (i * 4));  in bgmac_clear_mib()
869 		imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &  in bgmac_miiconfig()
1041 	bgmac_read(bgmac, BGMAC_INT_MASK);  in bgmac_chip_intrs_off()
1056 	cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);  in bgmac_enable()
1063 	mode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>  in bgmac_enable()
1089 		rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);  in bgmac_enable()
1130 	u32 int_status = bgmac_read(bgmac, BGMAC_INT_STATUS);  in bgmac_interrupt()
1160 	if (bgmac_read(bgmac, BGMAC_INT_STATUS) & (BGMAC_IS_TX0 | BGMAC_IS_RX))  in bgmac_poll()
1389 			val = (u64)bgmac_read(bgmac, s->offset + 4) << 32;  in bgmac_get_ethtool_stats()
1390 		val |= bgmac_read(bgmac, s->offset);  in bgmac_get_ethtool_stats()