265 			enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_refill_rx()
267 			enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan);  in bcm_enet_refill_rx()
403 					 ENETDMAC_CHANCFG, priv->rx_chan);  in bcm_enet_receive_queue()
479 			 ENETDMAC_IR, priv->rx_chan);  in bcm_enet_poll()
501 			 ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_poll()
546 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_isr_dma()
761 		val |= ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan);  in bcm_enet_set_flow()
763 		val &= ~ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan);  in bcm_enet_set_flow()
896 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_open()
972 				ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_open()
975 				ENETDMAC_BUFALLOC, priv->rx_chan);  in bcm_enet_open()
986 				 ENETDMAS_RSTART_REG, priv->rx_chan);  in bcm_enet_open()
991 				ENETDMAC_RSTART, priv->rx_chan);  in bcm_enet_open()
998 		enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);  in bcm_enet_open()
1000 		enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);  in bcm_enet_open()
1002 		enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan);  in bcm_enet_open()
1005 		enet_dmac_writel(priv, 0, ENETDMAC_FC, priv->rx_chan);  in bcm_enet_open()
1015 			 ENETDMAC_MAXBURST, priv->rx_chan);  in bcm_enet_open()
1025 		enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));  in bcm_enet_open()
1027 		enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));  in bcm_enet_open()
1029 		enet_dmac_writel(priv, 5, ENETDMAC_FC, priv->rx_chan);  in bcm_enet_open()
1030 		enet_dmac_writel(priv, priv->rx_ring_size, ENETDMAC_LEN, priv->rx_chan);  in bcm_enet_open()
1043 			 ENETDMAC_CHANCFG, priv->rx_chan);  in bcm_enet_open()
1051 			 ENETDMAC_IR, priv->rx_chan);  in bcm_enet_open()
1059 			 ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_open()
1175 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_stop()
1183 	bcm_enet_disable_dma(priv, priv->rx_chan);  in bcm_enet_stop()
1758 		priv->rx_chan = pd->rx_chan;  in bcm_enet_probe()
2087 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enetsw_open()
2188 			ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enetsw_open()
2198 			 ENETDMAS_RSTART_REG, priv->rx_chan);  in bcm_enetsw_open()
2203 	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);  in bcm_enetsw_open()
2205 	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);  in bcm_enetsw_open()
2207 	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan);  in bcm_enetsw_open()
2212 			 ENETDMAC_MAXBURST, priv->rx_chan);  in bcm_enetsw_open()
2218 	enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));  in bcm_enetsw_open()
2220 	enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));  in bcm_enetsw_open()
2228 			 ENETDMAC_CHANCFG, priv->rx_chan);  in bcm_enetsw_open()
2232 			 ENETDMAC_IR, priv->rx_chan);  in bcm_enetsw_open()
2240 			 ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enetsw_open()
2341 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enetsw_stop()
2346 	bcm_enet_disable_dma(priv, priv->rx_chan);  in bcm_enetsw_stop()
2694 	priv->rx_chan = 0;  in bcm_enetsw_probe()