Lines Matching refs:L_ADDRREG
141 #define L_ADDRREG 0x02 macro
159 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
161 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
169 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
170 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
278 outw(80,PORT+L_ADDRREG); in ni65_set_performance()
279 if(inw(PORT+L_ADDRREG) != 80) in ni65_set_performance()
283 outw(0,PORT+L_ADDRREG); in ni65_set_performance()
285 outw(1,PORT+L_ADDRREG); in ni65_set_performance()
288 outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */ in ni65_set_performance()
469 outw(88,PORT+L_ADDRREG); in ni65_probe1()
470 if(inw(PORT+L_ADDRREG) == 88) { in ni65_probe1()
474 outw(89,PORT+L_ADDRREG); in ni65_probe1()