1192 	u32 reg_cbt, reg_fdctrl;  in flexcan_set_bittiming_cbt()  local
1263 	reg_fdctrl = priv->read(&regs->fdctrl);  in flexcan_set_bittiming_cbt()
1264 	reg_fdctrl &= ~(FLEXCAN_FDCTRL_FDRATE |  in flexcan_set_bittiming_cbt()
1268 		reg_fdctrl |= FLEXCAN_FDCTRL_FDRATE;  in flexcan_set_bittiming_cbt()
1272 			reg_fdctrl &= ~FLEXCAN_FDCTRL_TDCEN;  in flexcan_set_bittiming_cbt()
1274 			reg_fdctrl |= FLEXCAN_FDCTRL_TDCEN |  in flexcan_set_bittiming_cbt()
1282 	netdev_dbg(dev, "writing fdctrl=0x%08x\n", reg_fdctrl);  in flexcan_set_bittiming_cbt()
1283 	priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_set_bittiming_cbt()
1471 		u32 reg_fdctrl;  in flexcan_chip_start()  local
1473 		reg_fdctrl = priv->read(&regs->fdctrl);  in flexcan_chip_start()
1474 		reg_fdctrl &= ~(FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1, 0x3) |  in flexcan_chip_start()
1478 			reg_fdctrl |=  in flexcan_chip_start()
1484 			reg_fdctrl |=  in flexcan_chip_start()
1492 			   __func__, reg_fdctrl);  in flexcan_chip_start()
1493 		priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_chip_start()