142 			cc770_write_reg(priv, msgobj[mo].config, msgcfg);  in enable_all_objs()
143 			cc770_write_reg(priv, msgobj[mo].ctrl0,  in enable_all_objs()
148 				cc770_write_reg(priv, msgobj[mo].ctrl1,  in enable_all_objs()
152 				cc770_write_reg(priv, msgobj[mo].ctrl1,  in enable_all_objs()
159 			cc770_write_reg(priv, msgobj[mo].ctrl1,  in enable_all_objs()
162 			cc770_write_reg(priv, msgobj[mo].ctrl0,  in enable_all_objs()
180 			cc770_write_reg(priv, msgobj[mo].ctrl1,  in disable_all_objs()
183 			cc770_write_reg(priv, msgobj[mo].ctrl0,  in disable_all_objs()
188 			cc770_write_reg(priv, msgobj[mo].ctrl1,  in disable_all_objs()
191 			cc770_write_reg(priv, msgobj[mo].ctrl0,  in disable_all_objs()
263 		cc770_write_reg(priv, msgobj[mo].ctrl0,  in chipset_init()
266 		cc770_write_reg(priv, msgobj[mo].ctrl0,  in chipset_init()
269 		cc770_write_reg(priv, msgobj[mo].ctrl1,  in chipset_init()
273 			cc770_write_reg(priv, msgobj[mo].data[data], 0);  in chipset_init()
275 			cc770_write_reg(priv, msgobj[mo].id[id], 0);  in chipset_init()
276 		cc770_write_reg(priv, msgobj[mo].config, 0);  in chipset_init()
309 	cc770_write_reg(priv, msgobj[1].data[1], 0x25);  in cc770_probe_chip()
310 	cc770_write_reg(priv, msgobj[2].data[3], 0x52);  in cc770_probe_chip()
311 	cc770_write_reg(priv, msgobj[10].data[6], 0xc3);  in cc770_probe_chip()
312 	if ((cc770_read_reg(priv, msgobj[1].data[1]) != 0x25) ||  in cc770_probe_chip()
313 	    (cc770_read_reg(priv, msgobj[2].data[3]) != 0x52) ||  in cc770_probe_chip()
314 	    (cc770_read_reg(priv, msgobj[10].data[6]) != 0xc3)) {  in cc770_probe_chip()
397 	cc770_write_reg(priv, msgobj[mo].ctrl0,  in cc770_tx()
399 	cc770_write_reg(priv, msgobj[mo].ctrl1,  in cc770_tx()
404 		cc770_write_reg(priv, msgobj[mo].config,  in cc770_tx()
406 		cc770_write_reg(priv, msgobj[mo].id[3], id << 3);  in cc770_tx()
407 		cc770_write_reg(priv, msgobj[mo].id[2], id >> 5);  in cc770_tx()
408 		cc770_write_reg(priv, msgobj[mo].id[1], id >> 13);  in cc770_tx()
409 		cc770_write_reg(priv, msgobj[mo].id[0], id >> 21);  in cc770_tx()
412 		cc770_write_reg(priv, msgobj[mo].config, (dlc << 4) | rtr);  in cc770_tx()
413 		cc770_write_reg(priv, msgobj[mo].id[0], id >> 3);  in cc770_tx()
414 		cc770_write_reg(priv, msgobj[mo].id[1], id << 5);  in cc770_tx()
418 		cc770_write_reg(priv, msgobj[mo].data[i], cf->data[i]);  in cc770_tx()
420 	cc770_write_reg(priv, msgobj[mo].ctrl1,  in cc770_tx()
422 	cc770_write_reg(priv, msgobj[mo].ctrl0,  in cc770_tx()
437 			    msgobj[mo].ctrl1) & TXRQST_UNC) == TXRQST_SET) {  in cc770_start_xmit()
462 	config = cc770_read_reg(priv, msgobj[mo].config);  in cc770_rx()
476 			id = cc770_read_reg(priv, msgobj[mo].id[3]);  in cc770_rx()
477 			id |= cc770_read_reg(priv, msgobj[mo].id[2]) << 8;  in cc770_rx()
478 			id |= cc770_read_reg(priv, msgobj[mo].id[1]) << 16;  in cc770_rx()
479 			id |= cc770_read_reg(priv, msgobj[mo].id[0]) << 24;  in cc770_rx()
483 			id = cc770_read_reg(priv, msgobj[mo].id[1]);  in cc770_rx()
484 			id |= cc770_read_reg(priv, msgobj[mo].id[0]) << 8;  in cc770_rx()
491 			cf->data[i] = cc770_read_reg(priv, msgobj[mo].data[i]);  in cc770_rx()
608 		ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);  in cc770_rx_interrupt()
613 				if (!(cc770_read_reg(priv, msgobj[mo].ctrl0) &  in cc770_rx_interrupt()
626 			cc770_write_reg(priv, msgobj[mo].ctrl1,  in cc770_rx_interrupt()
631 		cc770_write_reg(priv, msgobj[mo].ctrl0,  in cc770_rx_interrupt()
634 		cc770_write_reg(priv, msgobj[mo].ctrl1,  in cc770_rx_interrupt()
648 		ctrl0 = cc770_read_reg(priv, msgobj[mo].ctrl0);  in cc770_rtr_interrupt()
652 		ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);  in cc770_rtr_interrupt()
655 		cc770_write_reg(priv, msgobj[mo].ctrl0,  in cc770_rtr_interrupt()
658 		cc770_write_reg(priv, msgobj[mo].ctrl1,  in cc770_rtr_interrupt()
672 	ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);  in cc770_tx_interrupt()
674 	cc770_write_reg(priv, msgobj[mo].ctrl0,  in cc770_tx_interrupt()
676 	cc770_write_reg(priv, msgobj[mo].ctrl1,  in cc770_tx_interrupt()