15 #include <linux/mtd/spi-nor.h>
100 	struct spi_nor nor;  member
119  * CE0 and CE1 can only be of type SPI. CE2 can be of type NOR but the
277 static void aspeed_smc_start_user(struct spi_nor *nor)  in aspeed_smc_start_user()  argument
279 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_start_user()
296 static void aspeed_smc_stop_user(struct spi_nor *nor)  in aspeed_smc_stop_user()  argument
298 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_stop_user()
308 static int aspeed_smc_prep(struct spi_nor *nor)  in aspeed_smc_prep()  argument
310 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_prep()
316 static void aspeed_smc_unprep(struct spi_nor *nor)  in aspeed_smc_unprep()  argument
318 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_unprep()
323 static int aspeed_smc_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,  in aspeed_smc_read_reg()  argument
326 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_read_reg()
328 	aspeed_smc_start_user(nor);  in aspeed_smc_read_reg()
331 	aspeed_smc_stop_user(nor);  in aspeed_smc_read_reg()
335 static int aspeed_smc_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf,  in aspeed_smc_write_reg()  argument
338 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_write_reg()
340 	aspeed_smc_start_user(nor);  in aspeed_smc_write_reg()
343 	aspeed_smc_stop_user(nor);  in aspeed_smc_write_reg()
347 static void aspeed_smc_send_cmd_addr(struct spi_nor *nor, u8 cmd, u32 addr)  in aspeed_smc_send_cmd_addr()  argument
349 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_send_cmd_addr()
353 	switch (nor->addr_width) {  in aspeed_smc_send_cmd_addr()
356 			  nor->addr_width);  in aspeed_smc_send_cmd_addr()
373 static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from,  in aspeed_smc_read_user()  argument
376 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_read_user()
380 	aspeed_smc_start_user(nor);  in aspeed_smc_read_user()
381 	aspeed_smc_send_cmd_addr(nor, nor->read_opcode, from);  in aspeed_smc_read_user()
382 	for (i = 0; i < chip->nor.read_dummy / 8; i++)  in aspeed_smc_read_user()
386 	aspeed_smc_stop_user(nor);  in aspeed_smc_read_user()
390 static ssize_t aspeed_smc_write_user(struct spi_nor *nor, loff_t to,  in aspeed_smc_write_user()  argument
393 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_write_user()
395 	aspeed_smc_start_user(nor);  in aspeed_smc_write_user()
396 	aspeed_smc_send_cmd_addr(nor, nor->program_opcode, to);  in aspeed_smc_write_user()
398 	aspeed_smc_stop_user(nor);  in aspeed_smc_write_user()
410 			mtd_device_unregister(&chip->nor.mtd);  in aspeed_smc_unregister()
489 		dev_warn(chip->nor.dev, "CE%d window resized to %dMB",  in chip_set_segment()
503 		dev_err(chip->nor.dev, "CE%d window invalid", cs);  in chip_set_segment()
510 	dev_info(chip->nor.dev, "CE%d window [ 0x%.8x - 0x%.8x ] %dMB",  in chip_set_segment()
528 	u32 size = chip->nor.mtd.size;  in aspeed_smc_chip_set_segment()
554 		dev_info(chip->nor.dev,  in aspeed_smc_chip_set_segment()
588 	if (size < chip->nor.mtd.size)  in aspeed_smc_chip_set_segment()
589 		dev_warn(chip->nor.dev,  in aspeed_smc_chip_set_segment()
591 			 chip->cs, (u32)chip->nor.mtd.size >> 20);  in aspeed_smc_chip_set_segment()
668 		dev_warn(chip->nor.dev, "CE%d window closed", chip->cs);  in aspeed_smc_chip_setup_init()
712 	if (chip->nor.addr_width == 4 && info->set_4b)  in aspeed_smc_chip_setup_finish()
722 		chip->nor.program_opcode << CONTROL_COMMAND_SHIFT |  in aspeed_smc_chip_setup_finish()
730 	 * SPI NOR flags to adjust controller settings.  in aspeed_smc_chip_setup_finish()
732 	if (chip->nor.read_proto == SNOR_PROTO_1_1_1) {  in aspeed_smc_chip_setup_finish()
733 		if (chip->nor.read_dummy == 0)  in aspeed_smc_chip_setup_finish()
738 		dev_err(chip->nor.dev, "unsupported SPI read mode\n");  in aspeed_smc_chip_setup_finish()
743 		CONTROL_IO_DUMMY_SET(chip->nor.read_dummy / 8);  in aspeed_smc_chip_setup_finish()
775 		struct spi_nor *nor;  in aspeed_smc_setup_flash()  local
778 		/* This driver does not support NAND or NOR flash devices. */  in aspeed_smc_setup_flash()
779 		if (!of_device_is_compatible(child, "jedec,spi-nor"))  in aspeed_smc_setup_flash()
797 				cs, dev_name(controller->chips[cs]->nor.dev));  in aspeed_smc_setup_flash()
812 		nor = &chip->nor;  in aspeed_smc_setup_flash()
813 		mtd = &nor->mtd;  in aspeed_smc_setup_flash()
815 		nor->dev = dev;  in aspeed_smc_setup_flash()
816 		nor->priv = chip;  in aspeed_smc_setup_flash()
817 		spi_nor_set_flash_node(nor, child);  in aspeed_smc_setup_flash()
818 		nor->controller_ops = &aspeed_smc_controller_ops;  in aspeed_smc_setup_flash()
829 		ret = spi_nor_scan(nor, NULL, &hwcaps);  in aspeed_smc_setup_flash()