Lines Matching refs:tmio

134 	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));  in tmio_nand_hwcontrol()  local
155 tmio_iowrite8(mode, tmio->fcr + FCR_MODE); in tmio_nand_hwcontrol()
156 tmio->read_good = 0; in tmio_nand_hwcontrol()
165 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip)); in tmio_nand_dev_ready() local
167 return !(tmio_ioread8(tmio->fcr + FCR_STATUS) & FCR_STATUS_BUSY); in tmio_nand_dev_ready()
172 struct tmio_nand *tmio = __tmio; in tmio_irq() local
175 tmio_iowrite8(0x00, tmio->fcr + FCR_IMR); in tmio_irq()
176 complete(&tmio->comp); in tmio_irq()
189 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(nand_chip)); in tmio_nand_wait() local
195 tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR); in tmio_nand_wait()
196 reinit_completion(&tmio->comp); in tmio_nand_wait()
197 tmio_iowrite8(0x81, tmio->fcr + FCR_IMR); in tmio_nand_wait()
200 timeout = wait_for_completion_timeout(&tmio->comp, in tmio_nand_wait()
204 tmio_iowrite8(0x00, tmio->fcr + FCR_IMR); in tmio_nand_wait()
205 dev_warn(&tmio->dev->dev, "still busy after 400 ms\n"); in tmio_nand_wait()
208 tmio_iowrite8(0x00, tmio->fcr + FCR_IMR); in tmio_nand_wait()
209 dev_warn(&tmio->dev->dev, "timeout waiting for interrupt\n"); in tmio_nand_wait()
226 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip)); in tmio_nand_read_byte() local
229 if (tmio->read_good--) in tmio_nand_read_byte()
230 return tmio->read; in tmio_nand_read_byte()
232 data = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_read_byte()
233 tmio->read = data >> 8; in tmio_nand_read_byte()
246 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip)); in tmio_nand_write_buf() local
248 tmio_iowrite16_rep(tmio->fcr + FCR_DATA, buf, len >> 1); in tmio_nand_write_buf()
253 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip)); in tmio_nand_read_buf() local
255 tmio_ioread16_rep(tmio->fcr + FCR_DATA, buf, len >> 1); in tmio_nand_read_buf()
260 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip)); in tmio_nand_enable_hwecc() local
262 tmio_iowrite8(FCR_MODE_HWECC_RESET, tmio->fcr + FCR_MODE); in tmio_nand_enable_hwecc()
263 tmio_ioread8(tmio->fcr + FCR_DATA); /* dummy read */ in tmio_nand_enable_hwecc()
264 tmio_iowrite8(FCR_MODE_HWECC_CALC, tmio->fcr + FCR_MODE); in tmio_nand_enable_hwecc()
270 struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip)); in tmio_nand_calculate_ecc() local
273 tmio_iowrite8(FCR_MODE_HWECC_RESULT, tmio->fcr + FCR_MODE); in tmio_nand_calculate_ecc()
275 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
278 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
281 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
285 tmio_iowrite8(FCR_MODE_DATA, tmio->fcr + FCR_MODE); in tmio_nand_calculate_ecc()
306 static int tmio_hw_init(struct platform_device *dev, struct tmio_nand *tmio) in tmio_hw_init() argument
318 tmio_iowrite8(0x81, tmio->ccr + CCR_ICC); in tmio_hw_init()
321 tmio_iowrite16(tmio->fcr_base, tmio->ccr + CCR_BASE); in tmio_hw_init()
322 tmio_iowrite16(tmio->fcr_base >> 16, tmio->ccr + CCR_BASE + 2); in tmio_hw_init()
325 tmio_iowrite8(0x02, tmio->ccr + CCR_COMMAND); in tmio_hw_init()
329 tmio_iowrite8(0x02, tmio->ccr + CCR_NFPSC); in tmio_hw_init()
332 tmio_iowrite8(0x02, tmio->ccr + CCR_NFDC); in tmio_hw_init()
335 tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR); in tmio_hw_init()
338 tmio_iowrite8(FCR_MODE_POWER_ON, tmio->fcr + FCR_MODE); in tmio_hw_init()
339 tmio_iowrite8(FCR_MODE_COMMAND, tmio->fcr + FCR_MODE); in tmio_hw_init()
340 tmio_iowrite8(NAND_CMD_RESET, tmio->fcr + FCR_DATA); in tmio_hw_init()
343 tmio_iowrite8(FCR_MODE_STANDBY, tmio->fcr + FCR_MODE); in tmio_hw_init()
350 static void tmio_hw_stop(struct platform_device *dev, struct tmio_nand *tmio) in tmio_hw_stop() argument
354 tmio_iowrite8(FCR_MODE_POWER_OFF, tmio->fcr + FCR_MODE); in tmio_hw_stop()
386 struct tmio_nand *tmio; in tmio_probe() local
394 tmio = devm_kzalloc(&dev->dev, sizeof(*tmio), GFP_KERNEL); in tmio_probe()
395 if (!tmio) in tmio_probe()
398 init_completion(&tmio->comp); in tmio_probe()
400 tmio->dev = dev; in tmio_probe()
402 platform_set_drvdata(dev, tmio); in tmio_probe()
403 nand_chip = &tmio->chip; in tmio_probe()
408 nand_controller_init(&tmio->controller); in tmio_probe()
409 tmio->controller.ops = &tmio_ops; in tmio_probe()
410 nand_chip->controller = &tmio->controller; in tmio_probe()
412 tmio->ccr = devm_ioremap(&dev->dev, ccr->start, resource_size(ccr)); in tmio_probe()
413 if (!tmio->ccr) in tmio_probe()
416 tmio->fcr_base = fcr->start & 0xfffff; in tmio_probe()
417 tmio->fcr = devm_ioremap(&dev->dev, fcr->start, resource_size(fcr)); in tmio_probe()
418 if (!tmio->fcr) in tmio_probe()
421 retval = tmio_hw_init(dev, tmio); in tmio_probe()
426 nand_chip->legacy.IO_ADDR_R = tmio->fcr; in tmio_probe()
427 nand_chip->legacy.IO_ADDR_W = tmio->fcr; in tmio_probe()
443 dev_name(&dev->dev), tmio); in tmio_probe()
449 tmio->irq = irq; in tmio_probe()
469 tmio_hw_stop(dev, tmio); in tmio_probe()
475 struct tmio_nand *tmio = platform_get_drvdata(dev); in tmio_remove() local
476 struct nand_chip *chip = &tmio->chip; in tmio_remove()
482 tmio_hw_stop(dev, tmio); in tmio_remove()