Lines Matching +full:tcs +full:- +full:wait
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/dma-mapping.h>
281 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init()
283 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()
287 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
289 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()
290 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()
293 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()
294 pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
295 pmem |= FIELD_PREP(FMC2_PMEM_MEMHOLD, timings->thold_mem); in stm32_fmc2_nfc_timings_init()
296 pmem |= FIELD_PREP(FMC2_PMEM_MEMHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
297 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
300 patt = FIELD_PREP(FMC2_PATT_ATTSET, timings->tset_att); in stm32_fmc2_nfc_timings_init()
301 patt |= FIELD_PREP(FMC2_PATT_ATTWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
302 patt |= FIELD_PREP(FMC2_PATT_ATTHOLD, timings->thold_att); in stm32_fmc2_nfc_timings_init()
303 patt |= FIELD_PREP(FMC2_PATT_ATTHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
304 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
309 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup()
315 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_setup()
318 } else if (chip->ecc.strength == FMC2_ECC_BCH4) { in stm32_fmc2_nfc_setup()
324 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_setup()
331 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
336 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip()
341 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
344 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
348 if (nfc->dma_tx_ch && nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
350 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
351 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
357 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
359 dev_err(nfc->dev, "tx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
363 ret = dmaengine_slave_config(nfc->dma_rx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
365 dev_err(nfc->dev, "rx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
370 if (nfc->dma_ecc_ch) { in stm32_fmc2_nfc_select_chip()
376 dma_cfg.src_addr = nfc->io_phys_addr; in stm32_fmc2_nfc_select_chip()
377 dma_cfg.src_addr += chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
381 ret = dmaengine_slave_config(nfc->dma_ecc_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
383 dev_err(nfc->dev, "ECC DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
388 nfc->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
402 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_PWID, pcr); in stm32_fmc2_nfc_set_buswidth_16()
407 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_ECCEN, in stm32_fmc2_nfc_set_ecc()
413 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
415 regmap_update_bits(nfc->regmap, FMC2_CSQIER, in stm32_fmc2_nfc_enable_seq_irq()
421 regmap_update_bits(nfc->regmap, FMC2_CSQIER, FMC2_CSQIER_TCIE, 0); in stm32_fmc2_nfc_disable_seq_irq()
423 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
428 regmap_write(nfc->regmap, FMC2_CSQICR, FMC2_CSQICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_seq_irq()
433 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
436 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
439 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
445 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_disable_bch_irq()
448 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
453 regmap_write(nfc->regmap, FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_bch_irq()
462 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_hwctl()
466 if (chip->ecc.strength != FMC2_ECC_HAM) { in stm32_fmc2_nfc_hwctl()
467 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_hwctl()
470 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_hwctl()
481 * max of 1-bit)
493 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_ham_calculate()
497 ret = regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_ham_calculate()
501 dev_err(nfc->dev, "ham timeout\n"); in stm32_fmc2_nfc_ham_calculate()
505 regmap_read(nfc->regmap, FMC2_HECCR, &heccr); in stm32_fmc2_nfc_ham_calculate()
537 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
552 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
567 * max of 4-bit/8-bit)
572 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_calculate()
575 /* Wait until the BCH code is ready */ in stm32_fmc2_nfc_bch_calculate()
576 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_calculate()
578 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_calculate()
580 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_calculate()
584 regmap_read(nfc->regmap, FMC2_BCHPBR1, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
590 regmap_read(nfc->regmap, FMC2_BCHPBR2, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
595 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_bch_calculate()
598 regmap_read(nfc->regmap, FMC2_BCHPBR3, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
604 regmap_read(nfc->regmap, FMC2_BCHPBR4, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
630 return -EBADMSG; in stm32_fmc2_nfc_bch_decode()
655 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_correct()
658 /* Wait until the decoding error is ready */ in stm32_fmc2_nfc_bch_correct()
659 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_correct()
661 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_correct()
663 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_correct()
666 regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5); in stm32_fmc2_nfc_bch_correct()
670 return stm32_fmc2_nfc_bch_decode(chip->ecc.size, dat, ecc_sta); in stm32_fmc2_nfc_bch_correct()
677 int ret, i, s, stat, eccsize = chip->ecc.size; in stm32_fmc2_nfc_read_page()
678 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_read_page()
679 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_read_page()
680 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_read_page()
682 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_read_page()
683 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_read_page()
690 for (i = mtd->writesize + FMC2_BBM_LEN, s = 0; s < eccsteps; in stm32_fmc2_nfc_read_page()
692 chip->ecc.hwctl(chip, NAND_ECC_READ); in stm32_fmc2_nfc_read_page()
707 stat = chip->ecc.correct(chip, p, ecc_code, ecc_calc); in stm32_fmc2_nfc_read_page()
708 if (stat == -EBADMSG) in stm32_fmc2_nfc_read_page()
716 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_read_page()
718 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_read_page()
725 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_read_page()
726 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_read_page()
739 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_rw_page_init()
741 u32 ecc_offset = mtd->writesize + FMC2_BBM_LEN; in stm32_fmc2_nfc_rw_page_init()
748 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_rw_page_init()
752 * - Set Program Page/Page Read command in stm32_fmc2_nfc_rw_page_init()
753 * - Enable DMA request data in stm32_fmc2_nfc_rw_page_init()
754 * - Set timings in stm32_fmc2_nfc_rw_page_init()
766 * - Set Random Data Input/Random Data Read command in stm32_fmc2_nfc_rw_page_init()
767 * - Enable the sequencer to access the Spare data area in stm32_fmc2_nfc_rw_page_init()
768 * - Enable DMA request status decoding for read in stm32_fmc2_nfc_rw_page_init()
769 * - Set timings in stm32_fmc2_nfc_rw_page_init()
785 * - Set the number of sectors to be written in stm32_fmc2_nfc_rw_page_init()
786 * - Set timings in stm32_fmc2_nfc_rw_page_init()
788 cfg[2] = FIELD_PREP(FMC2_CSQCFGR3_SNBR, chip->ecc.steps - 1); in stm32_fmc2_nfc_rw_page_init()
791 if (chip->options & NAND_ROW_ADDR_3) in stm32_fmc2_nfc_rw_page_init()
806 * - Set chip enable number in stm32_fmc2_nfc_rw_page_init()
807 * - Set ECC byte offset in the spare area in stm32_fmc2_nfc_rw_page_init()
808 * - Calculate the number of address cycles to be issued in stm32_fmc2_nfc_rw_page_init()
809 * - Set byte 5 of address cycle if needed in stm32_fmc2_nfc_rw_page_init()
811 cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel); in stm32_fmc2_nfc_rw_page_init()
812 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_rw_page_init()
816 if (chip->options & NAND_ROW_ADDR_3) { in stm32_fmc2_nfc_rw_page_init()
823 regmap_bulk_write(nfc->regmap, FMC2_CSQCFGR1, cfg, 5); in stm32_fmc2_nfc_rw_page_init()
835 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_xfer()
838 struct dma_chan *dma_ch = nfc->dma_rx_ch; in stm32_fmc2_nfc_xfer()
841 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_xfer()
842 int eccsize = chip->ecc.size; in stm32_fmc2_nfc_xfer()
851 dma_ch = nfc->dma_tx_ch; in stm32_fmc2_nfc_xfer()
854 for_each_sg(nfc->dma_data_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
859 ret = dma_map_sg(nfc->dev, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
864 desc_data = dmaengine_prep_slave_sg(dma_ch, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
868 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
872 reinit_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_xfer()
873 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_xfer()
874 desc_data->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
875 desc_data->callback_param = &nfc->dma_data_complete; in stm32_fmc2_nfc_xfer()
884 p = nfc->ecc_buf; in stm32_fmc2_nfc_xfer()
885 for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
886 sg_set_buf(sg, p, nfc->dma_ecc_len); in stm32_fmc2_nfc_xfer()
887 p += nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
890 ret = dma_map_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
895 desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch, in stm32_fmc2_nfc_xfer()
896 nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
900 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
904 reinit_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_xfer()
905 desc_ecc->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
906 desc_ecc->callback_param = &nfc->dma_ecc_complete; in stm32_fmc2_nfc_xfer()
911 dma_async_issue_pending(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
918 regmap_update_bits(nfc->regmap, FMC2_CSQCR, in stm32_fmc2_nfc_xfer()
921 /* Wait end of sequencer transfer */ in stm32_fmc2_nfc_xfer()
922 if (!wait_for_completion_timeout(&nfc->complete, timeout)) { in stm32_fmc2_nfc_xfer()
923 dev_err(nfc->dev, "seq timeout\n"); in stm32_fmc2_nfc_xfer()
927 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
928 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
932 /* Wait DMA data transfer completion */ in stm32_fmc2_nfc_xfer()
933 if (!wait_for_completion_timeout(&nfc->dma_data_complete, timeout)) { in stm32_fmc2_nfc_xfer()
934 dev_err(nfc->dev, "data DMA timeout\n"); in stm32_fmc2_nfc_xfer()
936 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
939 /* Wait DMA ECC transfer completion */ in stm32_fmc2_nfc_xfer()
941 if (!wait_for_completion_timeout(&nfc->dma_ecc_complete, in stm32_fmc2_nfc_xfer()
943 dev_err(nfc->dev, "ECC DMA timeout\n"); in stm32_fmc2_nfc_xfer()
944 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
945 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
951 dma_unmap_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
955 dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir); in stm32_fmc2_nfc_xfer()
976 ret = nand_change_write_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_write()
977 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_write()
991 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page()
1004 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page_raw()
1016 regmap_read(nfc->regmap, FMC2_CSQEMSR, &csqemsr); in stm32_fmc2_nfc_get_mapping_status()
1025 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_correct()
1026 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_seq_correct()
1027 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_seq_correct()
1028 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_seq_correct()
1029 int i, s, eccsize = chip->ecc.size; in stm32_fmc2_nfc_seq_correct()
1030 u32 *ecc_sta = (u32 *)nfc->ecc_buf; in stm32_fmc2_nfc_seq_correct()
1061 if (stat == -EBADMSG) in stm32_fmc2_nfc_seq_correct()
1070 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_seq_correct()
1072 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_seq_correct()
1084 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_read_page()
1085 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_seq_read_page()
1086 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_seq_read_page()
1090 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page()
1107 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1108 chip->oob_poi, in stm32_fmc2_nfc_seq_read_page()
1109 mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1115 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1116 chip->oob_poi, mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1120 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in stm32_fmc2_nfc_seq_read_page()
1121 chip->ecc.total); in stm32_fmc2_nfc_seq_read_page()
1126 return chip->ecc.correct(chip, buf, ecc_code, ecc_calc); in stm32_fmc2_nfc_seq_read_page()
1135 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page_raw()
1149 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page_raw()
1150 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_read_page_raw()
1160 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1163 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
1167 complete(&nfc->complete); in stm32_fmc2_nfc_irq()
1175 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_read_data()
1176 void __iomem *io_addr_r = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_read_data()
1178 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1179 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_read_data()
1186 len -= sizeof(u8); in stm32_fmc2_nfc_read_data()
1193 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1201 len -= sizeof(u32); in stm32_fmc2_nfc_read_data()
1208 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1214 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1215 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_read_data()
1222 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_write_data()
1223 void __iomem *io_addr_w = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_write_data()
1225 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1226 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_write_data()
1233 len -= sizeof(u8); in stm32_fmc2_nfc_write_data()
1240 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1248 len -= sizeof(u32); in stm32_fmc2_nfc_write_data()
1255 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1261 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1262 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_write_data()
1269 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_waitrdy()
1274 if (regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_waitrdy()
1277 dev_warn(nfc->dev, "Waitrdy timeout\n"); in stm32_fmc2_nfc_waitrdy()
1279 /* Wait tWB before R/B# signal is low */ in stm32_fmc2_nfc_waitrdy()
1281 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy()
1284 regmap_write(nfc->regmap, FMC2_ICR, FMC2_ICR_CIHLF); in stm32_fmc2_nfc_waitrdy()
1286 /* Wait R/B# signal is high */ in stm32_fmc2_nfc_waitrdy()
1287 return regmap_read_poll_timeout(nfc->regmap, FMC2_ISR, isr, in stm32_fmc2_nfc_waitrdy()
1296 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_exec_op()
1304 ret = stm32_fmc2_nfc_select_chip(chip, op->cs); in stm32_fmc2_nfc_exec_op()
1308 for (op_id = 0; op_id < op->ninstrs; op_id++) { in stm32_fmc2_nfc_exec_op()
1309 instr = &op->instrs[op_id]; in stm32_fmc2_nfc_exec_op()
1311 switch (instr->type) { in stm32_fmc2_nfc_exec_op()
1313 writeb_relaxed(instr->ctx.cmd.opcode, in stm32_fmc2_nfc_exec_op()
1314 nfc->cmd_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1318 for (i = 0; i < instr->ctx.addr.naddrs; i++) in stm32_fmc2_nfc_exec_op()
1319 writeb_relaxed(instr->ctx.addr.addrs[i], in stm32_fmc2_nfc_exec_op()
1320 nfc->addr_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1324 stm32_fmc2_nfc_read_data(chip, instr->ctx.data.buf.in, in stm32_fmc2_nfc_exec_op()
1325 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1326 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1330 stm32_fmc2_nfc_write_data(chip, instr->ctx.data.buf.out, in stm32_fmc2_nfc_exec_op()
1331 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1332 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1336 timeout = instr->ctx.waitrdy.timeout_ms; in stm32_fmc2_nfc_exec_op()
1349 regmap_read(nfc->regmap, FMC2_PCR, &pcr); in stm32_fmc2_nfc_init()
1352 nfc->cs_sel = -1; in stm32_fmc2_nfc_init()
1354 /* Enable wait feature and nand flash memory bank */ in stm32_fmc2_nfc_init()
1380 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_init()
1381 regmap_update_bits(nfc->regmap, FMC2_BCR1, in stm32_fmc2_nfc_init()
1384 regmap_write(nfc->regmap, FMC2_PCR, pcr); in stm32_fmc2_nfc_init()
1385 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); in stm32_fmc2_nfc_init()
1386 regmap_write(nfc->regmap, FMC2_PATT, FMC2_PATT_DEFAULT); in stm32_fmc2_nfc_init()
1392 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_calc_timings()
1394 struct stm32_fmc2_timings *tims = &nand->timings; in stm32_fmc2_nfc_calc_timings()
1395 unsigned long hclk = clk_get_rate(nfc->clk); in stm32_fmc2_nfc_calc_timings()
1400 tar = max_t(unsigned long, hclkp, sdrt->tAR_min); in stm32_fmc2_nfc_calc_timings()
1401 timing = DIV_ROUND_UP(tar, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1402 tims->tar = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1404 tclr = max_t(unsigned long, hclkp, sdrt->tCLR_min); in stm32_fmc2_nfc_calc_timings()
1405 timing = DIV_ROUND_UP(tclr, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1406 tims->tclr = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1408 tims->thiz = FMC2_THIZ; in stm32_fmc2_nfc_calc_timings()
1409 thiz = (tims->thiz + 1) * hclkp; in stm32_fmc2_nfc_calc_timings()
1416 twait = max_t(unsigned long, hclkp, sdrt->tRP_min); in stm32_fmc2_nfc_calc_timings()
1417 twait = max_t(unsigned long, twait, sdrt->tWP_min); in stm32_fmc2_nfc_calc_timings()
1418 twait = max_t(unsigned long, twait, sdrt->tREA_max + FMC2_TIO); in stm32_fmc2_nfc_calc_timings()
1420 tims->twait = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1423 * tSETUP_MEM > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1424 * tSETUP_MEM > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1425 * tSETUP_MEM > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1428 if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1429 tset_mem = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1430 if (sdrt->tALS_min > twait && (tset_mem < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1431 tset_mem = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1432 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1433 (tset_mem < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1434 tset_mem = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1436 tims->tset_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1440 * tHOLD_MEM > tREH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1441 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings()
1443 thold_mem = max_t(unsigned long, hclkp, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1444 if (sdrt->tREH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1445 (thold_mem < sdrt->tREH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1446 thold_mem = sdrt->tREH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1447 if ((sdrt->tRC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1448 (thold_mem < sdrt->tRC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1449 thold_mem = sdrt->tRC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1450 if ((sdrt->tWC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1451 (thold_mem < sdrt->tWC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1452 thold_mem = sdrt->tWC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1454 tims->thold_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1457 * tSETUP_ATT > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1458 * tSETUP_ATT > tCLS - tWAIT in stm32_fmc2_nfc_calc_timings()
1459 * tSETUP_ATT > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1460 * tSETUP_ATT > tRHW - tHOLD_MEM in stm32_fmc2_nfc_calc_timings()
1461 * tSETUP_ATT > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1464 if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1465 tset_att = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1466 if (sdrt->tCLS_min > twait && (tset_att < sdrt->tCLS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1467 tset_att = sdrt->tCLS_min - twait; in stm32_fmc2_nfc_calc_timings()
1468 if (sdrt->tALS_min > twait && (tset_att < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1469 tset_att = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1470 if (sdrt->tRHW_min > thold_mem && in stm32_fmc2_nfc_calc_timings()
1471 (tset_att < sdrt->tRHW_min - thold_mem)) in stm32_fmc2_nfc_calc_timings()
1472 tset_att = sdrt->tRHW_min - thold_mem; in stm32_fmc2_nfc_calc_timings()
1473 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1474 (tset_att < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1475 tset_att = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1477 tims->tset_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1485 * tHOLD_ATT > tWB + tIO + tSYNC - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1486 * tHOLD_ATT > tADL - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1487 * tHOLD_ATT > tWH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1488 * tHOLD_ATT > tWHR - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1489 * tHOLD_ATT > tRC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1490 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1492 thold_att = max_t(unsigned long, hclkp, sdrt->tALH_min); in stm32_fmc2_nfc_calc_timings()
1493 thold_att = max_t(unsigned long, thold_att, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1494 thold_att = max_t(unsigned long, thold_att, sdrt->tCLH_min); in stm32_fmc2_nfc_calc_timings()
1495 thold_att = max_t(unsigned long, thold_att, sdrt->tCOH_min); in stm32_fmc2_nfc_calc_timings()
1496 thold_att = max_t(unsigned long, thold_att, sdrt->tDH_min); in stm32_fmc2_nfc_calc_timings()
1497 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings()
1498 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1499 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
1500 if (sdrt->tADL_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1501 (thold_att < sdrt->tADL_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1502 thold_att = sdrt->tADL_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1503 if (sdrt->tWH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1504 (thold_att < sdrt->tWH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1505 thold_att = sdrt->tWH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1506 if (sdrt->tWHR_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1507 (thold_att < sdrt->tWHR_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1508 thold_att = sdrt->tWHR_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1509 if ((sdrt->tRC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1510 (thold_att < sdrt->tRC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1511 thold_att = sdrt->tRC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1512 if ((sdrt->tWC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1513 (thold_att < sdrt->tWC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1514 thold_att = sdrt->tWC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1516 tims->thold_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1541 nfc->dma_tx_ch = dma_request_chan(nfc->dev, "tx"); in stm32_fmc2_nfc_dma_setup()
1542 if (IS_ERR(nfc->dma_tx_ch)) { in stm32_fmc2_nfc_dma_setup()
1543 ret = PTR_ERR(nfc->dma_tx_ch); in stm32_fmc2_nfc_dma_setup()
1544 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1545 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1547 nfc->dma_tx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1551 nfc->dma_rx_ch = dma_request_chan(nfc->dev, "rx"); in stm32_fmc2_nfc_dma_setup()
1552 if (IS_ERR(nfc->dma_rx_ch)) { in stm32_fmc2_nfc_dma_setup()
1553 ret = PTR_ERR(nfc->dma_rx_ch); in stm32_fmc2_nfc_dma_setup()
1554 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1555 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1557 nfc->dma_rx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1561 nfc->dma_ecc_ch = dma_request_chan(nfc->dev, "ecc"); in stm32_fmc2_nfc_dma_setup()
1562 if (IS_ERR(nfc->dma_ecc_ch)) { in stm32_fmc2_nfc_dma_setup()
1563 ret = PTR_ERR(nfc->dma_ecc_ch); in stm32_fmc2_nfc_dma_setup()
1564 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1565 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1567 nfc->dma_ecc_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1571 ret = sg_alloc_table(&nfc->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1576 nfc->ecc_buf = devm_kzalloc(nfc->dev, FMC2_MAX_ECC_BUF_LEN, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1577 if (!nfc->ecc_buf) in stm32_fmc2_nfc_dma_setup()
1578 return -ENOMEM; in stm32_fmc2_nfc_dma_setup()
1580 ret = sg_alloc_table(&nfc->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1584 init_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_dma_setup()
1585 init_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_dma_setup()
1590 if (ret == -ENODEV) { in stm32_fmc2_nfc_dma_setup()
1591 dev_warn(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1601 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_nand_callbacks_setup()
1607 if (nfc->dma_tx_ch && nfc->dma_rx_ch && nfc->dma_ecc_ch) { in stm32_fmc2_nfc_nand_callbacks_setup()
1609 chip->ecc.correct = stm32_fmc2_nfc_seq_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1610 chip->ecc.write_page = stm32_fmc2_nfc_seq_write_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1611 chip->ecc.read_page = stm32_fmc2_nfc_seq_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1612 chip->ecc.write_page_raw = stm32_fmc2_nfc_seq_write_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1613 chip->ecc.read_page_raw = stm32_fmc2_nfc_seq_read_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1616 chip->ecc.hwctl = stm32_fmc2_nfc_hwctl; in stm32_fmc2_nfc_nand_callbacks_setup()
1617 if (chip->ecc.strength == FMC2_ECC_HAM) { in stm32_fmc2_nfc_nand_callbacks_setup()
1619 chip->ecc.calculate = stm32_fmc2_nfc_ham_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1620 chip->ecc.correct = stm32_fmc2_nfc_ham_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1621 chip->ecc.options |= NAND_ECC_GENERIC_ERASED_CHECK; in stm32_fmc2_nfc_nand_callbacks_setup()
1624 chip->ecc.calculate = stm32_fmc2_nfc_bch_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1625 chip->ecc.correct = stm32_fmc2_nfc_bch_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1626 chip->ecc.read_page = stm32_fmc2_nfc_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1631 if (chip->ecc.strength == FMC2_ECC_HAM) in stm32_fmc2_nfc_nand_callbacks_setup()
1632 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 4 : 3; in stm32_fmc2_nfc_nand_callbacks_setup()
1633 else if (chip->ecc.strength == FMC2_ECC_BCH8) in stm32_fmc2_nfc_nand_callbacks_setup()
1634 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 14 : 13; in stm32_fmc2_nfc_nand_callbacks_setup()
1636 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 8 : 7; in stm32_fmc2_nfc_nand_callbacks_setup()
1643 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_ecc()
1646 return -ERANGE; in stm32_fmc2_nfc_ooblayout_ecc()
1648 oobregion->length = ecc->total; in stm32_fmc2_nfc_ooblayout_ecc()
1649 oobregion->offset = FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_ecc()
1658 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_free()
1661 return -ERANGE; in stm32_fmc2_nfc_ooblayout_free()
1663 oobregion->length = mtd->oobsize - ecc->total - FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1664 oobregion->offset = ecc->total + FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1694 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_attach_chip()
1705 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) { in stm32_fmc2_nfc_attach_chip()
1706 dev_err(nfc->dev, in stm32_fmc2_nfc_attach_chip()
1708 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1712 if (!chip->ecc.size) in stm32_fmc2_nfc_attach_chip()
1713 chip->ecc.size = FMC2_ECC_STEP_SIZE; in stm32_fmc2_nfc_attach_chip()
1715 if (!chip->ecc.strength) in stm32_fmc2_nfc_attach_chip()
1716 chip->ecc.strength = FMC2_ECC_BCH8; in stm32_fmc2_nfc_attach_chip()
1719 mtd->oobsize - FMC2_BBM_LEN); in stm32_fmc2_nfc_attach_chip()
1721 dev_err(nfc->dev, "no valid ECC settings set\n"); in stm32_fmc2_nfc_attach_chip()
1725 if (mtd->writesize / chip->ecc.size > FMC2_MAX_SG) { in stm32_fmc2_nfc_attach_chip()
1726 dev_err(nfc->dev, "nand page size is not supported\n"); in stm32_fmc2_nfc_attach_chip()
1727 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1730 if (chip->bbt_options & NAND_BBT_USE_FLASH) in stm32_fmc2_nfc_attach_chip()
1731 chip->bbt_options |= NAND_BBT_NO_OOB; in stm32_fmc2_nfc_attach_chip()
1751 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_parse_child()
1755 if (!of_get_property(dn, "reg", &nand->ncs)) in stm32_fmc2_nfc_parse_child()
1756 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1758 nand->ncs /= sizeof(u32); in stm32_fmc2_nfc_parse_child()
1759 if (!nand->ncs) { in stm32_fmc2_nfc_parse_child()
1760 dev_err(nfc->dev, "invalid reg property size\n"); in stm32_fmc2_nfc_parse_child()
1761 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1764 for (i = 0; i < nand->ncs; i++) { in stm32_fmc2_nfc_parse_child()
1767 dev_err(nfc->dev, "could not retrieve reg property: %d\n", in stm32_fmc2_nfc_parse_child()
1773 dev_err(nfc->dev, "invalid reg value: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1774 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1777 if (nfc->cs_assigned & BIT(cs)) { in stm32_fmc2_nfc_parse_child()
1778 dev_err(nfc->dev, "cs already assigned: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1779 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1782 nfc->cs_assigned |= BIT(cs); in stm32_fmc2_nfc_parse_child()
1783 nand->cs_used[i] = cs; in stm32_fmc2_nfc_parse_child()
1786 nand_set_flash_node(&nand->chip, dn); in stm32_fmc2_nfc_parse_child()
1793 struct device_node *dn = nfc->dev->of_node; in stm32_fmc2_nfc_parse_dt()
1799 dev_err(nfc->dev, "NAND chip not defined\n"); in stm32_fmc2_nfc_parse_dt()
1800 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1804 dev_err(nfc->dev, "too many NAND chips defined\n"); in stm32_fmc2_nfc_parse_dt()
1805 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1821 struct device *dev = nfc->dev; in stm32_fmc2_nfc_set_cdev()
1824 if (dev->parent && of_device_is_compatible(dev->parent->of_node, in stm32_fmc2_nfc_set_cdev()
1825 "st,stm32mp1-fmc2-ebi")) in stm32_fmc2_nfc_set_cdev()
1828 if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { in stm32_fmc2_nfc_set_cdev()
1830 nfc->cdev = dev->parent; in stm32_fmc2_nfc_set_cdev()
1835 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1839 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1841 nfc->cdev = dev; in stm32_fmc2_nfc_set_cdev()
1848 struct device *dev = &pdev->dev; in stm32_fmc2_nfc_probe()
1861 return -ENOMEM; in stm32_fmc2_nfc_probe()
1863 nfc->dev = dev; in stm32_fmc2_nfc_probe()
1864 nand_controller_init(&nfc->base); in stm32_fmc2_nfc_probe()
1865 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; in stm32_fmc2_nfc_probe()
1875 ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); in stm32_fmc2_nfc_probe()
1879 nfc->io_phys_addr = cres.start; in stm32_fmc2_nfc_probe()
1881 nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); in stm32_fmc2_nfc_probe()
1882 if (IS_ERR(nfc->regmap)) in stm32_fmc2_nfc_probe()
1883 return PTR_ERR(nfc->regmap); in stm32_fmc2_nfc_probe()
1885 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_probe()
1890 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_probe()
1894 nfc->data_base[chip_cs] = devm_ioremap_resource(dev, res); in stm32_fmc2_nfc_probe()
1895 if (IS_ERR(nfc->data_base[chip_cs])) in stm32_fmc2_nfc_probe()
1896 return PTR_ERR(nfc->data_base[chip_cs]); in stm32_fmc2_nfc_probe()
1898 nfc->data_phys_addr[chip_cs] = res->start; in stm32_fmc2_nfc_probe()
1902 nfc->cmd_base[chip_cs] = devm_ioremap_resource(dev, res); in stm32_fmc2_nfc_probe()
1903 if (IS_ERR(nfc->cmd_base[chip_cs])) in stm32_fmc2_nfc_probe()
1904 return PTR_ERR(nfc->cmd_base[chip_cs]); in stm32_fmc2_nfc_probe()
1908 nfc->addr_base[chip_cs] = devm_ioremap_resource(dev, res); in stm32_fmc2_nfc_probe()
1909 if (IS_ERR(nfc->addr_base[chip_cs])) in stm32_fmc2_nfc_probe()
1910 return PTR_ERR(nfc->addr_base[chip_cs]); in stm32_fmc2_nfc_probe()
1924 init_completion(&nfc->complete); in stm32_fmc2_nfc_probe()
1926 nfc->clk = devm_clk_get(nfc->cdev, NULL); in stm32_fmc2_nfc_probe()
1927 if (IS_ERR(nfc->clk)) in stm32_fmc2_nfc_probe()
1928 return PTR_ERR(nfc->clk); in stm32_fmc2_nfc_probe()
1930 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_probe()
1939 if (ret == -EPROBE_DEFER) in stm32_fmc2_nfc_probe()
1952 nand = &nfc->nand; in stm32_fmc2_nfc_probe()
1953 chip = &nand->chip; in stm32_fmc2_nfc_probe()
1955 mtd->dev.parent = dev; in stm32_fmc2_nfc_probe()
1957 chip->controller = &nfc->base; in stm32_fmc2_nfc_probe()
1958 chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | in stm32_fmc2_nfc_probe()
1962 ret = nand_scan(chip, nand->ncs); in stm32_fmc2_nfc_probe()
1978 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_probe()
1979 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_probe()
1980 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_probe()
1981 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_probe()
1982 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_probe()
1983 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_probe()
1985 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_probe()
1986 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_probe()
1989 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_probe()
1997 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_remove()
1998 struct nand_chip *chip = &nand->chip; in stm32_fmc2_nfc_remove()
2005 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_remove()
2006 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_remove()
2007 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_remove()
2008 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_remove()
2009 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_remove()
2010 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_remove()
2012 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_remove()
2013 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_remove()
2015 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_remove()
2024 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_suspend()
2034 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_resume()
2039 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_resume()
2048 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_resume()
2051 nand_reset(&nand->chip, chip_cs); in stm32_fmc2_nfc_resume()
2061 {.compatible = "st,stm32mp15-fmc2"},
2062 {.compatible = "st,stm32mp1-fmc2-nfc"},