Lines Matching +full:1 +full:- +full:5
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * This file contains an ECC algorithm that detects and corrects 1 bit
14 * can be found in Documentation/driver-api/mtd/nand_ecc.rst
28 * the array element is 1, and when the number of bits is odd
32 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
33 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
34 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
35 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
36 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
37 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
38 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
39 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
40 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
41 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
42 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
43 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
44 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
45 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
46 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
47 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
56 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4,
57 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
58 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
59 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
60 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
61 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
62 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
63 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
64 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
65 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
66 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
67 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
68 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
69 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
70 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
71 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6, 7, 7, 8,
75 * addressbits is a lookup table to filter out the bits from the xor-ed
116 * __nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
322 (invparity[rp5] << 5) | (invparity[rp4] << 4) | in __nand_calculate_ecc()
324 (invparity[rp1] << 1) | (invparity[rp0]); in __nand_calculate_ecc()
325 code[1] = (invparity[rp15] << 7) | (invparity[rp14] << 6) | in __nand_calculate_ecc()
326 (invparity[rp13] << 5) | (invparity[rp12] << 4) | in __nand_calculate_ecc()
328 (invparity[rp9] << 1) | (invparity[rp8]); in __nand_calculate_ecc()
330 code[1] = (invparity[rp7] << 7) | (invparity[rp6] << 6) | in __nand_calculate_ecc()
331 (invparity[rp5] << 5) | (invparity[rp4] << 4) | in __nand_calculate_ecc()
333 (invparity[rp1] << 1) | (invparity[rp0]); in __nand_calculate_ecc()
335 (invparity[rp13] << 5) | (invparity[rp12] << 4) | in __nand_calculate_ecc()
337 (invparity[rp9] << 1) | (invparity[rp8]); in __nand_calculate_ecc()
340 if (eccsize_mult == 1) in __nand_calculate_ecc()
344 (invparity[par & 0xcc] << 5) | in __nand_calculate_ecc()
353 (invparity[par & 0xcc] << 5) | in __nand_calculate_ecc()
357 (invparity[rp17] << 1) | in __nand_calculate_ecc()
363 * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
372 bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_calculate_ecc()
374 __nand_calculate_ecc(buf, chip->ecc.size, code, sm_order); in nand_calculate_ecc()
381 * __nand_correct_data - [NAND Interface] Detect and correct bit error(s)
388 * Detect and correct a 1 bit error for eccsize byte block
406 b1 = read_ecc[1] ^ calc_ecc[1]; in __nand_correct_data()
408 b0 = read_ecc[1] ^ calc_ecc[1]; in __nand_correct_data()
422 if ((((b0 ^ (b0 >> 1)) & 0x55) == 0x55) && in __nand_correct_data()
423 (((b1 ^ (b1 >> 1)) & 0x55) == 0x55) && in __nand_correct_data()
424 ((eccsize_mult == 1 && ((b2 ^ (b2 >> 1)) & 0x54) == 0x54) || in __nand_correct_data()
425 (eccsize_mult == 2 && ((b2 ^ (b2 >> 1)) & 0x55) == 0x55))) { in __nand_correct_data()
428 * rp17/rp15/13/11/9/7/5/3/1 indicate which byte is the faulty in __nand_correct_data()
429 * byte, cp 5/3/1 indicate the faulty bit. in __nand_correct_data()
435 * (that would avoid the >> 1), and one for b1 (with all values in __nand_correct_data()
440 * We could also do addressbits[b2] >> 1 but for the in __nand_correct_data()
443 if (eccsize_mult == 1) in __nand_correct_data()
450 buf[byte_addr] ^= (1 << bit_addr); in __nand_correct_data()
451 return 1; in __nand_correct_data()
455 if ((bitsperbyte[b0] + bitsperbyte[b1] + bitsperbyte[b2]) == 1) in __nand_correct_data()
456 return 1; /* error in ECC data; no action needed */ in __nand_correct_data()
459 return -EBADMSG; in __nand_correct_data()
464 * nand_correct_data - [NAND Interface] Detect and correct bit error(s)
470 * Detect and correct a 1 bit error for 256/512 byte block
475 bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_correct_data()
477 return __nand_correct_data(buf, read_ecc, calc_ecc, chip->ecc.size, in nand_correct_data()