Lines Matching +full:nand +full:- +full:ecc +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
4 * This is the generic MTD driver for NAND flash devices. It should be
5 * capable of working with almost all NAND chips currently available.
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
22 * if we have HW ECC support.
37 #include <linux/mtd/nand.h>
52 int lastpage = (mtd->erasesize / mtd->writesize) - 1; in nand_pairing_dist3_get_info()
59 info->group = 0; in nand_pairing_dist3_get_info()
60 info->pair = (page + 1) / 2; in nand_pairing_dist3_get_info()
62 info->group = 1; in nand_pairing_dist3_get_info()
63 info->pair = (page + 1 - dist) / 2; in nand_pairing_dist3_get_info()
72 int lastpair = ((mtd->erasesize / mtd->writesize) - 1) / 2; in nand_pairing_dist3_get_wunit()
73 int page = info->pair * 2; in nand_pairing_dist3_get_wunit()
76 if (!info->group && !info->pair) in nand_pairing_dist3_get_wunit()
79 if (info->pair == lastpair && info->group) in nand_pairing_dist3_get_wunit()
82 if (!info->group) in nand_pairing_dist3_get_wunit()
83 page--; in nand_pairing_dist3_get_wunit()
84 else if (info->pair) in nand_pairing_dist3_get_wunit()
85 page += dist - 1; in nand_pairing_dist3_get_wunit()
87 if (page >= mtd->erasesize / mtd->writesize) in nand_pairing_dist3_get_wunit()
88 return -EINVAL; in nand_pairing_dist3_get_wunit()
104 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
106 ret = -EINVAL; in check_offs_len()
110 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
112 ret = -EINVAL; in check_offs_len()
119 * nand_extract_bits - Copy unaligned bits from one buffer to another one
139 n = min3(8 - dst_off, 8 - src_off, nbits); in nand_extract_bits()
141 tmp = (*src >> src_off) & GENMASK(n - 1, 0); in nand_extract_bits()
142 *dst &= ~GENMASK(n - 1 + dst_off, dst_off); in nand_extract_bits()
148 dst_off -= 8; in nand_extract_bits()
154 src_off -= 8; in nand_extract_bits()
157 nbits -= n; in nand_extract_bits()
163 * nand_select_target() - Select a NAND target (A.K.A. die)
164 * @chip: NAND chip object
168 * Select a NAND target so that further operations executed on @chip go to the
169 * selected NAND target.
177 if (WARN_ON(cs > nanddev_ntargets(&chip->base))) in nand_select_target()
180 chip->cur_cs = cs; in nand_select_target()
182 if (chip->legacy.select_chip) in nand_select_target()
183 chip->legacy.select_chip(chip, cs); in nand_select_target()
188 * nand_deselect_target() - Deselect the currently selected target
189 * @chip: NAND chip object
191 * Deselect the currently selected NAND target. The result of operations
196 if (chip->legacy.select_chip) in nand_deselect_target()
197 chip->legacy.select_chip(chip, -1); in nand_deselect_target()
199 chip->cur_cs = -1; in nand_deselect_target()
204 * nand_release_device - [GENERIC] release chip
205 * @chip: NAND chip object
212 mutex_unlock(&chip->controller->lock); in nand_release_device()
213 mutex_unlock(&chip->lock); in nand_release_device()
217 * nand_bbm_get_next_page - Get the next page for bad block markers
218 * @chip: NAND chip object
223 * available, -EINVAL is returned.
228 int last_page = ((mtd->erasesize - mtd->writesize) >> in nand_bbm_get_next_page()
229 chip->page_shift) & chip->pagemask; in nand_bbm_get_next_page()
233 if (page == 0 && !(chip->options & bbm_flags)) in nand_bbm_get_next_page()
235 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE) in nand_bbm_get_next_page()
237 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE) in nand_bbm_get_next_page()
239 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE) in nand_bbm_get_next_page()
242 return -EINVAL; in nand_bbm_get_next_page()
246 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
247 * @chip: NAND chip object
258 first_page = (int)(ofs >> chip->page_shift) & chip->pagemask; in nand_block_bad()
262 res = chip->ecc.read_oob(chip, first_page + page_offset); in nand_block_bad()
266 bad = chip->oob_poi[chip->badblockpos]; in nand_block_bad()
268 if (likely(chip->badblockbits == 8)) in nand_block_bad()
271 res = hweight8(bad) < chip->badblockbits; in nand_block_bad()
283 if (chip->options & NAND_NO_BBM_QUIRK) in nand_isbad_bbm()
286 if (chip->legacy.block_bad) in nand_isbad_bbm()
287 return chip->legacy.block_bad(chip, ofs); in nand_isbad_bbm()
293 * nand_get_device - [GENERIC] Get chip for selected access
294 * @chip: NAND chip structure
298 * Return: -EBUSY if the chip has been suspended, 0 otherwise
302 mutex_lock(&chip->lock); in nand_get_device()
303 if (chip->suspended) { in nand_get_device()
304 mutex_unlock(&chip->lock); in nand_get_device()
305 return -EBUSY; in nand_get_device()
307 mutex_lock(&chip->controller->lock); in nand_get_device()
313 * nand_check_wp - [GENERIC] check if the chip is write protected
314 * @chip: NAND chip object
325 if (chip->options & NAND_BROKEN_XD) in nand_check_wp()
337 * nand_fill_oob - [INTERN] Transfer client buffer to oob
338 * @chip: NAND chip object
353 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_fill_oob()
355 switch (ops->mode) { in nand_fill_oob()
359 memcpy(chip->oob_poi + ops->ooboffs, oob, len); in nand_fill_oob()
363 ret = mtd_ooblayout_set_databytes(mtd, oob, chip->oob_poi, in nand_fill_oob()
364 ops->ooboffs, len); in nand_fill_oob()
375 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
376 * @chip: NAND chip object
380 * NAND write out-of-band.
389 __func__, (unsigned int)to, (int)ops->ooblen); in nand_do_write_oob()
394 if ((ops->ooboffs + ops->ooblen) > len) { in nand_do_write_oob()
397 return -EINVAL; in nand_do_write_oob()
400 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_oob()
415 page = (int)(to >> chip->page_shift); in nand_do_write_oob()
420 return -EROFS; in nand_do_write_oob()
424 if (page == chip->pagecache.page) in nand_do_write_oob()
425 chip->pagecache.page = -1; in nand_do_write_oob()
427 nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops); in nand_do_write_oob()
429 if (ops->mode == MTD_OPS_RAW) in nand_do_write_oob()
430 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask); in nand_do_write_oob()
432 status = chip->ecc.write_oob(chip, page & chip->pagemask); in nand_do_write_oob()
439 ops->oobretlen = ops->ooblen; in nand_do_write_oob()
445 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
446 * @chip: NAND chip object
462 ops.ooboffs = chip->badblockpos; in nand_default_block_markbad()
463 if (chip->options & NAND_BUSWIDTH_16) { in nand_default_block_markbad()
469 ops.mode = MTD_OPS_PLACE_OOB; in nand_default_block_markbad()
475 ofs + (page_offset * mtd->writesize), in nand_default_block_markbad()
488 * nand_markbad_bbm - mark a block by updating the BBM
489 * @chip: NAND chip object
494 if (chip->legacy.block_markbad) in nand_markbad_bbm()
495 return chip->legacy.block_markbad(chip, ofs); in nand_markbad_bbm()
501 * nand_block_markbad_lowlevel - mark a block bad
502 * @chip: NAND chip object
505 * This function performs the generic NAND bad block marking steps (i.e., bad
507 * specify how to write bad block markers to OOB (chip->legacy.block_markbad).
524 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { in nand_block_markbad_lowlevel()
530 einfo.len = 1ULL << chip->phys_erase_shift; in nand_block_markbad_lowlevel()
543 if (chip->bbt) { in nand_block_markbad_lowlevel()
550 mtd->ecc_stats.badblocks++; in nand_block_markbad_lowlevel()
556 * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
566 if (!chip->bbt) in nand_block_isreserved()
573 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
574 * @chip: NAND chip object
584 if (chip->bbt) in nand_block_checkbad()
591 * nand_soft_waitrdy - Poll STATUS reg until RDY bit is set to 1
592 * @chip: NAND chip structure
595 * Poll the STATUS register using ->exec_op() until the RDY bit becomes 1.
596 * If that does not happen whitin the specified timeout, -ETIMEDOUT is
600 * to the NAND R/B pin.
602 * Be aware that calling this helper from an ->exec_op() implementation means
603 * ->exec_op() must be re-entrant.
605 * Return 0 if the NAND chip is ready, a negative error otherwise.
614 return -ENOTSUPP; in nand_soft_waitrdy()
618 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in nand_soft_waitrdy()
627 * small jiffy fraction - possibly leading to false timeout in nand_soft_waitrdy()
648 * We have to exit READ_STATUS mode in order to read real data on the in nand_soft_waitrdy()
657 return status & NAND_STATUS_READY ? 0 : -ETIMEDOUT; in nand_soft_waitrdy()
662 * nand_gpio_waitrdy - Poll R/B GPIO pin until ready
663 * @chip: NAND chip structure
668 * whitin the specified timeout, -ETIMEDOUT is returned.
671 * NAND R/B pin over GPIO.
683 * small jiffy fraction - possibly leading to false timeout. in nand_gpio_waitrdy()
693 return gpiod_get_value_cansleep(gpiod) ? 0 : -ETIMEDOUT; in nand_gpio_waitrdy()
698 * panic_nand_wait - [GENERIC] wait until the command is done
699 * @chip: NAND chip structure
710 if (chip->legacy.dev_ready) { in panic_nand_wait()
711 if (chip->legacy.dev_ready(chip)) in panic_nand_wait()
731 return (chip->parameters.supports_set_get_features && in nand_supports_get_features()
732 test_bit(addr, chip->parameters.get_feature_list)); in nand_supports_get_features()
737 return (chip->parameters.supports_set_get_features && in nand_supports_set_features()
738 test_bit(addr, chip->parameters.set_feature_list)); in nand_supports_set_features()
742 * nand_reset_interface - Reset data interface and timings
743 * @chip: The NAND chip
746 * Reset the Data interface and timings to ONFI mode 0.
752 const struct nand_controller_ops *ops = chip->controller->ops; in nand_reset_interface()
761 * To transition from NV-DDR or NV-DDR2 to the SDR data in nand_reset_interface()
763 * using SDR timing mode 0. A device in any timing mode is in nand_reset_interface()
765 * timing mode 0. in nand_reset_interface()
768 * Configure the data interface in SDR mode and set the in nand_reset_interface()
769 * timings to timing mode 0. in nand_reset_interface()
772 chip->current_interface_config = nand_get_reset_interface_config(); in nand_reset_interface()
773 ret = ops->setup_interface(chip, chipnr, in nand_reset_interface()
774 chip->current_interface_config); in nand_reset_interface()
776 pr_err("Failed to configure data interface to SDR timing mode 0\n"); in nand_reset_interface()
782 * nand_setup_interface - Setup the best data interface and timings
783 * @chip: The NAND chip
786 * Configure what has been reported to be the best data interface and NAND
793 const struct nand_controller_ops *ops = chip->controller->ops; in nand_setup_interface()
801 * A nand_reset_interface() put both the NAND chip and the NAND in nand_setup_interface()
802 * controller in timings mode 0. If the default mode for this chip is in nand_setup_interface()
804 * nand_setup_interface() uses ->set/get_features() which would in nand_setup_interface()
807 if (!chip->best_interface_config) in nand_setup_interface()
810 tmode_param[0] = chip->best_interface_config->timings.mode; in nand_setup_interface()
812 /* Change the mode on the chip side (if supported by the NAND chip) */ in nand_setup_interface()
822 /* Change the mode on the controller side */ in nand_setup_interface()
823 ret = ops->setup_interface(chip, chipnr, chip->best_interface_config); in nand_setup_interface()
827 /* Check the mode has been accepted by the chip, if supported */ in nand_setup_interface()
839 if (tmode_param[0] != chip->best_interface_config->timings.mode) { in nand_setup_interface()
840 pr_warn("timing mode %d not acknowledged by the NAND chip\n", in nand_setup_interface()
841 chip->best_interface_config->timings.mode); in nand_setup_interface()
846 chip->current_interface_config = chip->best_interface_config; in nand_setup_interface()
852 * Fallback to mode 0 if the chip explicitly did not ack the chosen in nand_setup_interface()
853 * timing mode. in nand_setup_interface()
864 * nand_choose_best_sdr_timings - Pick up the best SDR timings that both the
865 * NAND controller and the NAND chip support
866 * @chip: the NAND chip
877 const struct nand_controller_ops *ops = chip->controller->ops; in nand_choose_best_sdr_timings()
878 int best_mode = 0, mode, ret; in nand_choose_best_sdr_timings() local
880 iface->type = NAND_SDR_IFACE; in nand_choose_best_sdr_timings()
883 iface->timings.sdr = *spec_timings; in nand_choose_best_sdr_timings()
884 iface->timings.mode = onfi_find_closest_sdr_mode(spec_timings); in nand_choose_best_sdr_timings()
887 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_sdr_timings()
890 chip->best_interface_config = iface; in nand_choose_best_sdr_timings()
895 best_mode = iface->timings.mode; in nand_choose_best_sdr_timings()
896 } else if (chip->parameters.onfi) { in nand_choose_best_sdr_timings()
897 best_mode = fls(chip->parameters.onfi->async_timing_mode) - 1; in nand_choose_best_sdr_timings()
900 for (mode = best_mode; mode >= 0; mode--) { in nand_choose_best_sdr_timings()
901 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, mode); in nand_choose_best_sdr_timings()
903 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_sdr_timings()
909 chip->best_interface_config = iface; in nand_choose_best_sdr_timings()
915 * nand_choose_interface_config - find the best data interface and timings
916 * @chip: The NAND chip
918 * Find the best data interface and NAND timings supported by the chip
919 * and the driver. Eventually let the NAND manufacturer driver propose his own
922 * After this function nand_chip->interface_config is initialized with the best
923 * timing mode available.
937 return -ENOMEM; in nand_choose_interface_config()
939 if (chip->ops.choose_interface_config) in nand_choose_interface_config()
940 ret = chip->ops.choose_interface_config(chip, iface); in nand_choose_interface_config()
951 * nand_fill_column_cycles - fill the column cycles of an address
952 * @chip: The NAND chip
957 * on the NAND bus width and the page size.
968 if (offset_in_page > mtd->writesize + mtd->oobsize) in nand_fill_column_cycles()
969 return -EINVAL; in nand_fill_column_cycles()
976 if (mtd->writesize <= 512 && offset_in_page >= mtd->writesize) in nand_fill_column_cycles()
977 offset_in_page -= mtd->writesize; in nand_fill_column_cycles()
980 * The offset in page is expressed in bytes, if the NAND bus is 16-bit in nand_fill_column_cycles()
983 if (chip->options & NAND_BUSWIDTH_16) { in nand_fill_column_cycles()
985 return -EINVAL; in nand_fill_column_cycles()
996 if (mtd->writesize <= 512) in nand_fill_column_cycles()
1014 NAND_OP_ADDR(3, addrs, PSEC_TO_NSEC(sdr->tWB_max)), in nand_sp_exec_read_page_op()
1015 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max), in nand_sp_exec_read_page_op()
1016 PSEC_TO_NSEC(sdr->tRR_min)), in nand_sp_exec_read_page_op()
1019 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_sp_exec_read_page_op()
1024 op.ninstrs--; in nand_sp_exec_read_page_op()
1026 if (offset_in_page >= mtd->writesize) in nand_sp_exec_read_page_op()
1029 !(chip->options & NAND_BUSWIDTH_16)) in nand_sp_exec_read_page_op()
1039 if (chip->options & NAND_ROW_ADDR_3) { in nand_sp_exec_read_page_op()
1057 NAND_OP_CMD(NAND_CMD_READSTART, PSEC_TO_NSEC(sdr->tWB_max)), in nand_lp_exec_read_page_op()
1058 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max), in nand_lp_exec_read_page_op()
1059 PSEC_TO_NSEC(sdr->tRR_min)), in nand_lp_exec_read_page_op()
1062 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_lp_exec_read_page_op()
1067 op.ninstrs--; in nand_lp_exec_read_page_op()
1076 if (chip->options & NAND_ROW_ADDR_3) { in nand_lp_exec_read_page_op()
1085 * nand_read_page_op - Do a READ PAGE operation
1086 * @chip: The NAND chip
1103 return -EINVAL; in nand_read_page_op()
1105 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_read_page_op()
1106 return -EINVAL; in nand_read_page_op()
1109 if (mtd->writesize > 512) in nand_read_page_op()
1118 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page); in nand_read_page_op()
1120 chip->legacy.read_buf(chip, buf, len); in nand_read_page_op()
1127 * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
1128 * @chip: The NAND chip
1145 return -EINVAL; in nand_read_param_page_op()
1152 NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)), in nand_read_param_page_op()
1153 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max), in nand_read_param_page_op()
1154 PSEC_TO_NSEC(sdr->tRR_min)), in nand_read_param_page_op()
1157 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_param_page_op()
1161 op.ninstrs--; in nand_read_param_page_op()
1166 chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1); in nand_read_param_page_op()
1168 p[i] = chip->legacy.read_byte(chip); in nand_read_param_page_op()
1174 * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
1175 * @chip: The NAND chip
1179 * @force_8bit: force 8-bit bus access
1193 return -EINVAL; in nand_change_read_column_op()
1195 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_change_read_column_op()
1196 return -EINVAL; in nand_change_read_column_op()
1199 if (mtd->writesize <= 512) in nand_change_read_column_op()
1200 return -ENOTSUPP; in nand_change_read_column_op()
1210 PSEC_TO_NSEC(sdr->tCCS_min)), in nand_change_read_column_op()
1213 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_change_read_column_op()
1222 op.ninstrs--; in nand_change_read_column_op()
1229 chip->legacy.cmdfunc(chip, NAND_CMD_RNDOUT, offset_in_page, -1); in nand_change_read_column_op()
1231 chip->legacy.read_buf(chip, buf, len); in nand_change_read_column_op()
1238 * nand_read_oob_op - Do a READ OOB operation
1239 * @chip: The NAND chip
1256 return -EINVAL; in nand_read_oob_op()
1258 if (offset_in_oob + len > mtd->oobsize) in nand_read_oob_op()
1259 return -EINVAL; in nand_read_oob_op()
1263 mtd->writesize + offset_in_oob, in nand_read_oob_op()
1266 chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page); in nand_read_oob_op()
1268 chip->legacy.read_buf(chip, buf, len); in nand_read_oob_op()
1285 * with a large page NAND and adjusted if we're dealing in nand_exec_prog_page_op()
1286 * with a small page NAND and the page offset is > 255. in nand_exec_prog_page_op()
1290 NAND_OP_ADDR(0, addrs, PSEC_TO_NSEC(sdr->tADL_min)), in nand_exec_prog_page_op()
1292 NAND_OP_CMD(NAND_CMD_PAGEPROG, PSEC_TO_NSEC(sdr->tWB_max)), in nand_exec_prog_page_op()
1293 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tPROG_max), 0), in nand_exec_prog_page_op()
1295 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_exec_prog_page_op()
1305 if (chip->options & NAND_ROW_ADDR_3) in nand_exec_prog_page_op()
1312 op.ninstrs -= 2; in nand_exec_prog_page_op()
1315 op.ninstrs--; in nand_exec_prog_page_op()
1318 if (mtd->writesize <= 512) { in nand_exec_prog_page_op()
1324 if (offset_in_page >= mtd->writesize) in nand_exec_prog_page_op()
1327 !(chip->options & NAND_BUSWIDTH_16)) in nand_exec_prog_page_op()
1332 * NAND. in nand_exec_prog_page_op()
1335 op.ninstrs--; in nand_exec_prog_page_op()
1350 * nand_prog_page_begin_op - starts a PROG PAGE operation
1351 * @chip: The NAND chip
1369 return -EINVAL; in nand_prog_page_begin_op()
1371 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_prog_page_begin_op()
1372 return -EINVAL; in nand_prog_page_begin_op()
1378 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page); in nand_prog_page_begin_op()
1381 chip->legacy.write_buf(chip, buf, len); in nand_prog_page_begin_op()
1388 * nand_prog_page_end_op - ends a PROG PAGE operation
1389 * @chip: The NAND chip
1406 PSEC_TO_NSEC(sdr->tWB_max)), in nand_prog_page_end_op()
1407 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tPROG_max), 0), in nand_prog_page_end_op()
1409 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_prog_page_end_op()
1419 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1); in nand_prog_page_end_op()
1420 ret = chip->legacy.waitfunc(chip); in nand_prog_page_end_op()
1428 return -EIO; in nand_prog_page_end_op()
1435 * nand_prog_page_op - Do a full PROG PAGE operation
1436 * @chip: The NAND chip
1455 return -EINVAL; in nand_prog_page_op()
1457 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_prog_page_op()
1458 return -EINVAL; in nand_prog_page_op()
1464 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, in nand_prog_page_op()
1466 chip->legacy.write_buf(chip, buf, len); in nand_prog_page_op()
1467 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1); in nand_prog_page_op()
1468 status = chip->legacy.waitfunc(chip); in nand_prog_page_op()
1472 return -EIO; in nand_prog_page_op()
1479 * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
1480 * @chip: The NAND chip
1482 * @buf: buffer containing the data to send to the NAND
1484 * @force_8bit: force 8-bit bus access
1499 return -EINVAL; in nand_change_write_column_op()
1501 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_change_write_column_op()
1502 return -EINVAL; in nand_change_write_column_op()
1505 if (mtd->writesize <= 512) in nand_change_write_column_op()
1506 return -ENOTSUPP; in nand_change_write_column_op()
1514 NAND_OP_ADDR(2, addrs, PSEC_TO_NSEC(sdr->tCCS_min)), in nand_change_write_column_op()
1517 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_change_write_column_op()
1528 op.ninstrs--; in nand_change_write_column_op()
1533 chip->legacy.cmdfunc(chip, NAND_CMD_RNDIN, offset_in_page, -1); in nand_change_write_column_op()
1535 chip->legacy.write_buf(chip, buf, len); in nand_change_write_column_op()
1542 * nand_readid_op - Do a READID operation
1543 * @chip: The NAND chip
1549 * NAND.
1561 return -EINVAL; in nand_readid_op()
1568 NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)), in nand_readid_op()
1571 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_readid_op()
1575 op.ninstrs--; in nand_readid_op()
1580 chip->legacy.cmdfunc(chip, NAND_CMD_READID, addr, -1); in nand_readid_op()
1583 id[i] = chip->legacy.read_byte(chip); in nand_readid_op()
1590 * nand_status_op - Do a STATUS operation
1591 * @chip: The NAND chip
1592 * @status: out variable to store the NAND status
1595 * the NAND.
1607 PSEC_TO_NSEC(sdr->tADL_min)), in nand_status_op()
1610 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_status_op()
1613 op.ninstrs--; in nand_status_op()
1618 chip->legacy.cmdfunc(chip, NAND_CMD_STATUS, -1, -1); in nand_status_op()
1620 *status = chip->legacy.read_byte(chip); in nand_status_op()
1627 * nand_exit_status_op - Exit a STATUS operation
1628 * @chip: The NAND chip
1643 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_exit_status_op()
1648 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, -1, -1); in nand_exit_status_op()
1654 * nand_erase_op - Do an erase operation
1655 * @chip: The NAND chip
1658 * This function sends an ERASE command and waits for the NAND to be ready
1667 (chip->phys_erase_shift - chip->page_shift); in nand_erase_op()
1679 PSEC_TO_MSEC(sdr->tWB_max)), in nand_erase_op()
1680 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tBERS_max), 0), in nand_erase_op()
1682 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_erase_op()
1684 if (chip->options & NAND_ROW_ADDR_3) in nand_erase_op()
1695 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page); in nand_erase_op()
1696 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE2, -1, -1); in nand_erase_op()
1698 ret = chip->legacy.waitfunc(chip); in nand_erase_op()
1706 return -EIO; in nand_erase_op()
1713 * nand_set_features_op - Do a SET FEATURES operation
1714 * @chip: The NAND chip
1718 * This function sends a SET FEATURES command and waits for the NAND to be
1735 NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)), in nand_set_features_op()
1737 PSEC_TO_NSEC(sdr->tWB_max)), in nand_set_features_op()
1738 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tFEAT_max), 0), in nand_set_features_op()
1740 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_set_features_op()
1745 chip->legacy.cmdfunc(chip, NAND_CMD_SET_FEATURES, feature, -1); in nand_set_features_op()
1747 chip->legacy.write_byte(chip, params[i]); in nand_set_features_op()
1749 ret = chip->legacy.waitfunc(chip); in nand_set_features_op()
1754 return -EIO; in nand_set_features_op()
1760 * nand_get_features_op - Do a GET FEATURES operation
1761 * @chip: The NAND chip
1765 * This function sends a GET FEATURES command and waits for the NAND to be
1782 NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tWB_max)), in nand_get_features_op()
1783 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tFEAT_max), in nand_get_features_op()
1784 PSEC_TO_NSEC(sdr->tRR_min)), in nand_get_features_op()
1788 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_get_features_op()
1793 chip->legacy.cmdfunc(chip, NAND_CMD_GET_FEATURES, feature, -1); in nand_get_features_op()
1795 params[i] = chip->legacy.read_byte(chip); in nand_get_features_op()
1808 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_wait_rdy_op()
1814 if (!chip->legacy.dev_ready) in nand_wait_rdy_op()
1815 udelay(chip->legacy.chip_delay); in nand_wait_rdy_op()
1823 * nand_reset_op - Do a reset operation
1824 * @chip: The NAND chip
1826 * This function sends a RESET command and waits for the NAND to be ready
1838 NAND_OP_CMD(NAND_CMD_RESET, PSEC_TO_NSEC(sdr->tWB_max)), in nand_reset_op()
1839 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tRST_max), 0), in nand_reset_op()
1841 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_reset_op()
1846 chip->legacy.cmdfunc(chip, NAND_CMD_RESET, -1, -1); in nand_reset_op()
1853 * nand_read_data_op - Read data from the NAND
1854 * @chip: The NAND chip
1857 * @force_8bit: force 8-bit bus access
1862 * another NAND operation like nand_read_page_op().
1871 return -EINVAL; in nand_read_data_op()
1877 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_data_op()
1895 p[i] = chip->legacy.read_byte(chip); in nand_read_data_op()
1897 chip->legacy.read_buf(chip, buf, len); in nand_read_data_op()
1905 * nand_write_data_op - Write data from the NAND
1906 * @chip: The NAND chip
1909 * @force_8bit: force 8-bit bus access
1912 * another NAND operation like nand_write_page_begin_op().
1921 return -EINVAL; in nand_write_data_op()
1927 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_write_data_op()
1939 chip->legacy.write_byte(chip, p[i]); in nand_write_data_op()
1941 chip->legacy.write_buf(chip, buf, len); in nand_write_data_op()
1949 * struct nand_op_parser_ctx - Context used by the parser
1952 * @subop: Sub-operation to be passed to the NAND controller
1954 * This structure is used by the core to split NAND operations into
1955 * sub-operations that can be handled by the NAND controller.
1964 * nand_op_parser_must_split_instr - Checks if an instruction must be split
1974 * Some NAND controllers are limited and cannot send X address cycles with a
1977 * controller-operation into two or more chunks.
1988 switch (pat->type) { in nand_op_parser_must_split_instr()
1990 if (!pat->ctx.addr.maxcycles) in nand_op_parser_must_split_instr()
1993 if (instr->ctx.addr.naddrs - *start_offset > in nand_op_parser_must_split_instr()
1994 pat->ctx.addr.maxcycles) { in nand_op_parser_must_split_instr()
1995 *start_offset += pat->ctx.addr.maxcycles; in nand_op_parser_must_split_instr()
2002 if (!pat->ctx.data.maxlen) in nand_op_parser_must_split_instr()
2005 if (instr->ctx.data.len - *start_offset > in nand_op_parser_must_split_instr()
2006 pat->ctx.data.maxlen) { in nand_op_parser_must_split_instr()
2007 *start_offset += pat->ctx.data.maxlen; in nand_op_parser_must_split_instr()
2020 * nand_op_parser_match_pat - Checks if a pattern matches the instructions
2025 * Check if @pat matches the set or a sub-set of instructions remaining in @ctx.
2027 * @ctx->subop is updated with the set of instructions to be passed to the
2034 unsigned int instr_offset = ctx->subop.first_instr_start_off; in nand_op_parser_match_pat()
2035 const struct nand_op_instr *end = ctx->instrs + ctx->ninstrs; in nand_op_parser_match_pat()
2036 const struct nand_op_instr *instr = ctx->subop.instrs; in nand_op_parser_match_pat()
2039 for (i = 0, ninstrs = 0; i < pat->nelems && instr < end; i++) { in nand_op_parser_match_pat()
2047 if (instr->type != pat->elems[i].type) { in nand_op_parser_match_pat()
2048 if (!pat->elems[i].optional) in nand_op_parser_match_pat()
2062 if (nand_op_parser_must_split_instr(&pat->elems[i], instr, in nand_op_parser_match_pat()
2088 for (; i < pat->nelems; i++) { in nand_op_parser_match_pat()
2089 if (!pat->elems[i].optional) in nand_op_parser_match_pat()
2097 ctx->subop.ninstrs = ninstrs; in nand_op_parser_match_pat()
2098 ctx->subop.last_instr_end_off = instr_offset; in nand_op_parser_match_pat()
2110 pr_debug("executing subop (CS%d):\n", ctx->subop.cs); in nand_op_parser_trace()
2112 for (i = 0; i < ctx->ninstrs; i++) { in nand_op_parser_trace()
2113 instr = &ctx->instrs[i]; in nand_op_parser_trace()
2115 if (instr == &ctx->subop.instrs[0]) in nand_op_parser_trace()
2116 prefix = " ->"; in nand_op_parser_trace()
2120 if (instr == &ctx->subop.instrs[ctx->subop.ninstrs - 1]) in nand_op_parser_trace()
2134 if (a->subop.ninstrs < b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2135 return -1; in nand_op_parser_cmp_ctx()
2136 else if (a->subop.ninstrs > b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2139 if (a->subop.last_instr_end_off < b->subop.last_instr_end_off) in nand_op_parser_cmp_ctx()
2140 return -1; in nand_op_parser_cmp_ctx()
2141 else if (a->subop.last_instr_end_off > b->subop.last_instr_end_off) in nand_op_parser_cmp_ctx()
2148 * nand_op_parser_exec_op - exec_op parser
2149 * @chip: the NAND chip
2151 * @op: the NAND operation to address
2155 * Helper function designed to ease integration of NAND controller drivers that
2158 * multiple sub-operations (if required) and pass them back to the ->exec()
2161 * NAND controller drivers should call this function from their own ->exec_op()
2167 * matching pattern->exec() hook.
2174 .subop.cs = op->cs, in nand_op_parser_exec_op()
2175 .subop.instrs = op->instrs, in nand_op_parser_exec_op()
2176 .instrs = op->instrs, in nand_op_parser_exec_op()
2177 .ninstrs = op->ninstrs, in nand_op_parser_exec_op()
2181 while (ctx.subop.instrs < op->instrs + op->ninstrs) { in nand_op_parser_exec_op()
2184 int ret, best_pattern = -1; in nand_op_parser_exec_op()
2186 for (i = 0; i < parser->npatterns; i++) { in nand_op_parser_exec_op()
2189 pattern = &parser->patterns[i]; in nand_op_parser_exec_op()
2202 pr_debug("->exec_op() parser: pattern not found!\n"); in nand_op_parser_exec_op()
2203 return -ENOTSUPP; in nand_op_parser_exec_op()
2210 pattern = &parser->patterns[best_pattern]; in nand_op_parser_exec_op()
2211 ret = pattern->exec(chip, &ctx.subop); in nand_op_parser_exec_op()
2222 ctx.subop.instrs -= 1; in nand_op_parser_exec_op()
2233 return instr && (instr->type == NAND_OP_DATA_IN_INSTR || in nand_instr_is_data()
2234 instr->type == NAND_OP_DATA_OUT_INSTR); in nand_instr_is_data()
2240 return subop && instr_idx < subop->ninstrs; in nand_subop_instr_is_valid()
2249 return subop->first_instr_start_off; in nand_subop_get_start_off()
2253 * nand_subop_get_addr_start_off - Get the start offset in an address array
2254 * @subop: The entire sub-operation
2255 * @instr_idx: Index of the instruction inside the sub-operation
2258 * ->addr.addrs field of address instructions. This is wrong as address
2267 subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) in nand_subop_get_addr_start_off()
2275 * nand_subop_get_num_addr_cyc - Get the remaining address cycles to assert
2276 * @subop: The entire sub-operation
2277 * @instr_idx: Index of the instruction inside the sub-operation
2280 * ->addr->naddrs field of a data instruction. This is wrong as instructions
2291 subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) in nand_subop_get_num_addr_cyc()
2296 if (instr_idx == subop->ninstrs - 1 && in nand_subop_get_num_addr_cyc()
2297 subop->last_instr_end_off) in nand_subop_get_num_addr_cyc()
2298 end_off = subop->last_instr_end_off; in nand_subop_get_num_addr_cyc()
2300 end_off = subop->instrs[instr_idx].ctx.addr.naddrs; in nand_subop_get_num_addr_cyc()
2302 return end_off - start_off; in nand_subop_get_num_addr_cyc()
2307 * nand_subop_get_data_start_off - Get the start offset in a data array
2308 * @subop: The entire sub-operation
2309 * @instr_idx: Index of the instruction inside the sub-operation
2312 * ->data->buf.{in,out} field of data instructions. This is wrong as data
2321 !nand_instr_is_data(&subop->instrs[instr_idx]))) in nand_subop_get_data_start_off()
2329 * nand_subop_get_data_len - Get the number of bytes to retrieve
2330 * @subop: The entire sub-operation
2331 * @instr_idx: Index of the instruction inside the sub-operation
2334 * ->data->len field of a data instruction. This is wrong as data instructions
2345 !nand_instr_is_data(&subop->instrs[instr_idx]))) in nand_subop_get_data_len()
2350 if (instr_idx == subop->ninstrs - 1 && in nand_subop_get_data_len()
2351 subop->last_instr_end_off) in nand_subop_get_data_len()
2352 end_off = subop->last_instr_end_off; in nand_subop_get_data_len()
2354 end_off = subop->instrs[instr_idx].ctx.data.len; in nand_subop_get_data_len()
2356 return end_off - start_off; in nand_subop_get_data_len()
2361 * nand_reset - Reset and initialize a NAND device
2362 * @chip: The NAND chip
2365 * Save the timings data structure, then apply SDR timings mode 0 (see
2380 * The CS line has to be released before we can apply the new NAND in nand_reset()
2399 * nand_get_features - wrapper to perform a GET_FEATURE
2400 * @chip: NAND chip info structure
2404 * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2411 return -ENOTSUPP; in nand_get_features()
2413 if (chip->legacy.get_features) in nand_get_features()
2414 return chip->legacy.get_features(chip, addr, subfeature_param); in nand_get_features()
2420 * nand_set_features - wrapper to perform a SET_FEATURE
2421 * @chip: NAND chip info structure
2425 * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2432 return -ENOTSUPP; in nand_set_features()
2434 if (chip->legacy.set_features) in nand_set_features()
2435 return chip->legacy.set_features(chip, addr, subfeature_param); in nand_set_features()
2441 * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
2456 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2466 len--, bitmap++) { in nand_check_erased_buf()
2468 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
2470 return -EBADMSG; in nand_check_erased_buf()
2474 len -= sizeof(long), bitmap += sizeof(long)) { in nand_check_erased_buf()
2479 bitflips += BITS_PER_LONG - weight; in nand_check_erased_buf()
2481 return -EBADMSG; in nand_check_erased_buf()
2484 for (; len > 0; len--, bitmap++) { in nand_check_erased_buf()
2486 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
2488 return -EBADMSG; in nand_check_erased_buf()
2495 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2499 * @ecc: ECC buffer
2500 * @ecclen: ECC length
2505 * Check if a data buffer and its associated ECC and OOB data contains only
2512 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2513 * different from the NAND page size. When fixing bitflips, ECC engines will
2514 * report the number of errors per chunk, and the NAND core infrastructure
2520 * the payload data but also their associated ECC data, because a user might
2522 * shouldn't consider the chunk as erased, and checking ECC bytes prevent
2525 * data are protected by the ECC engine.
2527 * extra OOB data to an ECC chunk.
2530 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2534 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument
2545 bitflips_threshold -= data_bitflips; in nand_check_erased_ecc_chunk()
2547 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk()
2551 bitflips_threshold -= ecc_bitflips; in nand_check_erased_ecc_chunk()
2562 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk()
2572 * nand_read_page_raw_notsupp - dummy read raw page function
2573 * @chip: nand chip info structure
2575 * @oob_required: caller requires OOB data read to chip->oob_poi
2578 * Returns -ENOTSUPP unconditionally.
2583 return -ENOTSUPP; in nand_read_page_raw_notsupp()
2587 * nand_read_page_raw - [INTERN] read raw page data without ecc
2588 * @chip: nand chip info structure
2590 * @oob_required: caller requires OOB data read to chip->oob_poi
2593 * Not for syndrome calculating ECC controllers, which use a special oob layout.
2601 ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize); in nand_read_page_raw()
2606 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, in nand_read_page_raw()
2617 * nand_monolithic_read_page_raw - Monolithic page read in raw mode
2618 * @chip: NAND chip info structure
2620 * @oob_required: caller requires OOB data read to chip->oob_poi
2625 * eventually OOB) to be loaded in the NAND cache and sent over the
2626 * bus (from the NAND chip to the NAND controller) in a single
2635 unsigned int size = mtd->writesize; in nand_monolithic_read_page_raw()
2640 size += mtd->oobsize; in nand_monolithic_read_page_raw()
2642 if (buf != chip->data_buf) in nand_monolithic_read_page_raw()
2650 if (buf != chip->data_buf) in nand_monolithic_read_page_raw()
2651 memcpy(buf, read_buf, mtd->writesize); in nand_monolithic_read_page_raw()
2658 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2659 * @chip: nand chip info structure
2661 * @oob_required: caller requires OOB data read to chip->oob_poi
2670 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
2671 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
2672 uint8_t *oob = chip->oob_poi; in nand_read_page_raw_syndrome()
2679 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
2686 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
2687 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_raw_syndrome()
2692 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
2701 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
2702 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_raw_syndrome()
2707 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
2711 size = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_raw_syndrome()
2722 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
2723 * @chip: nand chip info structure
2725 * @oob_required: caller requires OOB data read to chip->oob_poi
2732 int i, eccsize = chip->ecc.size, ret; in nand_read_page_swecc()
2733 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
2734 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2736 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_swecc()
2737 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_swecc()
2740 chip->ecc.read_page_raw(chip, buf, 1, page); in nand_read_page_swecc()
2742 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_read_page_swecc()
2743 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_swecc()
2745 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_swecc()
2746 chip->ecc.total); in nand_read_page_swecc()
2750 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2753 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_swecc()
2756 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
2758 mtd->ecc_stats.failed++; in nand_read_page_swecc()
2760 mtd->ecc_stats.corrected += stat; in nand_read_page_swecc()
2768 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
2769 * @chip: nand chip info structure
2783 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; in nand_read_subpage()
2788 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
2789 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
2790 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
2791 num_steps = end_step - start_step + 1; in nand_read_subpage()
2792 index = start_step * chip->ecc.bytes; in nand_read_subpage()
2794 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
2795 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
2796 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
2798 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
2805 /* Calculate ECC */ in nand_read_subpage()
2806 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
2807 chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]); in nand_read_subpage()
2811 * ecc.pos. Let's make sure that there are no gaps in ECC positions. in nand_read_subpage()
2821 ret = nand_change_read_column_op(chip, mtd->writesize, in nand_read_subpage()
2822 chip->oob_poi, mtd->oobsize, in nand_read_subpage()
2828 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
2831 aligned_pos = oobregion.offset & ~(busw - 1); in nand_read_subpage()
2833 if (oobregion.offset & (busw - 1)) in nand_read_subpage()
2835 if ((oobregion.offset + (num_steps * chip->ecc.bytes)) & in nand_read_subpage()
2836 (busw - 1)) in nand_read_subpage()
2840 mtd->writesize + aligned_pos, in nand_read_subpage()
2841 &chip->oob_poi[aligned_pos], in nand_read_subpage()
2847 ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf, in nand_read_subpage()
2848 chip->oob_poi, index, eccfrag_len); in nand_read_subpage()
2853 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
2856 stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i], in nand_read_subpage()
2857 &chip->ecc.calc_buf[i]); in nand_read_subpage()
2858 if (stat == -EBADMSG && in nand_read_subpage()
2859 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_subpage()
2861 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_subpage()
2862 &chip->ecc.code_buf[i], in nand_read_subpage()
2863 chip->ecc.bytes, in nand_read_subpage()
2865 chip->ecc.strength); in nand_read_subpage()
2869 mtd->ecc_stats.failed++; in nand_read_subpage()
2871 mtd->ecc_stats.corrected += stat; in nand_read_subpage()
2879 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
2880 * @chip: nand chip info structure
2882 * @oob_required: caller requires OOB data read to chip->oob_poi
2885 * Not for syndrome calculating ECC controllers which need a special oob layout.
2891 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc()
2892 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
2893 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
2895 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_hwecc()
2896 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc()
2903 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
2904 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc()
2910 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_hwecc()
2913 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false, in nand_read_page_hwecc()
2918 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_hwecc()
2919 chip->ecc.total); in nand_read_page_hwecc()
2923 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
2926 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
2929 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
2930 if (stat == -EBADMSG && in nand_read_page_hwecc()
2931 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc()
2936 chip->ecc.strength); in nand_read_page_hwecc()
2940 mtd->ecc_stats.failed++; in nand_read_page_hwecc()
2942 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc()
2950 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2951 * @chip: nand chip info structure
2953 * @oob_required: caller requires OOB data read to chip->oob_poi
2963 int ret, i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
2964 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
2965 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
2966 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_page_syndrome()
2968 uint8_t *oob = chip->oob_poi; in nand_read_page_syndrome()
2975 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_syndrome()
2978 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_syndrome()
2984 if (chip->ecc.prepad) { in nand_read_page_syndrome()
2985 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_syndrome()
2990 oob += chip->ecc.prepad; in nand_read_page_syndrome()
2993 chip->ecc.hwctl(chip, NAND_ECC_READSYN); in nand_read_page_syndrome()
2999 stat = chip->ecc.correct(chip, p, oob, NULL); in nand_read_page_syndrome()
3003 if (chip->ecc.postpad) { in nand_read_page_syndrome()
3004 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_syndrome()
3009 oob += chip->ecc.postpad; in nand_read_page_syndrome()
3012 if (stat == -EBADMSG && in nand_read_page_syndrome()
3013 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_syndrome()
3015 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_page_syndrome()
3016 oob - eccpadbytes, in nand_read_page_syndrome()
3019 chip->ecc.strength); in nand_read_page_syndrome()
3023 mtd->ecc_stats.failed++; in nand_read_page_syndrome()
3025 mtd->ecc_stats.corrected += stat; in nand_read_page_syndrome()
3031 i = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_syndrome()
3042 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
3043 * @chip: NAND chip object
3054 switch (ops->mode) { in nand_transfer_oob()
3058 memcpy(oob, chip->oob_poi + ops->ooboffs, len); in nand_transfer_oob()
3062 ret = mtd_ooblayout_get_databytes(mtd, oob, chip->oob_poi, in nand_transfer_oob()
3063 ops->ooboffs, len); in nand_transfer_oob()
3074 * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
3075 * @chip: NAND chip object
3076 * @retry_mode: the retry mode to use
3079 * when there are too many bitflips in a page (i.e., ECC error). After setting
3084 pr_debug("setting READ RETRY mode %d\n", retry_mode); in nand_setup_read_retry()
3086 if (retry_mode >= chip->read_retries) in nand_setup_read_retry()
3087 return -EINVAL; in nand_setup_read_retry()
3089 if (!chip->ops.setup_read_retry) in nand_setup_read_retry()
3090 return -EOPNOTSUPP; in nand_setup_read_retry()
3092 return chip->ops.setup_read_retry(chip, retry_mode); in nand_setup_read_retry()
3099 if (!(chip->options & NAND_NEED_READRDY)) in nand_wait_readrdy()
3103 WARN_ON(nand_wait_rdy_op(chip, PSEC_TO_MSEC(sdr->tR_max), 0)); in nand_wait_readrdy()
3107 * nand_do_read_ops - [INTERN] Read data with ECC
3108 * @chip: NAND chip object
3120 uint32_t readlen = ops->len; in nand_do_read_ops()
3121 uint32_t oobreadlen = ops->ooblen; in nand_do_read_ops()
3130 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_ops()
3133 realpage = (int)(from >> chip->page_shift); in nand_do_read_ops()
3134 page = realpage & chip->pagemask; in nand_do_read_ops()
3136 col = (int)(from & (mtd->writesize - 1)); in nand_do_read_ops()
3138 buf = ops->datbuf; in nand_do_read_ops()
3139 oob = ops->oobbuf; in nand_do_read_ops()
3143 struct mtd_ecc_stats ecc_stats = mtd->ecc_stats; in nand_do_read_ops()
3145 bytes = min(mtd->writesize - col, readlen); in nand_do_read_ops()
3146 aligned = (bytes == mtd->writesize); in nand_do_read_ops()
3150 else if (chip->options & NAND_USES_DMA) in nand_do_read_ops()
3153 chip->buf_align); in nand_do_read_ops()
3158 if (realpage != chip->pagecache.page || oob) { in nand_do_read_ops()
3159 bufpoi = use_bounce_buf ? chip->data_buf : buf; in nand_do_read_ops()
3168 * the read methods return max bitflips per ecc step. in nand_do_read_ops()
3170 if (unlikely(ops->mode == MTD_OPS_RAW)) in nand_do_read_ops()
3171 ret = chip->ecc.read_page_raw(chip, bufpoi, in nand_do_read_ops()
3176 ret = chip->ecc.read_subpage(chip, col, bytes, in nand_do_read_ops()
3179 ret = chip->ecc.read_page(chip, bufpoi, in nand_do_read_ops()
3184 chip->pagecache.page = -1; in nand_do_read_ops()
3194 !(mtd->ecc_stats.failed - ecc_stats.failed) && in nand_do_read_ops()
3195 (ops->mode != MTD_OPS_RAW)) { in nand_do_read_ops()
3196 chip->pagecache.page = realpage; in nand_do_read_ops()
3197 chip->pagecache.bitflips = ret; in nand_do_read_ops()
3200 chip->pagecache.page = -1; in nand_do_read_ops()
3211 oobreadlen -= toread; in nand_do_read_ops()
3217 if (mtd->ecc_stats.failed - ecc_stats.failed) { in nand_do_read_ops()
3218 if (retry_mode + 1 < chip->read_retries) { in nand_do_read_ops()
3226 mtd->ecc_stats = ecc_stats; in nand_do_read_ops()
3237 memcpy(buf, chip->data_buf + col, bytes); in nand_do_read_ops()
3240 chip->pagecache.bitflips); in nand_do_read_ops()
3243 readlen -= bytes; in nand_do_read_ops()
3245 /* Reset to retry mode 0 */ in nand_do_read_ops()
3261 page = realpage & chip->pagemask; in nand_do_read_ops()
3271 ops->retlen = ops->len - (size_t) readlen; in nand_do_read_ops()
3273 ops->oobretlen = ops->ooblen - oobreadlen; in nand_do_read_ops()
3279 return -EBADMSG; in nand_do_read_ops()
3285 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
3286 * @chip: nand chip info structure
3293 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize); in nand_read_oob_std()
3298 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3300 * @chip: nand chip info structure
3306 int length = mtd->oobsize; in nand_read_oob_syndrome()
3307 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
3308 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
3309 uint8_t *bufpoi = chip->oob_poi; in nand_read_oob_syndrome()
3312 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0); in nand_read_oob_syndrome()
3316 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
3321 if (mtd->writesize > 512) in nand_read_oob_syndrome()
3340 length -= toread; in nand_read_oob_syndrome()
3352 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
3353 * @chip: nand chip info structure
3360 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi, in nand_write_oob_std()
3361 mtd->oobsize); in nand_write_oob_std()
3366 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3367 * with syndrome - only for large page flash
3368 * @chip: nand chip info structure
3374 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
3375 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
3376 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
3377 const uint8_t *bufpoi = chip->oob_poi; in nand_write_oob_syndrome()
3380 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
3382 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
3384 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
3396 if (mtd->writesize <= 512) { in nand_write_oob_syndrome()
3408 len -= num; in nand_write_oob_syndrome()
3427 length -= len; in nand_write_oob_syndrome()
3439 * nand_do_read_oob - [INTERN] NAND read out-of-band
3440 * @chip: NAND chip object
3444 * NAND read out-of-band data from the spare area.
3453 int readlen = ops->ooblen; in nand_do_read_oob()
3455 uint8_t *buf = ops->oobbuf; in nand_do_read_oob()
3461 stats = mtd->ecc_stats; in nand_do_read_oob()
3465 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_oob()
3469 realpage = (int)(from >> chip->page_shift); in nand_do_read_oob()
3470 page = realpage & chip->pagemask; in nand_do_read_oob()
3473 if (ops->mode == MTD_OPS_RAW) in nand_do_read_oob()
3474 ret = chip->ecc.read_oob_raw(chip, page); in nand_do_read_oob()
3476 ret = chip->ecc.read_oob(chip, page); in nand_do_read_oob()
3488 readlen -= len; in nand_do_read_oob()
3495 page = realpage & chip->pagemask; in nand_do_read_oob()
3505 ops->oobretlen = ops->ooblen - readlen; in nand_do_read_oob()
3510 if (mtd->ecc_stats.failed - stats.failed) in nand_do_read_oob()
3511 return -EBADMSG; in nand_do_read_oob()
3517 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
3522 * NAND read data and/or out-of-band data.
3530 ops->retlen = 0; in nand_read_oob()
3532 if (ops->mode != MTD_OPS_PLACE_OOB && in nand_read_oob()
3533 ops->mode != MTD_OPS_AUTO_OOB && in nand_read_oob()
3534 ops->mode != MTD_OPS_RAW) in nand_read_oob()
3535 return -ENOTSUPP; in nand_read_oob()
3541 if (!ops->datbuf) in nand_read_oob()
3551 * nand_write_page_raw_notsupp - dummy raw page write function
3552 * @chip: nand chip info structure
3554 * @oob_required: must write chip->oob_poi to OOB
3557 * Returns -ENOTSUPP unconditionally.
3562 return -ENOTSUPP; in nand_write_page_raw_notsupp()
3566 * nand_write_page_raw - [INTERN] raw page write function
3567 * @chip: nand chip info structure
3569 * @oob_required: must write chip->oob_poi to OOB
3572 * Not for syndrome calculating ECC controllers, which use a special oob layout.
3580 ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize); in nand_write_page_raw()
3585 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, in nand_write_page_raw()
3596 * nand_monolithic_write_page_raw - Monolithic page write in raw mode
3597 * @chip: NAND chip info structure
3599 * @oob_required: must write chip->oob_poi to OOB
3605 * into the NAND chip arrays in a single operation. This is an
3608 * cycles on the NAND bus, and finally sends the program command to
3609 * synchronyze the NAND chip cache.
3615 unsigned int size = mtd->writesize; in nand_monolithic_write_page_raw()
3619 size += mtd->oobsize; in nand_monolithic_write_page_raw()
3621 if (buf != chip->data_buf) { in nand_monolithic_write_page_raw()
3623 memcpy(write_buf, buf, mtd->writesize); in nand_monolithic_write_page_raw()
3632 * nand_write_page_raw_syndrome - [INTERN] raw page write function
3633 * @chip: nand chip info structure
3635 * @oob_required: must write chip->oob_poi to OOB
3638 * We need a special oob layout and handling even when ECC isn't checked.
3645 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
3646 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
3647 uint8_t *oob = chip->oob_poi; in nand_write_page_raw_syndrome()
3654 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
3661 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
3662 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_raw_syndrome()
3667 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
3676 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
3677 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_raw_syndrome()
3682 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
3686 size = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_raw_syndrome()
3696 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
3697 * @chip: nand chip info structure
3699 * @oob_required: must write chip->oob_poi to OOB
3706 int i, eccsize = chip->ecc.size, ret; in nand_write_page_swecc()
3707 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
3708 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
3709 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_swecc()
3712 /* Software ECC calculation */ in nand_write_page_swecc()
3713 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_write_page_swecc()
3714 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_swecc()
3716 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_page_swecc()
3717 chip->ecc.total); in nand_write_page_swecc()
3721 return chip->ecc.write_page_raw(chip, buf, 1, page); in nand_write_page_swecc()
3725 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
3726 * @chip: nand chip info structure
3728 * @oob_required: must write chip->oob_poi to OOB
3735 int i, eccsize = chip->ecc.size, ret; in nand_write_page_hwecc()
3736 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
3737 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
3738 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_hwecc()
3745 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_hwecc()
3746 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_hwecc()
3752 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_hwecc()
3755 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_page_hwecc()
3756 chip->ecc.total); in nand_write_page_hwecc()
3760 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false); in nand_write_page_hwecc()
3769 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
3770 * @chip: nand chip info structure
3774 * @oob_required: must write chip->oob_poi to OOB
3782 uint8_t *oob_buf = chip->oob_poi; in nand_write_subpage_hwecc()
3783 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
3784 int ecc_size = chip->ecc.size; in nand_write_subpage_hwecc()
3785 int ecc_bytes = chip->ecc.bytes; in nand_write_subpage_hwecc()
3786 int ecc_steps = chip->ecc.steps; in nand_write_subpage_hwecc()
3788 uint32_t end_step = (offset + data_len - 1) / ecc_size; in nand_write_subpage_hwecc()
3789 int oob_bytes = mtd->oobsize / ecc_steps; in nand_write_subpage_hwecc()
3798 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_subpage_hwecc()
3805 /* mask ECC of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
3809 chip->ecc.calculate(chip, buf, ecc_calc); in nand_write_subpage_hwecc()
3811 /* mask OOB of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
3821 /* copy calculated ECC for whole page to chip->buffer->oob */ in nand_write_subpage_hwecc()
3822 /* this include masked-value(0xFF) for unwritten subpages */ in nand_write_subpage_hwecc()
3823 ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
3824 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_subpage_hwecc()
3825 chip->ecc.total); in nand_write_subpage_hwecc()
3829 /* write OOB buffer to NAND device */ in nand_write_subpage_hwecc()
3830 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false); in nand_write_subpage_hwecc()
3839 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3840 * @chip: nand chip info structure
3842 * @oob_required: must write chip->oob_poi to OOB
3852 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
3853 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
3854 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
3856 uint8_t *oob = chip->oob_poi; in nand_write_page_syndrome()
3863 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_syndrome()
3864 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_syndrome()
3870 if (chip->ecc.prepad) { in nand_write_page_syndrome()
3871 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_syndrome()
3876 oob += chip->ecc.prepad; in nand_write_page_syndrome()
3879 chip->ecc.calculate(chip, p, oob); in nand_write_page_syndrome()
3887 if (chip->ecc.postpad) { in nand_write_page_syndrome()
3888 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_syndrome()
3893 oob += chip->ecc.postpad; in nand_write_page_syndrome()
3898 i = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_syndrome()
3909 * nand_write_page - write one page
3910 * @chip: NAND chip descriptor
3914 * @oob_required: must write chip->oob_poi to OOB
3925 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && in nand_write_page()
3926 chip->ecc.write_subpage) in nand_write_page()
3927 subpage = offset || (data_len < mtd->writesize); in nand_write_page()
3932 status = chip->ecc.write_page_raw(chip, buf, oob_required, in nand_write_page()
3935 status = chip->ecc.write_subpage(chip, offset, data_len, buf, in nand_write_page()
3938 status = chip->ecc.write_page(chip, buf, oob_required, page); in nand_write_page()
3946 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
3949 * nand_do_write_ops - [INTERN] NAND write with ECC
3950 * @chip: NAND chip object
3954 * NAND write with ECC.
3961 uint32_t writelen = ops->len; in nand_do_write_ops()
3963 uint32_t oobwritelen = ops->ooblen; in nand_do_write_ops()
3966 uint8_t *oob = ops->oobbuf; in nand_do_write_ops()
3967 uint8_t *buf = ops->datbuf; in nand_do_write_ops()
3971 ops->retlen = 0; in nand_do_write_ops()
3976 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { in nand_do_write_ops()
3979 return -EINVAL; in nand_do_write_ops()
3982 column = to & (mtd->writesize - 1); in nand_do_write_ops()
3984 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_ops()
3989 ret = -EIO; in nand_do_write_ops()
3993 realpage = (int)(to >> chip->page_shift); in nand_do_write_ops()
3994 page = realpage & chip->pagemask; in nand_do_write_ops()
3997 if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) && in nand_do_write_ops()
3998 ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len)) in nand_do_write_ops()
3999 chip->pagecache.page = -1; in nand_do_write_ops()
4002 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { in nand_do_write_ops()
4003 ret = -EINVAL; in nand_do_write_ops()
4008 int bytes = mtd->writesize; in nand_do_write_ops()
4011 int part_pagewr = (column || writelen < mtd->writesize); in nand_do_write_ops()
4015 else if (chip->options & NAND_USES_DMA) in nand_do_write_ops()
4018 chip->buf_align); in nand_do_write_ops()
4030 bytes = min_t(int, bytes - column, writelen); in nand_do_write_ops()
4032 memset(wbuf, 0xff, mtd->writesize); in nand_do_write_ops()
4039 oobwritelen -= len; in nand_do_write_ops()
4042 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_do_write_ops()
4047 (ops->mode == MTD_OPS_RAW)); in nand_do_write_ops()
4051 writelen -= bytes; in nand_do_write_ops()
4059 page = realpage & chip->pagemask; in nand_do_write_ops()
4068 ops->retlen = ops->len - writelen; in nand_do_write_ops()
4070 ops->oobretlen = ops->ooblen; in nand_do_write_ops()
4078 * panic_nand_write - [MTD Interface] NAND write with ECC
4085 * NAND write with ECC. Used when performing writes in interrupt context, this
4092 int chipnr = (int)(to >> chip->chip_shift); in panic_nand_write()
4104 ops.mode = MTD_OPS_PLACE_OOB; in panic_nand_write()
4113 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
4124 ops->retlen = 0; in nand_write_oob()
4130 switch (ops->mode) { in nand_write_oob()
4140 if (!ops->datbuf) in nand_write_oob()
4151 * nand_erase - [MTD Interface] erase block(s)
4163 * nand_erase_nand - [INTERN] erase block(s)
4164 * @chip: NAND chip object
4177 __func__, (unsigned long long)instr->addr, in nand_erase_nand()
4178 (unsigned long long)instr->len); in nand_erase_nand()
4180 if (check_offs_len(chip, instr->addr, instr->len)) in nand_erase_nand()
4181 return -EINVAL; in nand_erase_nand()
4189 page = (int)(instr->addr >> chip->page_shift); in nand_erase_nand()
4190 chipnr = (int)(instr->addr >> chip->chip_shift); in nand_erase_nand()
4193 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); in nand_erase_nand()
4195 /* Select the NAND device */ in nand_erase_nand()
4202 ret = -EIO; in nand_erase_nand()
4207 len = instr->len; in nand_erase_nand()
4212 chip->page_shift, allowbbt)) { in nand_erase_nand()
4215 ret = -EIO; in nand_erase_nand()
4223 if (page <= chip->pagecache.page && chip->pagecache.page < in nand_erase_nand()
4225 chip->pagecache.page = -1; in nand_erase_nand()
4227 ret = nand_erase_op(chip, (page & chip->pagemask) >> in nand_erase_nand()
4228 (chip->phys_erase_shift - chip->page_shift)); in nand_erase_nand()
4232 instr->fail_addr = in nand_erase_nand()
4233 ((loff_t)page << chip->page_shift); in nand_erase_nand()
4238 len -= (1ULL << chip->phys_erase_shift); in nand_erase_nand()
4242 if (len && !(page & chip->pagemask)) { in nand_erase_nand()
4261 * nand_sync - [MTD Interface] sync
4279 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
4286 int chipnr = (int)(offs >> chip->chip_shift); in nand_block_isbad()
4289 /* Select the NAND device */ in nand_block_isbad()
4305 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
4325 * nand_suspend - [MTD Interface] Suspend the NAND flash
4335 mutex_lock(&chip->lock); in nand_suspend()
4336 if (chip->ops.suspend) in nand_suspend()
4337 ret = chip->ops.suspend(chip); in nand_suspend()
4339 chip->suspended = 1; in nand_suspend()
4340 mutex_unlock(&chip->lock); in nand_suspend()
4346 * nand_resume - [MTD Interface] Resume the NAND flash
4353 mutex_lock(&chip->lock); in nand_resume()
4354 if (chip->suspended) { in nand_resume()
4355 if (chip->ops.resume) in nand_resume()
4356 chip->ops.resume(chip); in nand_resume()
4357 chip->suspended = 0; in nand_resume()
4362 mutex_unlock(&chip->lock); in nand_resume()
4366 * nand_shutdown - [MTD Interface] Finish the current NAND operation and
4376 * nand_lock - [MTD Interface] Lock the NAND flash
4385 if (!chip->ops.lock_area) in nand_lock()
4386 return -ENOTSUPP; in nand_lock()
4388 return chip->ops.lock_area(chip, ofs, len); in nand_lock()
4392 * nand_unlock - [MTD Interface] Unlock the NAND flash
4401 if (!chip->ops.unlock_area) in nand_unlock()
4402 return -ENOTSUPP; in nand_unlock()
4404 return chip->ops.unlock_area(chip, ofs, len); in nand_unlock()
4411 if (!chip->controller) { in nand_set_defaults()
4412 chip->controller = &chip->legacy.dummy_controller; in nand_set_defaults()
4413 nand_controller_init(chip->controller); in nand_set_defaults()
4418 if (!chip->buf_align) in nand_set_defaults()
4419 chip->buf_align = 1; in nand_set_defaults()
4428 s[len - 1] = 0; in sanitize_string()
4431 for (i = 0; i < len - 1; i++) { in sanitize_string()
4441 * nand_id_has_period - Check if an ID string has a given wraparound period
4448 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
4462 * nand_id_len - Get the length of an ID string returned by CMD_READID
4473 /* Find last non-zero byte */ in nand_id_len()
4474 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) in nand_id_len()
4492 if (last_nonzero < arrlen - 1) in nand_id_len()
4510 * Many new NAND share similar device ID codes, which represent the size of the
4512 * manufacturer-specific "extended ID" decoding patterns.
4519 u8 *id_data = chip->id.data; in nand_decode_ext_id()
4521 memorg = nanddev_get_memorg(&chip->base); in nand_decode_ext_id()
4524 memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in nand_decode_ext_id()
4529 memorg->pagesize = 1024 << (extid & 0x03); in nand_decode_ext_id()
4530 mtd->writesize = memorg->pagesize; in nand_decode_ext_id()
4533 memorg->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); in nand_decode_ext_id()
4534 mtd->oobsize = memorg->oobsize; in nand_decode_ext_id()
4537 memorg->pages_per_eraseblock = ((64 * 1024) << (extid & 0x03)) / in nand_decode_ext_id()
4538 memorg->pagesize; in nand_decode_ext_id()
4539 mtd->erasesize = (64 * 1024) << (extid & 0x03); in nand_decode_ext_id()
4543 chip->options |= NAND_BUSWIDTH_16; in nand_decode_ext_id()
4557 memorg = nanddev_get_memorg(&chip->base); in nand_decode_id()
4559 memorg->pages_per_eraseblock = type->erasesize / type->pagesize; in nand_decode_id()
4560 mtd->erasesize = type->erasesize; in nand_decode_id()
4561 memorg->pagesize = type->pagesize; in nand_decode_id()
4562 mtd->writesize = memorg->pagesize; in nand_decode_id()
4563 memorg->oobsize = memorg->pagesize / 32; in nand_decode_id()
4564 mtd->oobsize = memorg->oobsize; in nand_decode_id()
4566 /* All legacy ID NAND are small-page, SLC */ in nand_decode_id()
4567 memorg->bits_per_cell = 1; in nand_decode_id()
4573 * page size, cell-type information).
4580 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) in nand_decode_bbm_options()
4581 chip->badblockpos = NAND_BBM_POS_LARGE; in nand_decode_bbm_options()
4583 chip->badblockpos = NAND_BBM_POS_SMALL; in nand_decode_bbm_options()
4588 return type->id_len; in is_full_id_nand()
4594 struct nand_device *base = &chip->base; in find_full_id_nand()
4598 u8 *id_data = chip->id.data; in find_full_id_nand()
4600 memorg = nanddev_get_memorg(&chip->base); in find_full_id_nand()
4602 if (!strncmp(type->id, id_data, type->id_len)) { in find_full_id_nand()
4603 memorg->pagesize = type->pagesize; in find_full_id_nand()
4604 mtd->writesize = memorg->pagesize; in find_full_id_nand()
4605 memorg->pages_per_eraseblock = type->erasesize / in find_full_id_nand()
4606 type->pagesize; in find_full_id_nand()
4607 mtd->erasesize = type->erasesize; in find_full_id_nand()
4608 memorg->oobsize = type->oobsize; in find_full_id_nand()
4609 mtd->oobsize = memorg->oobsize; in find_full_id_nand()
4611 memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in find_full_id_nand()
4612 memorg->eraseblocks_per_lun = in find_full_id_nand()
4613 DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20, in find_full_id_nand()
4614 memorg->pagesize * in find_full_id_nand()
4615 memorg->pages_per_eraseblock); in find_full_id_nand()
4616 chip->options |= type->options; in find_full_id_nand()
4621 chip->parameters.model = kstrdup(type->name, GFP_KERNEL); in find_full_id_nand()
4622 if (!chip->parameters.model) in find_full_id_nand()
4631 * Manufacturer detection. Only used when the NAND is not ONFI or JEDEC
4632 * compliant and does not have a full-id or legacy-id entry in the nand_ids
4641 if (chip->manufacturer.desc && chip->manufacturer.desc->ops && in nand_manufacturer_detect()
4642 chip->manufacturer.desc->ops->detect) { in nand_manufacturer_detect()
4645 memorg = nanddev_get_memorg(&chip->base); in nand_manufacturer_detect()
4648 memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); in nand_manufacturer_detect()
4649 chip->manufacturer.desc->ops->detect(chip); in nand_manufacturer_detect()
4659 * their ->init() hook.
4663 if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops || in nand_manufacturer_init()
4664 !chip->manufacturer.desc->ops->init) in nand_manufacturer_init()
4667 return chip->manufacturer.desc->ops->init(chip); in nand_manufacturer_init()
4674 * ->cleanup() hook.
4679 if (chip->manufacturer.desc && chip->manufacturer.desc->ops && in nand_manufacturer_cleanup()
4680 chip->manufacturer.desc->ops->cleanup) in nand_manufacturer_cleanup()
4681 chip->manufacturer.desc->ops->cleanup(chip); in nand_manufacturer_cleanup()
4687 return manufacturer_desc ? manufacturer_desc->name : "Unknown"; in nand_manufacturer_name()
4699 u8 *id_data = chip->id.data; in nand_detect()
4705 * unassigned by the ID-based detection logic. in nand_detect()
4707 memorg = nanddev_get_memorg(&chip->base); in nand_detect()
4708 memorg->planes_per_lun = 1; in nand_detect()
4709 memorg->luns_per_target = 1; in nand_detect()
4713 * after power-up. in nand_detect()
4732 * Try again to make sure, as some systems the bus-hold or other in nand_detect()
4734 * possibly credible NAND flash to appear. If the two results do in nand_detect()
4739 ret = nand_readid_op(chip, 0, id_data, sizeof(chip->id.data)); in nand_detect()
4746 return -ENODEV; in nand_detect()
4749 chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data)); in nand_detect()
4753 chip->manufacturer.desc = manufacturer_desc; in nand_detect()
4759 * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic in nand_detect()
4761 * This is required to make sure initial NAND bus width set by the in nand_detect()
4762 * NAND controller driver is coherent with the real NAND bus width in nand_detect()
4763 * (extracted by auto-detection code). in nand_detect()
4765 busw = chip->options & NAND_BUSWIDTH_16; in nand_detect()
4769 * before starting auto-detection. in nand_detect()
4771 chip->options &= ~NAND_BUSWIDTH_16; in nand_detect()
4773 for (; type->name != NULL; type++) { in nand_detect()
4777 } else if (dev_id == type->dev_id) { in nand_detect()
4782 if (!type->name || !type->pagesize) { in nand_detect()
4798 if (!type->name) in nand_detect()
4799 return -ENODEV; in nand_detect()
4801 chip->parameters.model = kstrdup(type->name, GFP_KERNEL); in nand_detect()
4802 if (!chip->parameters.model) in nand_detect()
4803 return -ENOMEM; in nand_detect()
4805 if (!type->pagesize) in nand_detect()
4811 chip->options |= type->options; in nand_detect()
4813 memorg->eraseblocks_per_lun = in nand_detect()
4814 DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20, in nand_detect()
4815 memorg->pagesize * in nand_detect()
4816 memorg->pages_per_eraseblock); in nand_detect()
4819 if (!mtd->name) in nand_detect()
4820 mtd->name = chip->parameters.model; in nand_detect()
4822 if (chip->options & NAND_BUSWIDTH_AUTO) { in nand_detect()
4825 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { in nand_detect()
4833 mtd->name); in nand_detect()
4835 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8); in nand_detect()
4836 ret = -EINVAL; in nand_detect()
4844 chip->page_shift = ffs(mtd->writesize) - 1; in nand_detect()
4845 /* Convert chipsize to number of pages per chip -1 */ in nand_detect()
4846 targetsize = nanddev_target_size(&chip->base); in nand_detect()
4847 chip->pagemask = (targetsize >> chip->page_shift) - 1; in nand_detect()
4849 chip->bbt_erase_shift = chip->phys_erase_shift = in nand_detect()
4850 ffs(mtd->erasesize) - 1; in nand_detect()
4852 chip->chip_shift = ffs((unsigned)targetsize) - 1; in nand_detect()
4854 chip->chip_shift = ffs((unsigned)(targetsize >> 32)); in nand_detect()
4855 chip->chip_shift += 32 - 1; in nand_detect()
4858 if (chip->chip_shift - chip->page_shift > 16) in nand_detect()
4859 chip->options |= NAND_ROW_ADDR_3; in nand_detect()
4861 chip->badblockbits = 8; in nand_detect()
4868 chip->parameters.model); in nand_detect()
4871 mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); in nand_detect()
4875 kfree(chip->parameters.model); in nand_detect()
4898 [NAND_ECC_ON_DIE] = "on-die", in of_get_rawnand_ecc_engine_type_legacy()
4904 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_engine_type_legacy()
4937 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_placement_legacy()
4951 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_algo_legacy()
4965 struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf; in of_get_nand_ecc_legacy_user_config()
4967 if (user_conf->engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in of_get_nand_ecc_legacy_user_config()
4968 user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn); in of_get_nand_ecc_legacy_user_config()
4970 if (user_conf->algo == NAND_ECC_ALGO_UNKNOWN) in of_get_nand_ecc_legacy_user_config()
4971 user_conf->algo = of_get_rawnand_ecc_algo_legacy(dn); in of_get_nand_ecc_legacy_user_config()
4973 if (user_conf->placement == NAND_ECC_PLACEMENT_UNKNOWN) in of_get_nand_ecc_legacy_user_config()
4974 user_conf->placement = of_get_rawnand_ecc_placement_legacy(dn); in of_get_nand_ecc_legacy_user_config()
4981 if (of_property_read_u32(np, "nand-bus-width", &val)) in of_get_nand_bus_width()
4989 return -EIO; in of_get_nand_bus_width()
4995 return of_property_read_bool(np, "nand-on-flash-bbt"); in of_get_nand_on_flash_bbt()
5000 struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip)); in rawnand_dt_init() local
5007 chip->options |= NAND_BUSWIDTH_16; in rawnand_dt_init()
5009 if (of_property_read_bool(dn, "nand-is-boot-medium")) in rawnand_dt_init()
5010 chip->options |= NAND_IS_BOOT_MEDIUM; in rawnand_dt_init()
5013 chip->bbt_options |= NAND_BBT_USE_FLASH; in rawnand_dt_init()
5015 of_get_nand_ecc_user_config(nand); in rawnand_dt_init()
5019 * If neither the user nor the NAND controller have requested a specific in rawnand_dt_init()
5020 * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST. in rawnand_dt_init()
5022 nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in rawnand_dt_init()
5026 * case default to the NAND controller choice, otherwise fallback to in rawnand_dt_init()
5027 * the raw NAND default one. in rawnand_dt_init()
5029 if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5030 chip->ecc.engine_type = nand->ecc.user_conf.engine_type; in rawnand_dt_init()
5031 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5032 chip->ecc.engine_type = nand->ecc.defaults.engine_type; in rawnand_dt_init()
5034 chip->ecc.placement = nand->ecc.user_conf.placement; in rawnand_dt_init()
5035 chip->ecc.algo = nand->ecc.user_conf.algo; in rawnand_dt_init()
5036 chip->ecc.strength = nand->ecc.user_conf.strength; in rawnand_dt_init()
5037 chip->ecc.size = nand->ecc.user_conf.step_size; in rawnand_dt_init()
5043 * nand_scan_ident - Scan for the NAND device
5044 * @chip: NAND chip object
5046 * @table: alternative NAND ID table
5052 * to tweak some ECC-related parameters before nand_scan_tail(). This separation
5054 * as been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
5065 memorg = nanddev_get_memorg(&chip->base); in nand_scan_ident()
5068 chip->cur_cs = -1; in nand_scan_ident()
5070 mutex_init(&chip->lock); in nand_scan_ident()
5073 chip->current_interface_config = nand_get_reset_interface_config(); in nand_scan_ident()
5079 if (!mtd->name && mtd->dev.parent) in nand_scan_ident()
5080 mtd->name = dev_name(mtd->dev.parent); in nand_scan_ident()
5089 memorg->ntargets = maxchips; in nand_scan_ident()
5094 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) in nand_scan_ident()
5095 pr_warn("No NAND device found\n"); in nand_scan_ident()
5100 nand_maf_id = chip->id.data[0]; in nand_scan_ident()
5101 nand_dev_id = chip->id.data[1]; in nand_scan_ident()
5130 memorg->ntargets = i; in nand_scan_ident()
5131 mtd->size = i * nanddev_target_size(&chip->base); in nand_scan_ident()
5138 kfree(chip->parameters.model); in nand_scan_ident_cleanup()
5139 kfree(chip->parameters.onfi); in nand_scan_ident_cleanup()
5144 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_on_host_ops() local
5146 switch (ecc->placement) { in nand_set_ecc_on_host_ops()
5150 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5151 ecc->read_page = nand_read_page_hwecc; in nand_set_ecc_on_host_ops()
5152 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5153 ecc->write_page = nand_write_page_hwecc; in nand_set_ecc_on_host_ops()
5154 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5155 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_on_host_ops()
5156 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5157 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_on_host_ops()
5158 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5159 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_on_host_ops()
5160 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5161 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_on_host_ops()
5162 if (!ecc->read_subpage) in nand_set_ecc_on_host_ops()
5163 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_on_host_ops()
5164 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) in nand_set_ecc_on_host_ops()
5165 ecc->write_subpage = nand_write_subpage_hwecc; in nand_set_ecc_on_host_ops()
5169 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && in nand_set_ecc_on_host_ops()
5170 (!ecc->read_page || in nand_set_ecc_on_host_ops()
5171 ecc->read_page == nand_read_page_hwecc || in nand_set_ecc_on_host_ops()
5172 !ecc->write_page || in nand_set_ecc_on_host_ops()
5173 ecc->write_page == nand_write_page_hwecc)) { in nand_set_ecc_on_host_ops()
5174 WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); in nand_set_ecc_on_host_ops()
5175 return -EINVAL; in nand_set_ecc_on_host_ops()
5178 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5179 ecc->read_page = nand_read_page_syndrome; in nand_set_ecc_on_host_ops()
5180 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5181 ecc->write_page = nand_write_page_syndrome; in nand_set_ecc_on_host_ops()
5182 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5183 ecc->read_page_raw = nand_read_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5184 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5185 ecc->write_page_raw = nand_write_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5186 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5187 ecc->read_oob = nand_read_oob_syndrome; in nand_set_ecc_on_host_ops()
5188 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5189 ecc->write_oob = nand_write_oob_syndrome; in nand_set_ecc_on_host_ops()
5194 ecc->placement); in nand_set_ecc_on_host_ops()
5195 return -EINVAL; in nand_set_ecc_on_host_ops()
5205 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_soft_ops() local
5207 if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT)) in nand_set_ecc_soft_ops()
5208 return -EINVAL; in nand_set_ecc_soft_ops()
5210 switch (ecc->algo) { in nand_set_ecc_soft_ops()
5212 ecc->calculate = nand_calculate_ecc; in nand_set_ecc_soft_ops()
5213 ecc->correct = nand_correct_data; in nand_set_ecc_soft_ops()
5214 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5215 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5216 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5217 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5218 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5219 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5220 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5221 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5222 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5223 if (!ecc->size) in nand_set_ecc_soft_ops()
5224 ecc->size = 256; in nand_set_ecc_soft_ops()
5225 ecc->bytes = 3; in nand_set_ecc_soft_ops()
5226 ecc->strength = 1; in nand_set_ecc_soft_ops()
5229 ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_set_ecc_soft_ops()
5235 return -EINVAL; in nand_set_ecc_soft_ops()
5237 ecc->calculate = nand_bch_calculate_ecc; in nand_set_ecc_soft_ops()
5238 ecc->correct = nand_bch_correct_data; in nand_set_ecc_soft_ops()
5239 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5240 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5241 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5242 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5243 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5244 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5245 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5246 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5247 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5250 * Board driver should supply ecc.size and ecc.strength in nand_set_ecc_soft_ops()
5254 if (!ecc->size && (mtd->oobsize >= 64)) { in nand_set_ecc_soft_ops()
5255 ecc->size = 512; in nand_set_ecc_soft_ops()
5256 ecc->strength = 4; in nand_set_ecc_soft_ops()
5260 * if no ecc placement scheme was provided pickup the default in nand_set_ecc_soft_ops()
5263 if (!mtd->ooblayout) { in nand_set_ecc_soft_ops()
5265 if (mtd->oobsize < 64) { in nand_set_ecc_soft_ops()
5267 return -EINVAL; in nand_set_ecc_soft_ops()
5275 * We can only maximize ECC config when the default layout is in nand_set_ecc_soft_ops()
5279 if (mtd->ooblayout == nand_get_large_page_ooblayout() && in nand_set_ecc_soft_ops()
5280 nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) { in nand_set_ecc_soft_ops()
5284 ecc->size = 1024; in nand_set_ecc_soft_ops()
5285 steps = mtd->writesize / ecc->size; in nand_set_ecc_soft_ops()
5288 bytes = (mtd->oobsize - 2) / steps; in nand_set_ecc_soft_ops()
5289 ecc->strength = bytes * 8 / fls(8 * ecc->size); in nand_set_ecc_soft_ops()
5293 ecc->bytes = 0; in nand_set_ecc_soft_ops()
5294 ecc->priv = nand_bch_init(mtd); in nand_set_ecc_soft_ops()
5295 if (!ecc->priv) { in nand_set_ecc_soft_ops()
5296 WARN(1, "BCH ECC initialization failed!\n"); in nand_set_ecc_soft_ops()
5297 return -EINVAL; in nand_set_ecc_soft_ops()
5301 WARN(1, "Unsupported ECC algorithm!\n"); in nand_set_ecc_soft_ops()
5302 return -EINVAL; in nand_set_ecc_soft_ops()
5307 * nand_check_ecc_caps - check the sanity of preset ECC settings
5308 * @chip: nand chip info structure
5309 * @caps: ECC caps info structure
5310 * @oobavail: OOB size that the ECC engine can use
5312 * When ECC step size and strength are already set, check if they are supported
5313 * by the controller and the calculated ECC bytes fit within the chip's OOB.
5314 * On success, the calculated ECC bytes is set.
5322 int preset_step = chip->ecc.size; in nand_check_ecc_caps()
5323 int preset_strength = chip->ecc.strength; in nand_check_ecc_caps()
5324 int ecc_bytes, nsteps = mtd->writesize / preset_step; in nand_check_ecc_caps()
5327 for (i = 0; i < caps->nstepinfos; i++) { in nand_check_ecc_caps()
5328 stepinfo = &caps->stepinfos[i]; in nand_check_ecc_caps()
5330 if (stepinfo->stepsize != preset_step) in nand_check_ecc_caps()
5333 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_check_ecc_caps()
5334 if (stepinfo->strengths[j] != preset_strength) in nand_check_ecc_caps()
5337 ecc_bytes = caps->calc_ecc_bytes(preset_step, in nand_check_ecc_caps()
5343 pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB", in nand_check_ecc_caps()
5345 return -ENOSPC; in nand_check_ecc_caps()
5348 chip->ecc.bytes = ecc_bytes; in nand_check_ecc_caps()
5354 pr_err("ECC (step, strength) = (%d, %d) not supported on this controller", in nand_check_ecc_caps()
5357 return -ENOTSUPP; in nand_check_ecc_caps()
5361 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
5362 * @chip: nand chip info structure
5363 * @caps: ECC engine caps info structure
5364 * @oobavail: OOB size that the ECC engine can use
5366 * If a chip's ECC requirement is provided, try to meet it with the least
5367 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
5368 * On success, the chosen ECC settings are set.
5375 nanddev_get_ecc_requirements(&chip->base); in nand_match_ecc_req()
5378 int req_step = requirements->step_size; in nand_match_ecc_req()
5379 int req_strength = requirements->strength; in nand_match_ecc_req()
5385 /* No information provided by the NAND chip */ in nand_match_ecc_req()
5387 return -ENOTSUPP; in nand_match_ecc_req()
5390 req_corr = mtd->writesize / req_step * req_strength; in nand_match_ecc_req()
5392 for (i = 0; i < caps->nstepinfos; i++) { in nand_match_ecc_req()
5393 stepinfo = &caps->stepinfos[i]; in nand_match_ecc_req()
5394 step_size = stepinfo->stepsize; in nand_match_ecc_req()
5396 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_match_ecc_req()
5397 strength = stepinfo->strengths[j]; in nand_match_ecc_req()
5407 if (mtd->writesize % step_size) in nand_match_ecc_req()
5410 nsteps = mtd->writesize / step_size; in nand_match_ecc_req()
5412 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_match_ecc_req()
5423 * with the least number of ECC bytes. in nand_match_ecc_req()
5435 return -ENOTSUPP; in nand_match_ecc_req()
5437 chip->ecc.size = best_step; in nand_match_ecc_req()
5438 chip->ecc.strength = best_strength; in nand_match_ecc_req()
5439 chip->ecc.bytes = best_ecc_bytes; in nand_match_ecc_req()
5445 * nand_maximize_ecc - choose the max ECC strength available
5446 * @chip: nand chip info structure
5447 * @caps: ECC engine caps info structure
5448 * @oobavail: OOB size that the ECC engine can use
5450 * Choose the max ECC strength that is supported on the controller, and can fit
5451 * within the chip's OOB. On success, the chosen ECC settings are set.
5465 for (i = 0; i < caps->nstepinfos; i++) { in nand_maximize_ecc()
5466 stepinfo = &caps->stepinfos[i]; in nand_maximize_ecc()
5467 step_size = stepinfo->stepsize; in nand_maximize_ecc()
5469 /* If chip->ecc.size is already set, respect it */ in nand_maximize_ecc()
5470 if (chip->ecc.size && step_size != chip->ecc.size) in nand_maximize_ecc()
5473 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_maximize_ecc()
5474 strength = stepinfo->strengths[j]; in nand_maximize_ecc()
5476 if (mtd->writesize % step_size) in nand_maximize_ecc()
5479 nsteps = mtd->writesize / step_size; in nand_maximize_ecc()
5481 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_maximize_ecc()
5505 return -ENOTSUPP; in nand_maximize_ecc()
5507 chip->ecc.size = best_step; in nand_maximize_ecc()
5508 chip->ecc.strength = best_strength; in nand_maximize_ecc()
5509 chip->ecc.bytes = best_ecc_bytes; in nand_maximize_ecc()
5515 * nand_ecc_choose_conf - Set the ECC strength and ECC step size
5516 * @chip: nand chip info structure
5517 * @caps: ECC engine caps info structure
5518 * @oobavail: OOB size that the ECC engine can use
5520 * Choose the ECC configuration according to following logic.
5522 * 1. If both ECC step size and ECC strength are already set (usually by DT)
5524 * 2. If the user provided the nand-ecc-maximize property, then select maximum
5525 * ECC strength.
5526 * 3. Otherwise, try to match the ECC step size and ECC strength closest
5528 * requirement then fallback to the maximum ECC step size and ECC strength.
5530 * On success, the chosen ECC settings are set.
5538 if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize)) in nand_ecc_choose_conf()
5539 return -EINVAL; in nand_ecc_choose_conf()
5541 if (chip->ecc.size && chip->ecc.strength) in nand_ecc_choose_conf()
5544 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) in nand_ecc_choose_conf()
5554 static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos) in rawnand_erase() argument
5556 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_erase()
5558 unsigned int eb = nanddev_pos_to_row(nand, pos); in rawnand_erase()
5561 eb >>= nand->rowconv.eraseblock_addr_shift; in rawnand_erase()
5563 nand_select_target(chip, pos->target); in rawnand_erase()
5570 static int rawnand_markbad(struct nand_device *nand, in rawnand_markbad() argument
5573 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_markbad()
5576 return nand_markbad_bbm(chip, nanddev_pos_to_offs(nand, pos)); in rawnand_markbad()
5579 static bool rawnand_isbad(struct nand_device *nand, const struct nand_pos *pos) in rawnand_isbad() argument
5581 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_isbad()
5585 nand_select_target(chip, pos->target); in rawnand_isbad()
5586 ret = nand_isbad_bbm(chip, nanddev_pos_to_offs(nand, pos)); in rawnand_isbad()
5599 * nand_scan_tail - Scan for the NAND device
5600 * @chip: NAND chip object
5609 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_scan_tail() local
5612 /* New bad blocks should be marked in OOB, flash-based BBT, or both */ in nand_scan_tail()
5613 if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && in nand_scan_tail()
5614 !(chip->bbt_options & NAND_BBT_USE_FLASH))) { in nand_scan_tail()
5615 return -EINVAL; in nand_scan_tail()
5618 chip->data_buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
5619 if (!chip->data_buf) in nand_scan_tail()
5620 return -ENOMEM; in nand_scan_tail()
5623 * FIXME: some NAND manufacturer drivers expect the first die to be in nand_scan_tail()
5624 * selected when manufacturer->init() is called. They should be fixed in nand_scan_tail()
5625 * to explictly select the relevant die when interacting with the NAND in nand_scan_tail()
5635 chip->oob_poi = chip->data_buf + mtd->writesize; in nand_scan_tail()
5640 if (!mtd->ooblayout && in nand_scan_tail()
5641 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
5642 ecc->algo == NAND_ECC_ALGO_BCH)) { in nand_scan_tail()
5643 switch (mtd->oobsize) { in nand_scan_tail()
5657 * ->oobsize, but we must keep the old large/small in nand_scan_tail()
5658 * page with ECC layout when ->oobsize <= 128 for in nand_scan_tail()
5661 if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) { in nand_scan_tail()
5668 mtd->oobsize); in nand_scan_tail()
5669 ret = -EINVAL; in nand_scan_tail()
5675 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
5676 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
5679 switch (ecc->engine_type) { in nand_scan_tail()
5685 if (mtd->writesize >= ecc->size) { in nand_scan_tail()
5686 if (!ecc->strength) { in nand_scan_tail()
5687 WARN(1, "Driver must set ecc.strength when using hardware ECC\n"); in nand_scan_tail()
5688 ret = -EINVAL; in nand_scan_tail()
5693 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", in nand_scan_tail()
5694 ecc->size, mtd->writesize); in nand_scan_tail()
5695 ecc->engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in nand_scan_tail()
5696 ecc->algo = NAND_ECC_ALGO_HAMMING; in nand_scan_tail()
5706 if (!ecc->read_page || !ecc->write_page) { in nand_scan_tail()
5707 WARN(1, "No ECC functions supplied; on-die ECC not possible\n"); in nand_scan_tail()
5708 ret = -EINVAL; in nand_scan_tail()
5711 if (!ecc->read_oob) in nand_scan_tail()
5712 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
5713 if (!ecc->write_oob) in nand_scan_tail()
5714 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
5719 ecc->read_page = nand_read_page_raw; in nand_scan_tail()
5720 ecc->write_page = nand_write_page_raw; in nand_scan_tail()
5721 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
5722 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
5723 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
5724 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
5725 ecc->size = mtd->writesize; in nand_scan_tail()
5726 ecc->bytes = 0; in nand_scan_tail()
5727 ecc->strength = 0; in nand_scan_tail()
5731 WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->engine_type); in nand_scan_tail()
5732 ret = -EINVAL; in nand_scan_tail()
5736 if (ecc->correct || ecc->calculate) { in nand_scan_tail()
5737 ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
5738 ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
5739 if (!ecc->calc_buf || !ecc->code_buf) { in nand_scan_tail()
5740 ret = -ENOMEM; in nand_scan_tail()
5746 if (!ecc->read_oob_raw) in nand_scan_tail()
5747 ecc->read_oob_raw = ecc->read_oob; in nand_scan_tail()
5748 if (!ecc->write_oob_raw) in nand_scan_tail()
5749 ecc->write_oob_raw = ecc->write_oob; in nand_scan_tail()
5751 /* propagate ecc info to mtd_info */ in nand_scan_tail()
5752 mtd->ecc_strength = ecc->strength; in nand_scan_tail()
5753 mtd->ecc_step_size = ecc->size; in nand_scan_tail()
5756 * Set the number of read / write steps for one page depending on ECC in nand_scan_tail()
5757 * mode. in nand_scan_tail()
5759 ecc->steps = mtd->writesize / ecc->size; in nand_scan_tail()
5760 if (ecc->steps * ecc->size != mtd->writesize) { in nand_scan_tail()
5761 WARN(1, "Invalid ECC parameters\n"); in nand_scan_tail()
5762 ret = -EINVAL; in nand_scan_tail()
5766 ecc->total = ecc->steps * ecc->bytes; in nand_scan_tail()
5767 chip->base.ecc.ctx.total = ecc->total; in nand_scan_tail()
5769 if (ecc->total > mtd->oobsize) { in nand_scan_tail()
5770 WARN(1, "Total number of ECC bytes exceeded oobsize\n"); in nand_scan_tail()
5771 ret = -EINVAL; in nand_scan_tail()
5783 mtd->oobavail = ret; in nand_scan_tail()
5785 /* ECC sanity check: warn if it's too weak */ in nand_scan_tail()
5786 if (!nand_ecc_is_strong_enough(&chip->base)) in nand_scan_tail()
5787 …pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one requir… in nand_scan_tail()
5788 mtd->name, chip->ecc.strength, chip->ecc.size, in nand_scan_tail()
5789 nanddev_get_ecc_requirements(&chip->base)->strength, in nand_scan_tail()
5790 nanddev_get_ecc_requirements(&chip->base)->step_size); in nand_scan_tail()
5792 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
5793 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { in nand_scan_tail()
5794 switch (ecc->steps) { in nand_scan_tail()
5796 mtd->subpage_sft = 1; in nand_scan_tail()
5801 mtd->subpage_sft = 2; in nand_scan_tail()
5805 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; in nand_scan_tail()
5808 chip->pagecache.page = -1; in nand_scan_tail()
5810 /* Large page NAND with SOFT_ECC should support subpage reads */ in nand_scan_tail()
5811 switch (ecc->engine_type) { in nand_scan_tail()
5813 if (chip->page_shift > 9) in nand_scan_tail()
5814 chip->options |= NAND_SUBPAGE_READ; in nand_scan_tail()
5821 ret = nanddev_init(&chip->base, &rawnand_ops, mtd->owner); in nand_scan_tail()
5826 if (chip->options & NAND_ROM) in nand_scan_tail()
5827 mtd->flags = MTD_CAP_ROM; in nand_scan_tail()
5830 mtd->_erase = nand_erase; in nand_scan_tail()
5831 mtd->_point = NULL; in nand_scan_tail()
5832 mtd->_unpoint = NULL; in nand_scan_tail()
5833 mtd->_panic_write = panic_nand_write; in nand_scan_tail()
5834 mtd->_read_oob = nand_read_oob; in nand_scan_tail()
5835 mtd->_write_oob = nand_write_oob; in nand_scan_tail()
5836 mtd->_sync = nand_sync; in nand_scan_tail()
5837 mtd->_lock = nand_lock; in nand_scan_tail()
5838 mtd->_unlock = nand_unlock; in nand_scan_tail()
5839 mtd->_suspend = nand_suspend; in nand_scan_tail()
5840 mtd->_resume = nand_resume; in nand_scan_tail()
5841 mtd->_reboot = nand_shutdown; in nand_scan_tail()
5842 mtd->_block_isreserved = nand_block_isreserved; in nand_scan_tail()
5843 mtd->_block_isbad = nand_block_isbad; in nand_scan_tail()
5844 mtd->_block_markbad = nand_block_markbad; in nand_scan_tail()
5845 mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks; in nand_scan_tail()
5852 if (!mtd->bitflip_threshold) in nand_scan_tail()
5853 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); in nand_scan_tail()
5860 /* Enter fastest possible mode on all dies. */ in nand_scan_tail()
5861 for (i = 0; i < nanddev_ntargets(&chip->base); i++) { in nand_scan_tail()
5868 if (chip->options & NAND_SKIP_BBTSCAN) in nand_scan_tail()
5879 kfree(chip->best_interface_config); in nand_scan_tail()
5882 nanddev_cleanup(&chip->base); in nand_scan_tail()
5888 kfree(chip->data_buf); in nand_scan_tail()
5889 kfree(ecc->code_buf); in nand_scan_tail()
5890 kfree(ecc->calc_buf); in nand_scan_tail()
5897 if (chip->controller->ops && chip->controller->ops->attach_chip) in nand_attach()
5898 return chip->controller->ops->attach_chip(chip); in nand_attach()
5905 if (chip->controller->ops && chip->controller->ops->detach_chip) in nand_detach()
5906 chip->controller->ops->detach_chip(chip); in nand_detach()
5910 * nand_scan_with_ids - [NAND Interface] Scan for the NAND device
5911 * @chip: NAND chip object
5925 return -EINVAL; in nand_scan_with_ids()
5951 * nand_cleanup - [NAND Interface] Free resources held by the NAND device
5952 * @chip: NAND chip object
5956 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_cleanup()
5957 chip->ecc.algo == NAND_ECC_ALGO_BCH) in nand_cleanup()
5958 nand_bch_free((struct nand_bch_control *)chip->ecc.priv); in nand_cleanup()
5960 nanddev_cleanup(&chip->base); in nand_cleanup()
5963 kfree(chip->bbt); in nand_cleanup()
5964 kfree(chip->data_buf); in nand_cleanup()
5965 kfree(chip->ecc.code_buf); in nand_cleanup()
5966 kfree(chip->ecc.calc_buf); in nand_cleanup()
5969 if (chip->badblock_pattern && chip->badblock_pattern->options in nand_cleanup()
5971 kfree(chip->badblock_pattern); in nand_cleanup()
5974 kfree(chip->best_interface_config); in nand_cleanup()
5991 MODULE_DESCRIPTION("Generic NAND flash driver code");