Lines Matching +full:hw +full:- +full:settle +full:- +full:time
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
28 /* Converts time to clock cycles */
46 * SFTRST needs 3 GPMI clocks to settle, the reference manual in clear_poll_bit()
52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
96 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
116 return -ETIMEDOUT; in gpmi_reset_block()
126 clk = this->resources.clock[i]; in __gpmi_enable_clk()
141 for (; i > 0; i--) in __gpmi_enable_clk()
142 clk_disable_unprepare(this->resources.clock[i - 1]); in __gpmi_enable_clk()
148 struct resources *r = &this->resources; in gpmi_init()
151 ret = pm_runtime_get_sync(this->dev); in gpmi_init()
155 ret = gpmi_reset_block(r->gpmi_regs, false); in gpmi_init()
163 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in gpmi_init()
168 writel(BM_GPMI_CTRL1_GPMI_MODE, r->gpmi_regs + HW_GPMI_CTRL1_CLR); in gpmi_init()
172 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
174 /* Disable Write-Protection. */ in gpmi_init()
175 writel(BM_GPMI_CTRL1_DEV_RESET, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
178 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
184 writel(BM_GPMI_CTRL1_DECOUPLE_CS, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
187 pm_runtime_mark_last_busy(this->dev); in gpmi_init()
188 pm_runtime_put_autosuspend(this->dev); in gpmi_init()
195 struct resources *r = &this->resources; in gpmi_dump_info()
196 struct bch_geometry *geo = &this->bch_geometry; in gpmi_dump_info()
200 dev_err(this->dev, "Show GPMI registers :\n"); in gpmi_dump_info()
202 reg = readl(r->gpmi_regs + i * 0x10); in gpmi_dump_info()
203 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
207 dev_err(this->dev, "Show BCH registers :\n"); in gpmi_dump_info()
209 reg = readl(r->bch_regs + i * 0x10); in gpmi_dump_info()
210 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
212 dev_err(this->dev, "BCH Geometry :\n" in gpmi_dump_info()
224 geo->gf_len, in gpmi_dump_info()
225 geo->ecc_strength, in gpmi_dump_info()
226 geo->page_size, in gpmi_dump_info()
227 geo->metadata_size, in gpmi_dump_info()
228 geo->ecc_chunk_size, in gpmi_dump_info()
229 geo->ecc_chunk_count, in gpmi_dump_info()
230 geo->payload_size, in gpmi_dump_info()
231 geo->auxiliary_size, in gpmi_dump_info()
232 geo->auxiliary_status_offset, in gpmi_dump_info()
233 geo->block_mark_byte_offset, in gpmi_dump_info()
234 geo->block_mark_bit_offset); in gpmi_dump_info()
239 struct bch_geometry *geo = &this->bch_geometry; in gpmi_check_ecc()
244 if (geo->gf_len == 14) in gpmi_check_ecc()
247 return geo->ecc_strength <= this->devdata->bch_max_ecc_strength; in gpmi_check_ecc()
260 struct bch_geometry *geo = &this->bch_geometry; in set_geometry_by_ecc_info()
261 struct nand_chip *chip = &this->nand; in set_geometry_by_ecc_info()
267 geo->gf_len = 13; in set_geometry_by_ecc_info()
270 geo->gf_len = 14; in set_geometry_by_ecc_info()
273 dev_err(this->dev, in set_geometry_by_ecc_info()
275 nanddev_get_ecc_requirements(&chip->base)->strength, in set_geometry_by_ecc_info()
276 nanddev_get_ecc_requirements(&chip->base)->step_size); in set_geometry_by_ecc_info()
277 return -EINVAL; in set_geometry_by_ecc_info()
279 geo->ecc_chunk_size = ecc_step; in set_geometry_by_ecc_info()
280 geo->ecc_strength = round_up(ecc_strength, 2); in set_geometry_by_ecc_info()
282 return -EINVAL; in set_geometry_by_ecc_info()
285 if (geo->ecc_chunk_size < mtd->oobsize) { in set_geometry_by_ecc_info()
286 dev_err(this->dev, in set_geometry_by_ecc_info()
288 ecc_step, mtd->oobsize); in set_geometry_by_ecc_info()
289 return -EINVAL; in set_geometry_by_ecc_info()
293 geo->metadata_size = 10; in set_geometry_by_ecc_info()
295 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; in set_geometry_by_ecc_info()
301 * |<----------------------------------------------------->| in set_geometry_by_ecc_info()
305 * |<-------------------------------------------->| D | | O' | in set_geometry_by_ecc_info()
306 * | |<---->| |<--->| in set_geometry_by_ecc_info()
308 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
310 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
313 * |<------------>| in set_geometry_by_ecc_info()
329 * P = ------------ + P' + M in set_geometry_by_ecc_info()
332 * The position of block mark moves forward in the ECC-based view in set_geometry_by_ecc_info()
335 * E * G * (N - 1) in set_geometry_by_ecc_info()
336 * D = (---------------- + M) in set_geometry_by_ecc_info()
341 * So the bit position of the physical block mark within the ECC-based in set_geometry_by_ecc_info()
343 * (P' - D) * 8 in set_geometry_by_ecc_info()
345 geo->page_size = mtd->writesize + geo->metadata_size + in set_geometry_by_ecc_info()
346 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in set_geometry_by_ecc_info()
348 geo->payload_size = mtd->writesize; in set_geometry_by_ecc_info()
350 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); in set_geometry_by_ecc_info()
351 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) in set_geometry_by_ecc_info()
352 + ALIGN(geo->ecc_chunk_count, 4); in set_geometry_by_ecc_info()
354 if (!this->swap_block_mark) in set_geometry_by_ecc_info()
358 block_mark_bit_offset = mtd->writesize * 8 - in set_geometry_by_ecc_info()
359 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in set_geometry_by_ecc_info()
360 + geo->metadata_size * 8); in set_geometry_by_ecc_info()
362 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in set_geometry_by_ecc_info()
363 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in set_geometry_by_ecc_info()
377 * ------------ <= (O - M)
381 * (O - M) * 8
382 * E <= -------------
387 struct bch_geometry *geo = &this->bch_geometry; in get_ecc_strength()
388 struct mtd_info *mtd = nand_to_mtd(&this->nand); in get_ecc_strength()
391 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) in get_ecc_strength()
392 / (geo->gf_len * geo->ecc_chunk_count); in get_ecc_strength()
400 struct bch_geometry *geo = &this->bch_geometry; in legacy_set_geometry()
401 struct mtd_info *mtd = nand_to_mtd(&this->nand); in legacy_set_geometry()
411 geo->metadata_size = 10; in legacy_set_geometry()
414 geo->gf_len = 13; in legacy_set_geometry()
417 geo->ecc_chunk_size = 512; in legacy_set_geometry()
418 while (geo->ecc_chunk_size < mtd->oobsize) { in legacy_set_geometry()
419 geo->ecc_chunk_size *= 2; /* keep C >= O */ in legacy_set_geometry()
420 geo->gf_len = 14; in legacy_set_geometry()
423 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; in legacy_set_geometry()
426 geo->ecc_strength = get_ecc_strength(this); in legacy_set_geometry()
428 dev_err(this->dev, in legacy_set_geometry()
431 geo->ecc_strength, in legacy_set_geometry()
432 this->devdata->bch_max_ecc_strength); in legacy_set_geometry()
433 return -EINVAL; in legacy_set_geometry()
436 geo->page_size = mtd->writesize + geo->metadata_size + in legacy_set_geometry()
437 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in legacy_set_geometry()
438 geo->payload_size = mtd->writesize; in legacy_set_geometry()
442 * metadata is padded to the nearest 32-bit boundary. The ECC status in legacy_set_geometry()
444 * nearest 32-bit boundary. in legacy_set_geometry()
446 metadata_size = ALIGN(geo->metadata_size, 4); in legacy_set_geometry()
447 status_size = ALIGN(geo->ecc_chunk_count, 4); in legacy_set_geometry()
449 geo->auxiliary_size = metadata_size + status_size; in legacy_set_geometry()
450 geo->auxiliary_status_offset = metadata_size; in legacy_set_geometry()
452 if (!this->swap_block_mark) in legacy_set_geometry()
457 * the physical block mark within the ECC-based view of the page. in legacy_set_geometry()
463 * |<---->| in legacy_set_geometry()
465 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
467 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
469 * The position of block mark moves forward in the ECC-based view in legacy_set_geometry()
472 * E * G * (N - 1) in legacy_set_geometry()
473 * D = (---------------- + M) in legacy_set_geometry()
481 * E * G (O - M) C - M C - M in legacy_set_geometry()
482 * ----------- <= ------- <= -------- < --------- in legacy_set_geometry()
483 * 8 N N (N - 1) in legacy_set_geometry()
487 * E * G * (N - 1) in legacy_set_geometry()
488 * D = (---------------- + M) < C in legacy_set_geometry()
492 * within the ECC-based view of the page is still in the data chunk, in legacy_set_geometry()
496 * physical block mark within the ECC-based view of the page: in legacy_set_geometry()
497 * (page_size - D) * 8 in legacy_set_geometry()
499 * --Huang Shijie in legacy_set_geometry()
501 block_mark_bit_offset = mtd->writesize * 8 - in legacy_set_geometry()
502 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in legacy_set_geometry()
503 + geo->metadata_size * 8); in legacy_set_geometry()
505 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in legacy_set_geometry()
506 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in legacy_set_geometry()
512 struct nand_chip *chip = &this->nand; in common_nfc_set_geometry()
514 nanddev_get_ecc_requirements(&chip->base); in common_nfc_set_geometry()
516 if (chip->ecc.strength > 0 && chip->ecc.size > 0) in common_nfc_set_geometry()
517 return set_geometry_by_ecc_info(this, chip->ecc.strength, in common_nfc_set_geometry()
518 chip->ecc.size); in common_nfc_set_geometry()
520 if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) in common_nfc_set_geometry()
522 if (!(requirements->strength > 0 && requirements->step_size > 0)) in common_nfc_set_geometry()
523 return -EINVAL; in common_nfc_set_geometry()
526 requirements->strength, in common_nfc_set_geometry()
527 requirements->step_size); in common_nfc_set_geometry()
536 struct resources *r = &this->resources; in bch_set_geometry()
543 ret = pm_runtime_get_sync(this->dev); in bch_set_geometry()
545 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
554 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in bch_set_geometry()
559 writel(0, r->bch_regs + HW_BCH_LAYOUTSELECT); in bch_set_geometry()
563 pm_runtime_mark_last_busy(this->dev); in bch_set_geometry()
564 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
570 * <1> Firstly, we should know what's the GPMI-clock means.
571 * The GPMI-clock is the internal clock in the gpmi nand controller.
572 * If you set 100MHz to gpmi nand controller, the GPMI-clock's period
573 * is 10ns. Mark the GPMI-clock's period as GPMI-clock-period.
576 * The frequency on the nand chip pins is derived from the GPMI-clock.
591 * read data is valid for some time after read strobe.
595 * |<---tREA---->|
598 * |<--tRP-->| |
603 * /---------\
604 * Read Data --------------< >---------
605 * \---------/
607 * |<-D->|
617 * Delay = (tREA + C - tRP) {1}
619 * tREA : the maximum read access time.
622 * tRP = (GPMI-clock-period) * DATA_SETUP
628 * if (GPMI-clock-period > DLL_THRETHOLD)
629 * RP = GPMI-clock-period / 2;
631 * RP = GPMI-clock-period;
633 * Set the HW_GPMI_CTRL1:HALF_PERIOD if GPMI-clock-period
639 * (tREA + 4000 - tRP) * 8
640 * RDN_DELAY = ----------------------- {3}
646 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_compute_timings() local
647 unsigned int dll_threshold_ps = this->devdata->max_chain_delay; in gpmi_nfc_compute_timings()
656 if (sdr->tRC_min >= 30000) { in gpmi_nfc_compute_timings()
657 /* ONFI non-EDO modes [0-3] */ in gpmi_nfc_compute_timings()
658 hw->clk_rate = 22000000; in gpmi_nfc_compute_timings()
660 } else if (sdr->tRC_min >= 25000) { in gpmi_nfc_compute_timings()
662 hw->clk_rate = 80000000; in gpmi_nfc_compute_timings()
666 hw->clk_rate = 100000000; in gpmi_nfc_compute_timings()
671 period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); in gpmi_nfc_compute_timings()
673 addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps); in gpmi_nfc_compute_timings()
674 data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps); in gpmi_nfc_compute_timings()
675 data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps); in gpmi_nfc_compute_timings()
676 busy_timeout_cycles = TO_CYCLES(sdr->tWB_max + sdr->tR_max, period_ps); in gpmi_nfc_compute_timings()
678 hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) | in gpmi_nfc_compute_timings()
681 hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(busy_timeout_cycles * 4096); in gpmi_nfc_compute_timings()
686 * (tREA + 4000 - tRP) * 8 in gpmi_nfc_compute_timings()
687 * RDN_DELAY = ----------------------- in gpmi_nfc_compute_timings()
699 sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8; in gpmi_nfc_compute_timings()
705 hw->ctrl1n = BF_GPMI_CTRL1_WRN_DLY_SEL(wrn_dly_sel); in gpmi_nfc_compute_timings()
707 hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | in gpmi_nfc_compute_timings()
714 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_apply_timings() local
715 struct resources *r = &this->resources; in gpmi_nfc_apply_timings()
716 void __iomem *gpmi_regs = r->gpmi_regs; in gpmi_nfc_apply_timings()
719 clk_set_rate(r->clock[0], hw->clk_rate); in gpmi_nfc_apply_timings()
721 writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0); in gpmi_nfc_apply_timings()
722 writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1); in gpmi_nfc_apply_timings()
729 writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_nfc_apply_timings()
732 dll_wait_time_us = USEC_PER_SEC / hw->clk_rate * 64; in gpmi_nfc_apply_timings()
736 /* Wait for the DLL to settle. */ in gpmi_nfc_apply_timings()
752 if (sdr->tRC_min <= 25000 && !GPMI_IS_MX6(this)) in gpmi_setup_interface()
753 return -ENOTSUPP; in gpmi_setup_interface()
762 this->hw.must_apply_timings = true; in gpmi_setup_interface()
770 struct resources *r = &this->resources; in gpmi_clear_bch()
771 writel(BM_BCH_CTRL_COMPLETE_IRQ, r->bch_regs + HW_BCH_CTRL_CLR); in gpmi_clear_bch()
777 return this->dma_chans[0]; in get_dma_chan()
784 struct completion *dma_c = &this->dma_done; in dma_irq_callback()
794 complete(&this->bch_done); in bch_irq()
804 if (this->bch) in gpmi_raw_len_to_len()
805 return ALIGN_DOWN(raw_len, this->bch_geometry.ecc_chunk_size); in gpmi_raw_len_to_len()
821 ret = dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
830 sg_init_one(sgl, this->data_buffer_dma, len); in prepare_data_dma()
832 if (dr == DMA_TO_DEVICE && buf != this->data_buffer_dma) in prepare_data_dma()
833 memcpy(this->data_buffer_dma, buf, len); in prepare_data_dma()
835 dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
858 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_ecc()
861 return -ERANGE; in gpmi_ooblayout_ecc()
863 oobregion->offset = 0; in gpmi_ooblayout_ecc()
864 oobregion->length = geo->page_size - mtd->writesize; in gpmi_ooblayout_ecc()
874 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_free()
877 return -ERANGE; in gpmi_ooblayout_free()
880 if (geo->page_size < mtd->writesize + mtd->oobsize) { in gpmi_ooblayout_free()
881 oobregion->offset = geo->page_size - mtd->writesize; in gpmi_ooblayout_free()
882 oobregion->length = mtd->oobsize - oobregion->offset; in gpmi_ooblayout_free()
948 struct platform_device *pdev = this->pdev; in acquire_register_block()
949 struct resources *res = &this->resources; in acquire_register_block()
954 p = devm_ioremap_resource(&pdev->dev, r); in acquire_register_block()
959 res->gpmi_regs = p; in acquire_register_block()
961 res->bch_regs = p; in acquire_register_block()
963 dev_err(this->dev, "unknown resource name : %s\n", res_name); in acquire_register_block()
970 struct platform_device *pdev = this->pdev; in acquire_bch_irq()
977 dev_err(this->dev, "Can't get resource for %s\n", res_name); in acquire_bch_irq()
978 return -ENODEV; in acquire_bch_irq()
981 err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this); in acquire_bch_irq()
983 dev_err(this->dev, "error requesting BCH IRQ\n"); in acquire_bch_irq()
992 if (this->dma_chans[i]) { in release_dma_channels()
993 dma_release_channel(this->dma_chans[i]); in release_dma_channels()
994 this->dma_chans[i] = NULL; in release_dma_channels()
1000 struct platform_device *pdev = this->pdev; in acquire_dma_channels()
1005 dma_chan = dma_request_chan(&pdev->dev, "rx-tx"); in acquire_dma_channels()
1007 ret = dev_err_probe(this->dev, PTR_ERR(dma_chan), in acquire_dma_channels()
1011 this->dma_chans[0] = dma_chan; in acquire_dma_channels()
1019 struct resources *r = &this->resources; in gpmi_get_clks()
1023 for (i = 0; i < this->devdata->clks_count; i++) { in gpmi_get_clks()
1024 clk = devm_clk_get(this->dev, this->devdata->clks[i]); in gpmi_get_clks()
1030 r->clock[i] = clk; in gpmi_get_clks()
1040 clk_set_rate(r->clock[0], 22000000); in gpmi_get_clks()
1045 dev_dbg(this->dev, "failed in finding the clocks.\n"); in gpmi_get_clks()
1087 struct device *dev = this->dev; in gpmi_free_dma_buffer()
1088 struct bch_geometry *geo = &this->bch_geometry; in gpmi_free_dma_buffer()
1090 if (this->auxiliary_virt && virt_addr_valid(this->auxiliary_virt)) in gpmi_free_dma_buffer()
1091 dma_free_coherent(dev, geo->auxiliary_size, in gpmi_free_dma_buffer()
1092 this->auxiliary_virt, in gpmi_free_dma_buffer()
1093 this->auxiliary_phys); in gpmi_free_dma_buffer()
1094 kfree(this->data_buffer_dma); in gpmi_free_dma_buffer()
1095 kfree(this->raw_buffer); in gpmi_free_dma_buffer()
1097 this->data_buffer_dma = NULL; in gpmi_free_dma_buffer()
1098 this->raw_buffer = NULL; in gpmi_free_dma_buffer()
1104 struct bch_geometry *geo = &this->bch_geometry; in gpmi_alloc_dma_buffer()
1105 struct device *dev = this->dev; in gpmi_alloc_dma_buffer()
1106 struct mtd_info *mtd = nand_to_mtd(&this->nand); in gpmi_alloc_dma_buffer()
1116 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE, in gpmi_alloc_dma_buffer()
1118 if (this->data_buffer_dma == NULL) in gpmi_alloc_dma_buffer()
1121 this->auxiliary_virt = dma_alloc_coherent(dev, geo->auxiliary_size, in gpmi_alloc_dma_buffer()
1122 &this->auxiliary_phys, GFP_DMA); in gpmi_alloc_dma_buffer()
1123 if (!this->auxiliary_virt) in gpmi_alloc_dma_buffer()
1126 this->raw_buffer = kzalloc((mtd->writesize ?: PAGE_SIZE) + mtd->oobsize, GFP_KERNEL); in gpmi_alloc_dma_buffer()
1127 if (!this->raw_buffer) in gpmi_alloc_dma_buffer()
1134 return -ENOMEM; in gpmi_alloc_dma_buffer()
1145 struct bch_geometry *nfc_geo = &this->bch_geometry; in block_mark_swapping()
1153 if (!this->swap_block_mark) in block_mark_swapping()
1160 bit = nfc_geo->block_mark_bit_offset; in block_mark_swapping()
1161 p = payload + nfc_geo->block_mark_byte_offset; in block_mark_swapping()
1170 from_data = (p[0] >> bit) | (p[1] << (8 - bit)); in block_mark_swapping()
1178 mask = (0x1 << bit) - 1; in block_mark_swapping()
1182 p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); in block_mark_swapping()
1189 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_count_bitflips()
1196 status = this->auxiliary_virt + ALIGN(meta, 4); in gpmi_count_bitflips()
1203 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_count_bitflips()
1204 u8 *eccbuf = this->raw_buffer; in gpmi_count_bitflips()
1210 offset = nfc_geo->metadata_size * 8; in gpmi_count_bitflips()
1211 offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1); in gpmi_count_bitflips()
1212 offset -= eccbits; in gpmi_count_bitflips()
1216 eccbytes -= offset; in gpmi_count_bitflips()
1222 * in-band data in the first and last byte of in gpmi_count_bitflips()
1223 * eccbuf. Set non-eccbits to one so that in gpmi_count_bitflips()
1228 eccbuf[0] |= GENMASK(bitoffset - 1, 0); in gpmi_count_bitflips()
1232 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset); in gpmi_count_bitflips()
1248 buf + i * nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1249 nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1251 this->auxiliary_virt, in gpmi_count_bitflips()
1252 nfc_geo->metadata_size, in gpmi_count_bitflips()
1253 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1256 buf + i * nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1257 nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1260 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1266 mtd->ecc_stats.corrected += flips; in gpmi_count_bitflips()
1270 mtd->ecc_stats.failed++; in gpmi_count_bitflips()
1274 mtd->ecc_stats.corrected += *status; in gpmi_count_bitflips()
1283 struct bch_geometry *geo = &this->bch_geometry; in gpmi_bch_layout_std()
1284 unsigned int ecc_strength = geo->ecc_strength >> 1; in gpmi_bch_layout_std()
1285 unsigned int gf_len = geo->gf_len; in gpmi_bch_layout_std()
1286 unsigned int block_size = geo->ecc_chunk_size; in gpmi_bch_layout_std()
1288 this->bch_flashlayout0 = in gpmi_bch_layout_std()
1289 BF_BCH_FLASH0LAYOUT0_NBLOCKS(geo->ecc_chunk_count - 1) | in gpmi_bch_layout_std()
1290 BF_BCH_FLASH0LAYOUT0_META_SIZE(geo->metadata_size) | in gpmi_bch_layout_std()
1295 this->bch_flashlayout1 = in gpmi_bch_layout_std()
1296 BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(geo->page_size) | in gpmi_bch_layout_std()
1307 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_page()
1312 this->bch = true; in gpmi_ecc_read_page()
1314 ret = nand_read_page_op(chip, page, 0, buf, geo->page_size); in gpmi_ecc_read_page()
1319 geo->ecc_chunk_count, in gpmi_ecc_read_page()
1320 geo->auxiliary_status_offset); in gpmi_ecc_read_page()
1323 block_mark_swapping(this, buf, this->auxiliary_virt); in gpmi_ecc_read_page()
1327 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() in gpmi_ecc_read_page()
1336 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_page()
1337 chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0]; in gpmi_ecc_read_page()
1348 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_subpage()
1349 int size = chip->ecc.size; /* ECC chunk size */ in gpmi_ecc_read_subpage()
1359 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1363 last = (offs + len - 1) / size; in gpmi_ecc_read_subpage()
1365 if (this->swap_block_mark) { in gpmi_ecc_read_subpage()
1373 marker_pos = geo->block_mark_byte_offset / size; in gpmi_ecc_read_subpage()
1375 dev_dbg(this->dev, in gpmi_ecc_read_subpage()
1382 meta = geo->metadata_size; in gpmi_ecc_read_subpage()
1389 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1391 n = last - first + 1; in gpmi_ecc_read_subpage()
1393 ecc_strength = geo->ecc_strength >> 1; in gpmi_ecc_read_subpage()
1395 this->bch_flashlayout0 = BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1) | in gpmi_ecc_read_subpage()
1398 BF_BCH_FLASH0LAYOUT0_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1399 BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(geo->ecc_chunk_size, this); in gpmi_ecc_read_subpage()
1401 this->bch_flashlayout1 = BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) | in gpmi_ecc_read_subpage()
1403 BF_BCH_FLASH0LAYOUT1_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1404 BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(geo->ecc_chunk_size, this); in gpmi_ecc_read_subpage()
1406 this->bch = true; in gpmi_ecc_read_subpage()
1412 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", in gpmi_ecc_read_subpage()
1425 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page()
1428 dev_dbg(this->dev, "ecc write page.\n"); in gpmi_ecc_write_page()
1431 this->bch = true; in gpmi_ecc_write_page()
1433 memcpy(this->auxiliary_virt, chip->oob_poi, nfc_geo->auxiliary_size); in gpmi_ecc_write_page()
1435 if (this->swap_block_mark) { in gpmi_ecc_write_page()
1440 memcpy(this->data_buffer_dma, buf, mtd->writesize); in gpmi_ecc_write_page()
1441 buf = this->data_buffer_dma; in gpmi_ecc_write_page()
1442 block_mark_swapping(this, this->data_buffer_dma, in gpmi_ecc_write_page()
1443 this->auxiliary_virt); in gpmi_ecc_write_page()
1446 ret = nand_prog_page_op(chip, page, 0, buf, nfc_geo->page_size); in gpmi_ecc_write_page()
1465 * 3) ECC-based read operations return an OOB full of set bits (since we never
1466 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1477 * 1) Are we doing a "raw" read, or an ECC-based read?
1483 * | Raw | ECC-based |
1484 * -------------+-------------------------+-------------------------+
1490 * -------------+-------------------------+ return it in a buffer |
1498 * -------------+-------------------------+-------------------------+
1505 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1508 * ECC-based or raw view of the page is implicit in which function it calls
1509 * (there is a similar pair of ECC-based/raw functions for writing).
1518 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_oob()
1521 ret = nand_read_page_op(chip, page, mtd->writesize, chip->oob_poi, in gpmi_ecc_read_oob()
1522 mtd->oobsize); in gpmi_ecc_read_oob()
1528 * non-transcribing case (!GPMI_IS_MX23()), we already have it. in gpmi_ecc_read_oob()
1533 ret = nand_read_page_op(chip, page, 0, chip->oob_poi, 1); in gpmi_ecc_read_oob()
1549 return -EPERM; in gpmi_ecc_write_oob()
1552 return -EPERM; in gpmi_ecc_write_oob()
1554 return nand_prog_page_op(chip, page, mtd->writesize + of.offset, in gpmi_ecc_write_oob()
1555 chip->oob_poi + of.offset, of.length); in gpmi_ecc_write_oob()
1559 * This function reads a NAND page without involving the ECC engine (no HW
1575 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_read_page_raw()
1576 int eccsize = nfc_geo->ecc_chunk_size; in gpmi_ecc_read_page_raw()
1577 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_read_page_raw()
1578 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_read_page_raw()
1582 uint8_t *oob = chip->oob_poi; in gpmi_ecc_read_page_raw()
1587 mtd->writesize + mtd->oobsize); in gpmi_ecc_read_page_raw()
1598 if (this->swap_block_mark) in gpmi_ecc_read_page_raw()
1599 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_read_page_raw()
1606 memcpy(oob, tmp_buf, nfc_geo->metadata_size); in gpmi_ecc_read_page_raw()
1608 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_read_page_raw()
1612 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_read_page_raw()
1619 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_read_page_raw()
1621 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_read_page_raw()
1634 if (oob_byte_off < mtd->oobsize) in gpmi_ecc_read_page_raw()
1636 tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_read_page_raw()
1637 mtd->oobsize - oob_byte_off); in gpmi_ecc_read_page_raw()
1644 * This function writes a NAND page without involving the ECC engine (no HW
1660 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page_raw()
1661 int eccsize = nfc_geo->ecc_chunk_size; in gpmi_ecc_write_page_raw()
1662 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_write_page_raw()
1663 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_write_page_raw()
1664 uint8_t *oob = chip->oob_poi; in gpmi_ecc_write_page_raw()
1676 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1682 memcpy(tmp_buf, oob, nfc_geo->metadata_size); in gpmi_ecc_write_page_raw()
1683 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_write_page_raw()
1687 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_write_page_raw()
1694 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_write_page_raw()
1696 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_write_page_raw()
1708 if (oob_required && oob_byte_off < mtd->oobsize) in gpmi_ecc_write_page_raw()
1709 memcpy(tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_write_page_raw()
1710 oob + oob_byte_off, mtd->oobsize - oob_byte_off); in gpmi_ecc_write_page_raw()
1719 if (this->swap_block_mark) in gpmi_ecc_write_page_raw()
1720 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_write_page_raw()
1723 mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1744 chipnr = (int)(ofs >> chip->chip_shift); in gpmi_block_markbad()
1747 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0; in gpmi_block_markbad()
1750 block_mark = this->data_buffer_dma; in gpmi_block_markbad()
1754 page = (int)(ofs >> chip->page_shift); in gpmi_block_markbad()
1765 struct boot_rom_geometry *geometry = &this->rom_geometry; in nand_boot_set_geometry()
1775 geometry->stride_size_in_pages = 64; in nand_boot_set_geometry()
1785 geometry->search_area_stride_exponent = 2; in nand_boot_set_geometry()
1792 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_check_transcription_stamp()
1793 struct device *dev = this->dev; in mx23_check_transcription_stamp()
1794 struct nand_chip *chip = &this->nand; in mx23_check_transcription_stamp()
1803 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_check_transcription_stamp()
1814 page = stride * rom_geo->stride_size_in_pages; in mx23_check_transcription_stamp()
1847 struct device *dev = this->dev; in mx23_write_transcription_stamp()
1848 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_write_transcription_stamp()
1849 struct nand_chip *chip = &this->nand; in mx23_write_transcription_stamp()
1862 block_size_in_pages = mtd->erasesize / mtd->writesize; in mx23_write_transcription_stamp()
1863 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_write_transcription_stamp()
1865 rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
1867 (search_area_size_in_pages + (block_size_in_pages - 1)) / in mx23_write_transcription_stamp()
1889 memset(buffer, ~0, mtd->writesize); in mx23_write_transcription_stamp()
1896 page = stride * rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
1901 status = chip->ecc.write_page_raw(chip, buffer, 0, page); in mx23_write_transcription_stamp()
1913 struct device *dev = this->dev; in mx23_boot_init()
1914 struct nand_chip *chip = &this->nand; in mx23_boot_init()
1928 * anything -- the block marks are already transcribed. in mx23_boot_init()
1940 block_count = nanddev_eraseblocks_per_target(&chip->base); in mx23_boot_init()
1951 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); in mx23_boot_init()
1952 page = block << (chip->phys_erase_shift - chip->page_shift); in mx23_boot_init()
1953 byte = block << chip->phys_erase_shift; in mx23_boot_init()
1957 ret = nand_read_page_op(chip, page, mtd->writesize, &block_mark, in mx23_boot_init()
1966 * again, but this time the result will be a mark in the in mx23_boot_init()
1971 ret = chip->legacy.block_markbad(chip, byte); in mx23_boot_init()
1988 /* This is ROM arch-specific initilization before the BBT scanning. */ in nand_boot_init()
2004 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret); in gpmi_set_geometry()
2014 struct nand_chip *chip = &this->nand; in gpmi_init_last()
2016 struct nand_ecc_ctrl *ecc = &chip->ecc; in gpmi_init_last()
2017 struct bch_geometry *bch_geo = &this->bch_geometry; in gpmi_init_last()
2026 ecc->read_page = gpmi_ecc_read_page; in gpmi_init_last()
2027 ecc->write_page = gpmi_ecc_write_page; in gpmi_init_last()
2028 ecc->read_oob = gpmi_ecc_read_oob; in gpmi_init_last()
2029 ecc->write_oob = gpmi_ecc_write_oob; in gpmi_init_last()
2030 ecc->read_page_raw = gpmi_ecc_read_page_raw; in gpmi_init_last()
2031 ecc->write_page_raw = gpmi_ecc_write_page_raw; in gpmi_init_last()
2032 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; in gpmi_init_last()
2033 ecc->write_oob_raw = gpmi_ecc_write_oob_raw; in gpmi_init_last()
2034 ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in gpmi_init_last()
2035 ecc->size = bch_geo->ecc_chunk_size; in gpmi_init_last()
2036 ecc->strength = bch_geo->ecc_strength; in gpmi_init_last()
2045 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { in gpmi_init_last()
2046 ecc->read_subpage = gpmi_ecc_read_subpage; in gpmi_init_last()
2047 chip->options |= NAND_SUBPAGE_READ; in gpmi_init_last()
2058 if (chip->bbt_options & NAND_BBT_USE_FLASH) { in gpmi_nand_attach_chip()
2059 chip->bbt_options |= NAND_BBT_NO_OOB; in gpmi_nand_attach_chip()
2061 if (of_property_read_bool(this->dev->of_node, in gpmi_nand_attach_chip()
2062 "fsl,no-blockmark-swap")) in gpmi_nand_attach_chip()
2063 this->swap_block_mark = false; in gpmi_nand_attach_chip()
2065 dev_dbg(this->dev, "Blockmark swapping %sabled\n", in gpmi_nand_attach_chip()
2066 this->swap_block_mark ? "en" : "dis"); in gpmi_nand_attach_chip()
2072 chip->options |= NAND_SKIP_BBTSCAN; in gpmi_nand_attach_chip()
2079 struct gpmi_transfer *transfer = &this->transfers[this->ntransfers]; in get_next_transfer()
2081 this->ntransfers++; in get_next_transfer()
2083 if (this->ntransfers == GPMI_MAX_TRANSFERS) in get_next_transfer()
2095 int chip = this->nand.cur_cs; in gpmi_chain_command()
2117 transfer->cmdbuf[0] = cmd; in gpmi_chain_command()
2119 memcpy(&transfer->cmdbuf[1], addr, naddr); in gpmi_chain_command()
2121 sg_init_one(&transfer->sgl, transfer->cmdbuf, naddr + 1); in gpmi_chain_command()
2122 dma_map_sg(this->dev, &transfer->sgl, 1, DMA_TO_DEVICE); in gpmi_chain_command()
2124 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_command()
2126 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, DMA_MEM_TO_DEV, in gpmi_chain_command()
2139 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_wait_ready()
2161 transfer->direction = DMA_FROM_DEVICE; in gpmi_chain_data_read()
2163 *direct = prepare_data_dma(this, buf, raw_len, &transfer->sgl, in gpmi_chain_data_read()
2168 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_read()
2173 if (this->bch) { in gpmi_chain_data_read()
2179 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_read()
2180 pio[5] = this->auxiliary_phys; in gpmi_chain_data_read()
2188 if (!this->bch) in gpmi_chain_data_read()
2189 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_read()
2208 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_data_write()
2210 prepare_data_dma(this, buf, raw_len, &transfer->sgl, DMA_TO_DEVICE); in gpmi_chain_data_write()
2214 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_write()
2219 if (this->bch) { in gpmi_chain_data_write()
2225 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_write()
2226 pio[5] = this->auxiliary_phys; in gpmi_chain_data_write()
2231 (this->bch ? MXS_DMA_CTRL_WAIT4END : 0)); in gpmi_chain_data_write()
2235 if (!this->bch) in gpmi_chain_data_write()
2236 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_write()
2261 this->ntransfers = 0; in gpmi_nfc_exec_op()
2263 this->transfers[i].direction = DMA_NONE; in gpmi_nfc_exec_op()
2265 ret = pm_runtime_get_sync(this->dev); in gpmi_nfc_exec_op()
2272 * controller side, they will not change anymore. When the time will in gpmi_nfc_exec_op()
2275 if (this->hw.must_apply_timings) { in gpmi_nfc_exec_op()
2276 this->hw.must_apply_timings = false; in gpmi_nfc_exec_op()
2280 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs); in gpmi_nfc_exec_op()
2282 for (i = 0; i < op->ninstrs; i++) { in gpmi_nfc_exec_op()
2283 instr = &op->instrs[i]; in gpmi_nfc_exec_op()
2287 switch (instr->type) { in gpmi_nfc_exec_op()
2292 cmd = instr->ctx.cmd.opcode; in gpmi_nfc_exec_op()
2298 if (i + 1 != op->ninstrs && in gpmi_nfc_exec_op()
2299 op->instrs[i + 1].type == NAND_OP_ADDR_INSTR) in gpmi_nfc_exec_op()
2306 desc = gpmi_chain_command(this, cmd, instr->ctx.addr.addrs, in gpmi_nfc_exec_op()
2307 instr->ctx.addr.naddrs); in gpmi_nfc_exec_op()
2310 buf_write = instr->ctx.data.buf.out; in gpmi_nfc_exec_op()
2311 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2318 if (!instr->ctx.data.len) in gpmi_nfc_exec_op()
2320 buf_read = instr->ctx.data.buf.in; in gpmi_nfc_exec_op()
2321 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2330 ret = -ENXIO; in gpmi_nfc_exec_op()
2335 dev_dbg(this->dev, "%s setup done\n", __func__); in gpmi_nfc_exec_op()
2338 dev_err(this->dev, "Multiple data instructions not supported\n"); in gpmi_nfc_exec_op()
2339 ret = -EINVAL; in gpmi_nfc_exec_op()
2343 if (this->bch) { in gpmi_nfc_exec_op()
2344 writel(this->bch_flashlayout0, in gpmi_nfc_exec_op()
2345 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT0); in gpmi_nfc_exec_op()
2346 writel(this->bch_flashlayout1, in gpmi_nfc_exec_op()
2347 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT1); in gpmi_nfc_exec_op()
2350 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2352 this->resources.bch_regs + HW_BCH_CTRL_SET); in gpmi_nfc_exec_op()
2353 completion = &this->bch_done; in gpmi_nfc_exec_op()
2355 desc->callback = dma_irq_callback; in gpmi_nfc_exec_op()
2356 desc->callback_param = this; in gpmi_nfc_exec_op()
2357 completion = &this->dma_done; in gpmi_nfc_exec_op()
2367 dev_err(this->dev, "DMA timeout, last DMA\n"); in gpmi_nfc_exec_op()
2369 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2374 this->resources.bch_regs + HW_BCH_CTRL_CLR); in gpmi_nfc_exec_op()
2380 for (i = 0; i < this->ntransfers; i++) { in gpmi_nfc_exec_op()
2381 struct gpmi_transfer *transfer = &this->transfers[i]; in gpmi_nfc_exec_op()
2383 if (transfer->direction != DMA_NONE) in gpmi_nfc_exec_op()
2384 dma_unmap_sg(this->dev, &transfer->sgl, 1, in gpmi_nfc_exec_op()
2385 transfer->direction); in gpmi_nfc_exec_op()
2389 memcpy(buf_read, this->data_buffer_dma, in gpmi_nfc_exec_op()
2392 this->bch = false; in gpmi_nfc_exec_op()
2394 pm_runtime_mark_last_busy(this->dev); in gpmi_nfc_exec_op()
2395 pm_runtime_put_autosuspend(this->dev); in gpmi_nfc_exec_op()
2408 struct nand_chip *chip = &this->nand; in gpmi_nand_init()
2413 mtd->name = "gpmi-nand"; in gpmi_nand_init()
2414 mtd->dev.parent = this->dev; in gpmi_nand_init()
2416 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ in gpmi_nand_init()
2418 nand_set_flash_node(chip, this->pdev->dev.of_node); in gpmi_nand_init()
2419 chip->legacy.block_markbad = gpmi_block_markbad; in gpmi_nand_init()
2420 chip->badblock_pattern = &gpmi_bbt_descr; in gpmi_nand_init()
2421 chip->options |= NAND_NO_SUBPAGE_WRITE; in gpmi_nand_init()
2424 this->swap_block_mark = !GPMI_IS_MX23(this); in gpmi_nand_init()
2430 this->bch_geometry.payload_size = 1024; in gpmi_nand_init()
2431 this->bch_geometry.auxiliary_size = 128; in gpmi_nand_init()
2436 nand_controller_init(&this->base); in gpmi_nand_init()
2437 this->base.ops = &gpmi_nand_controller_ops; in gpmi_nand_init()
2438 chip->controller = &this->base; in gpmi_nand_init()
2465 .compatible = "fsl,imx23-gpmi-nand",
2468 .compatible = "fsl,imx28-gpmi-nand",
2471 .compatible = "fsl,imx6q-gpmi-nand",
2474 .compatible = "fsl,imx6sx-gpmi-nand",
2477 .compatible = "fsl,imx7d-gpmi-nand",
2489 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); in gpmi_nand_probe()
2491 return -ENOMEM; in gpmi_nand_probe()
2493 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev); in gpmi_nand_probe()
2495 this->devdata = of_id->data; in gpmi_nand_probe()
2497 dev_err(&pdev->dev, "Failed to find the right device id.\n"); in gpmi_nand_probe()
2498 return -ENODEV; in gpmi_nand_probe()
2502 this->pdev = pdev; in gpmi_nand_probe()
2503 this->dev = &pdev->dev; in gpmi_nand_probe()
2513 pm_runtime_set_autosuspend_delay(&pdev->dev, 500); in gpmi_nand_probe()
2514 pm_runtime_use_autosuspend(&pdev->dev); in gpmi_nand_probe()
2515 pm_runtime_set_active(&pdev->dev); in gpmi_nand_probe()
2516 pm_runtime_enable(&pdev->dev); in gpmi_nand_probe()
2517 pm_runtime_get_sync(&pdev->dev); in gpmi_nand_probe()
2527 pm_runtime_mark_last_busy(&pdev->dev); in gpmi_nand_probe()
2528 pm_runtime_put_autosuspend(&pdev->dev); in gpmi_nand_probe()
2530 dev_info(this->dev, "driver registered.\n"); in gpmi_nand_probe()
2535 pm_runtime_put(&pdev->dev); in gpmi_nand_probe()
2536 pm_runtime_disable(&pdev->dev); in gpmi_nand_probe()
2546 struct nand_chip *chip = &this->nand; in gpmi_nand_remove()
2549 pm_runtime_put_sync(&pdev->dev); in gpmi_nand_remove()
2550 pm_runtime_disable(&pdev->dev); in gpmi_nand_remove()
2578 /* re-init the GPMI registers */ in gpmi_pm_resume()
2581 dev_err(this->dev, "Error setting GPMI : %d\n", ret); in gpmi_pm_resume()
2586 if (this->hw.clk_rate) in gpmi_pm_resume()
2587 this->hw.must_apply_timings = true; in gpmi_pm_resume()
2589 /* re-init the BCH registers */ in gpmi_pm_resume()
2592 dev_err(this->dev, "Error setting BCH : %d\n", ret); in gpmi_pm_resume()
2621 .name = "gpmi-nand",