Lines Matching defs:brcmnand_controller
210 struct brcmnand_controller { struct
211 struct device *dev;
212 struct nand_controller controller;
213 void __iomem *nand_base;
214 void __iomem *nand_fc; /* flash cache */
215 void __iomem *flash_dma_base;
216 unsigned int irq;
217 unsigned int dma_irq;
218 int nand_version;
221 struct brcmnand_soc *soc;
224 struct clk *clk;
226 int cmd_pending;
227 bool dma_pending;
228 bool edu_pending;
229 struct completion done;
230 struct completion dma_done;
231 struct completion edu_done;
234 struct list_head host_list;
237 const u16 *edu_offsets;
238 void __iomem *edu_base;
239 int edu_irq;
240 int edu_count;
241 u64 edu_dram_addr;
242 u32 edu_ext_addr;
243 u32 edu_cmd;
244 u32 edu_config;
247 const u16 *flash_dma_offsets;
248 struct brcm_nand_dma_desc *dma_desc;
249 dma_addr_t dma_pa;
251 int (*dma_trans)(struct brcmnand_host *host, u64 addr, u32 *buf,
255 u8 flash_cache[FC_BYTES];
258 const u16 *reg_offsets;
259 unsigned int reg_spacing; /* between CS1, CS2, ... regs */
260 const u8 *cs_offsets; /* within each chip-select */
261 const u8 *cs0_offsets; /* within CS0, if different */
262 unsigned int max_block_size;
263 const unsigned int *block_sizes;
264 unsigned int max_page_size;
265 const unsigned int *page_sizes;
266 unsigned int page_size_shift;
267 unsigned int max_oob;
268 u32 features;
271 u32 nand_cs_nand_select;
272 u32 nand_cs_nand_xor;
273 u32 corr_stat_threshold;
274 u32 flash_dma_mode;
275 u32 flash_edu_mode;
276 bool pio_poll_mode;