13  *   Derived from drivers/mtd/nand/autcpu12.c (removed in v3.8)
24  *	(u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
30  *   Add Nand Flash Controller support for SAMA5 SoC
201 			  struct atmel_nand *nand);
203 	int (*setup_interface)(struct atmel_nand *nand, int csline,
205 	int (*exec_op)(struct atmel_nand *nand,
337 		dev_err(nc->base.dev, "Waiting NAND R/B Timeout\n");  in atmel_nfc_wait()
461 			"Failed to send NAND command (err = %d)!",  in atmel_nfc_exec_op()
470 static void atmel_nand_data_in(struct atmel_nand *nand, void *buf,  in atmel_nand_data_in()  argument
475 	nc = to_nand_controller(nand->base.controller);  in atmel_nand_data_in()
484 	    !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len,  in atmel_nand_data_in()
488 	if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit)  in atmel_nand_data_in()
489 		ioread16_rep(nand->activecs->io.virt, buf, len / 2);  in atmel_nand_data_in()
491 		ioread8_rep(nand->activecs->io.virt, buf, len);  in atmel_nand_data_in()
494 static void atmel_nand_data_out(struct atmel_nand *nand, const void *buf,  in atmel_nand_data_out()  argument
499 	nc = to_nand_controller(nand->base.controller);  in atmel_nand_data_out()
508 	    !atmel_nand_dma_transfer(nc, (void *)buf, nand->activecs->io.dma,  in atmel_nand_data_out()
512 	if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit)  in atmel_nand_data_out()
513 		iowrite16_rep(nand->activecs->io.virt, buf, len / 2);  in atmel_nand_data_out()
515 		iowrite8_rep(nand->activecs->io.virt, buf, len);  in atmel_nand_data_out()
518 static int atmel_nand_waitrdy(struct atmel_nand *nand, unsigned int timeout_ms)  in atmel_nand_waitrdy()  argument
520 	if (nand->activecs->rb.type == ATMEL_NAND_NO_RB)  in atmel_nand_waitrdy()
521 		return nand_soft_waitrdy(&nand->base, timeout_ms);  in atmel_nand_waitrdy()
523 	return nand_gpio_waitrdy(&nand->base, nand->activecs->rb.gpio,  in atmel_nand_waitrdy()
527 static int atmel_hsmc_nand_waitrdy(struct atmel_nand *nand,  in atmel_hsmc_nand_waitrdy()  argument
533 	if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB)  in atmel_hsmc_nand_waitrdy()
534 		return atmel_nand_waitrdy(nand, timeout_ms);  in atmel_hsmc_nand_waitrdy()
536 	nc = to_hsmc_nand_controller(nand->base.controller);  in atmel_hsmc_nand_waitrdy()
537 	mask = ATMEL_HSMC_NFC_SR_RBEDGE(nand->activecs->rb.id);  in atmel_hsmc_nand_waitrdy()
543 static void atmel_nand_select_target(struct atmel_nand *nand,  in atmel_nand_select_target()  argument
546 	nand->activecs = &nand->cs[cs];  in atmel_nand_select_target()
549 static void atmel_hsmc_nand_select_target(struct atmel_nand *nand,  in atmel_hsmc_nand_select_target()  argument
552 	struct mtd_info *mtd = nand_to_mtd(&nand->base);  in atmel_hsmc_nand_select_target()
558 	nand->activecs = &nand->cs[cs];  in atmel_hsmc_nand_select_target()
559 	nc = to_hsmc_nand_controller(nand->base.controller);  in atmel_hsmc_nand_select_target()
572 static int atmel_smc_nand_exec_instr(struct atmel_nand *nand,  in atmel_smc_nand_exec_instr()  argument
578 	nc = to_nand_controller(nand->base.controller);  in atmel_smc_nand_exec_instr()
582 		       nand->activecs->io.virt + nc->caps->cle_offs);  in atmel_smc_nand_exec_instr()
587 			       nand->activecs->io.virt + nc->caps->ale_offs);  in atmel_smc_nand_exec_instr()
590 		atmel_nand_data_in(nand, instr->ctx.data.buf.in,  in atmel_smc_nand_exec_instr()
595 		atmel_nand_data_out(nand, instr->ctx.data.buf.out,  in atmel_smc_nand_exec_instr()
600 		return atmel_nand_waitrdy(nand,  in atmel_smc_nand_exec_instr()
609 static int atmel_smc_nand_exec_op(struct atmel_nand *nand,  in atmel_smc_nand_exec_op()  argument
619 	atmel_nand_select_target(nand, op->cs);  in atmel_smc_nand_exec_op()
620 	gpiod_set_value(nand->activecs->csgpio, 0);  in atmel_smc_nand_exec_op()
622 		ret = atmel_smc_nand_exec_instr(nand, &op->instrs[i]);  in atmel_smc_nand_exec_op()
626 	gpiod_set_value(nand->activecs->csgpio, 1);  in atmel_smc_nand_exec_op()
634 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_hsmc_exec_cmd_addr()  local
640 	nc->op.cs = nand->activecs->id;  in atmel_hsmc_exec_cmd_addr()
663 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_hsmc_exec_rw()  local
666 		atmel_nand_data_in(nand, instr->ctx.data.buf.in,  in atmel_hsmc_exec_rw()
670 		atmel_nand_data_out(nand, instr->ctx.data.buf.out,  in atmel_hsmc_exec_rw()
681 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_hsmc_exec_waitrdy()  local
683 	return atmel_hsmc_nand_waitrdy(nand, instr->ctx.waitrdy.timeout_ms);  in atmel_hsmc_exec_waitrdy()
699 static int atmel_hsmc_nand_exec_op(struct atmel_nand *nand,  in atmel_hsmc_nand_exec_op()  argument
706 		return nand_op_parser_exec_op(&nand->base,  in atmel_hsmc_nand_exec_op()
709 	atmel_hsmc_nand_select_target(nand, op->cs);  in atmel_hsmc_nand_exec_op()
710 	ret = nand_op_parser_exec_op(&nand->base, &atmel_hsmc_op_parser, op,  in atmel_hsmc_nand_exec_op()
789 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_pmecc_enable()  local
798 	ret = atmel_pmecc_enable(nand->pmecc, op);  in atmel_nand_pmecc_enable()
808 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_pmecc_disable()  local
811 		atmel_pmecc_disable(nand->pmecc);  in atmel_nand_pmecc_disable()
816 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_pmecc_generate_eccbytes()  local
828 	ret = atmel_pmecc_wait_rdy(nand->pmecc);  in atmel_nand_pmecc_generate_eccbytes()
831 			"Failed to transfer NAND page data (err = %d)\n",  in atmel_nand_pmecc_generate_eccbytes()
840 		atmel_pmecc_get_generated_eccbytes(nand->pmecc, i,  in atmel_nand_pmecc_generate_eccbytes()
851 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_pmecc_correct_data()  local
863 	ret = atmel_pmecc_wait_rdy(nand->pmecc);  in atmel_nand_pmecc_correct_data()
866 			"Failed to read NAND page data (err = %d)\n",  in atmel_nand_pmecc_correct_data()
876 		ret = atmel_pmecc_correct_sector(nand->pmecc, i, databuf,  in atmel_nand_pmecc_correct_data()
878 		if (ret < 0 && !atmel_pmecc_correct_erased_chunks(nand->pmecc))  in atmel_nand_pmecc_correct_data()
902 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_pmecc_write_pg()  local
915 		atmel_pmecc_disable(nand->pmecc);  in atmel_nand_pmecc_write_pg()
984 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_hsmc_nand_pmecc_write_pg()  local
988 	atmel_hsmc_nand_select_target(nand, chip->cur_cs);  in atmel_hsmc_nand_pmecc_write_pg()
996 	nc->op.cs = nand->activecs->id;  in atmel_hsmc_nand_pmecc_write_pg()
1007 			"Failed to transfer NAND page data (err = %d)\n",  in atmel_hsmc_nand_pmecc_write_pg()
1045 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_hsmc_nand_pmecc_read_pg()  local
1049 	atmel_hsmc_nand_select_target(nand, chip->cur_cs);  in atmel_hsmc_nand_pmecc_read_pg()
1053 	 * Optimized read page accessors only work when the NAND R/B pin is  in atmel_hsmc_nand_pmecc_read_pg()
1057 	if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB)  in atmel_hsmc_nand_pmecc_read_pg()
1067 	nc->op.cs = nand->activecs->id;  in atmel_hsmc_nand_pmecc_read_pg()
1078 			"Failed to load NAND page data (err = %d)\n",  in atmel_hsmc_nand_pmecc_read_pg()
1113 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_pmecc_init()  local
1164 	nand->pmecc = atmel_pmecc_create_user(nc->pmecc, &req);  in atmel_nand_pmecc_init()
1165 	if (IS_ERR(nand->pmecc))  in atmel_nand_pmecc_init()
1166 		return PTR_ERR(nand->pmecc);  in atmel_nand_pmecc_init()
1236 static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,  in atmel_smc_nand_prepare_smcconf()  argument
1244 	nc = to_nand_controller(nand->base.controller);  in atmel_smc_nand_prepare_smcconf()
1275 	 * The write setup timing depends on the operation done on the NAND.  in atmel_smc_nand_prepare_smcconf()
1298 	 * operation done on the NAND:  in atmel_smc_nand_prepare_smcconf()
1325 	 * transfer to the NAND. The only way to guarantee that is to have the  in atmel_smc_nand_prepare_smcconf()
1337 	 * operation done on the NAND:  in atmel_smc_nand_prepare_smcconf()
1354 	 * Just take the max value in this case and hope that the NAND is more  in atmel_smc_nand_prepare_smcconf()
1395 	 * transfer from the NAND. The only way to guarantee that is to have  in atmel_smc_nand_prepare_smcconf()
1456 	if (nand->base.options & NAND_BUSWIDTH_16)  in atmel_smc_nand_prepare_smcconf()
1466 static int atmel_smc_nand_setup_interface(struct atmel_nand *nand,  in atmel_smc_nand_setup_interface()  argument
1475 	nc = to_nand_controller(nand->base.controller);  in atmel_smc_nand_setup_interface()
1477 	ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf);  in atmel_smc_nand_setup_interface()
1484 	cs = &nand->cs[csline];  in atmel_smc_nand_setup_interface()
1491 static int atmel_hsmc_nand_setup_interface(struct atmel_nand *nand,  in atmel_hsmc_nand_setup_interface()  argument
1500 	nc = to_hsmc_nand_controller(nand->base.controller);  in atmel_hsmc_nand_setup_interface()
1502 	ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf);  in atmel_hsmc_nand_setup_interface()
1509 	cs = &nand->cs[csline];  in atmel_hsmc_nand_setup_interface()
1524 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_setup_interface()  local
1527 	nc = to_nand_controller(nand->base.controller);  in atmel_nand_setup_interface()
1529 	if (csline >= nand->numcs ||  in atmel_nand_setup_interface()
1533 	return nc->caps->ops->setup_interface(nand, csline, conf);  in atmel_nand_setup_interface()
1540 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_exec_op()  local
1543 	nc = to_nand_controller(nand->base.controller);  in atmel_nand_exec_op()
1545 	return nc->caps->ops->exec_op(nand, op, check_only);  in atmel_nand_exec_op()
1549 			    struct atmel_nand *nand)  in atmel_nand_init()  argument
1551 	struct nand_chip *chip = &nand->base;  in atmel_nand_init()
1555 	nand->base.controller = &nc->base;  in atmel_nand_init()
1573 				struct atmel_nand *nand)  in atmel_smc_nand_init()  argument
1575 	struct nand_chip *chip = &nand->base;  in atmel_smc_nand_init()
1579 	atmel_nand_init(nc, nand);  in atmel_smc_nand_init()
1585 	/* Attach the CS to the NAND Flash logic. */  in atmel_smc_nand_init()
1586 	for (i = 0; i < nand->numcs; i++)  in atmel_smc_nand_init()
1589 				   BIT(nand->cs[i].id), BIT(nand->cs[i].id));  in atmel_smc_nand_init()
1598 static int atmel_nand_controller_remove_nand(struct atmel_nand *nand)  in atmel_nand_controller_remove_nand()  argument
1600 	struct nand_chip *chip = &nand->base;  in atmel_nand_controller_remove_nand()
1609 	list_del(&nand->node);  in atmel_nand_controller_remove_nand()
1618 	struct atmel_nand *nand;  in atmel_nand_create()  local
1629 	nand = devm_kzalloc(nc->dev, struct_size(nand, cs, numcs), GFP_KERNEL);  in atmel_nand_create()
1630 	if (!nand) {  in atmel_nand_create()
1631 		dev_err(nc->dev, "Failed to allocate NAND object\n");  in atmel_nand_create()
1635 	nand->numcs = numcs;  in atmel_nand_create()
1638 				     "det", GPIOD_IN, "nand-det");  in atmel_nand_create()
1647 		nand->cdgpio = gpio;  in atmel_nand_create()
1668 		nand->cs[i].id = val;  in atmel_nand_create()
1670 		nand->cs[i].io.dma = res.start;  in atmel_nand_create()
1671 		nand->cs[i].io.virt = devm_ioremap_resource(nc->dev, &res);  in atmel_nand_create()
1672 		if (IS_ERR(nand->cs[i].io.virt))  in atmel_nand_create()
1673 			return ERR_CAST(nand->cs[i].io.virt);  in atmel_nand_create()
1679 			nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;  in atmel_nand_create()
1680 			nand->cs[i].rb.id = val;  in atmel_nand_create()
1685 							   "nand-rb");  in atmel_nand_create()
1694 				nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;  in atmel_nand_create()
1695 				nand->cs[i].rb.gpio = gpio;  in atmel_nand_create()
1702 						   "nand-cs");  in atmel_nand_create()
1711 			nand->cs[i].csgpio = gpio;  in atmel_nand_create()
1714 	nand_set_flash_node(&nand->base, np);  in atmel_nand_create()
1716 	return nand;  in atmel_nand_create()
1721 			       struct atmel_nand *nand)  in atmel_nand_controller_add_nand()  argument
1723 	struct nand_chip *chip = &nand->base;  in atmel_nand_controller_add_nand()
1727 	/* No card inserted, skip this NAND. */  in atmel_nand_controller_add_nand()
1728 	if (nand->cdgpio && gpiod_get_value(nand->cdgpio)) {  in atmel_nand_controller_add_nand()
1733 	nc->caps->ops->nand_init(nc, nand);  in atmel_nand_controller_add_nand()
1735 	ret = nand_scan(chip, nand->numcs);  in atmel_nand_controller_add_nand()
1737 		dev_err(nc->dev, "NAND scan failed: %d\n", ret);  in atmel_nand_controller_add_nand()
1748 	list_add_tail(&nand->node, &nc->chips);  in atmel_nand_controller_add_nand()
1756 	struct atmel_nand *nand, *tmp;  in atmel_nand_controller_remove_nands()  local
1759 	list_for_each_entry_safe(nand, tmp, &nc->chips, node) {  in atmel_nand_controller_remove_nands()
1760 		ret = atmel_nand_controller_remove_nand(nand);  in atmel_nand_controller_remove_nands()
1773 	struct atmel_nand *nand;  in atmel_nand_controller_legacy_add_nands()  local
1778 	 * Legacy bindings only allow connecting a single NAND with a unique CS  in atmel_nand_controller_legacy_add_nands()
1781 	nand = devm_kzalloc(nc->dev, sizeof(*nand) + sizeof(*nand->cs),  in atmel_nand_controller_legacy_add_nands()
1783 	if (!nand)  in atmel_nand_controller_legacy_add_nands()
1786 	nand->numcs = 1;  in atmel_nand_controller_legacy_add_nands()
1789 	nand->cs[0].io.virt = devm_ioremap_resource(dev, res);  in atmel_nand_controller_legacy_add_nands()
1790 	if (IS_ERR(nand->cs[0].io.virt))  in atmel_nand_controller_legacy_add_nands()
1791 		return PTR_ERR(nand->cs[0].io.virt);  in atmel_nand_controller_legacy_add_nands()
1793 	nand->cs[0].io.dma = res->start;  in atmel_nand_controller_legacy_add_nands()
1800 	 * If one wants to connect a NAND to a different CS line, he will  in atmel_nand_controller_legacy_add_nands()
1803 	nand->cs[0].id = 3;  in atmel_nand_controller_legacy_add_nands()
1814 		nand->cs[0].rb.type = ATMEL_NAND_GPIO_RB;  in atmel_nand_controller_legacy_add_nands()
1815 		nand->cs[0].rb.gpio = gpio;  in atmel_nand_controller_legacy_add_nands()
1826 	nand->cs[0].csgpio = gpio;  in atmel_nand_controller_legacy_add_nands()
1837 	nand->cdgpio = gpio;  in atmel_nand_controller_legacy_add_nands()
1839 	nand_set_flash_node(&nand->base, nc->dev->of_node);  in atmel_nand_controller_legacy_add_nands()
1841 	return atmel_nand_controller_add_nand(nc, nand);  in atmel_nand_controller_legacy_add_nands()
1874 		struct atmel_nand *nand;  in atmel_nand_controller_add_nands()  local
1876 		nand = atmel_nand_create(nc, nand_np, reg_cells);  in atmel_nand_controller_add_nands()
1877 		if (IS_ERR(nand)) {  in atmel_nand_controller_add_nands()
1878 			ret = PTR_ERR(nand);  in atmel_nand_controller_add_nands()
1882 		ret = atmel_nand_controller_add_nand(nc, nand);  in atmel_nand_controller_add_nands()
1975 	struct atmel_nand *nand = to_atmel_nand(chip);  in atmel_nand_attach_chip()  local
1994 		 * should define the following property in your nand node:  in atmel_nand_attach_chip()
2002 					   "%s:nand.%d", dev_name(nc->dev),  in atmel_nand_attach_chip()
2003 					   nand->cs[0].id);  in atmel_nand_attach_chip()
2112 	 * The at91sam9263 has 2 EBIs, if the NAND controller is under EBI1  in atmel_smc_nand_controller_init()
2521 		.compatible = "atmel,at91rm9200-nand-controller",
2525 		.compatible = "atmel,at91sam9260-nand-controller",
2529 		.compatible = "atmel,at91sam9261-nand-controller",
2533 		.compatible = "atmel,at91sam9g45-nand-controller",
2537 		.compatible = "atmel,sama5d3-nand-controller",
2541 		.compatible = "microchip,sam9x60-nand-controller",
2546 		.compatible = "atmel,at91rm9200-nand",
2550 		.compatible = "atmel,sama5d4-nand",
2554 		.compatible = "atmel,sama5d2-nand",
2592 		 * at91rm9200 controller, the atmel,nand-has-dma specify that  in atmel_nand_controller_probe()
2598 					  "atmel,nand-has-dma"))  in atmel_nand_controller_probe()
2603 		 * CLE to A22. If atmel,nand-addr-offset != 21 this means we're  in atmel_nand_controller_probe()
2607 				     "atmel,nand-addr-offset", &ale_offs);  in atmel_nand_controller_probe()
2625 	struct atmel_nand *nand;  in atmel_nand_controller_resume()  local
2630 	list_for_each_entry(nand, &nc->chips, node) {  in atmel_nand_controller_resume()
2633 		for (i = 0; i < nand->numcs; i++)  in atmel_nand_controller_resume()
2634 			nand_reset(&nand->base, i);  in atmel_nand_controller_resume()
2645 		.name = "atmel-nand-controller",
2656 MODULE_DESCRIPTION("NAND Flash Controller driver for Atmel SoCs");
2657 MODULE_ALIAS("platform:atmel-nand-controller");