Lines Matching +full:nand +full:- +full:no +full:- +full:ecc +full:- +full:engine
1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic Error-Correcting Code (ECC) engine
10 * This file describes the abstraction of any NAND ECC engine. It has been
11 * designed to fit most cases, including parallel NANDs and SPI-NANDs.
13 * There are three main situations where instantiating this ECC engine makes
15 * - external: The ECC engine is outside the NAND pipeline, typically this
16 * is a software ECC engine, or an hardware engine that is
17 * outside the NAND controller pipeline.
18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the
19 * controller's side. This is the case of most of the raw NAND
20 * controllers. In the pipeline case, the ECC bytes are
23 * - ondie: The ECC engine is inside the NAND pipeline, on the chip's side.
24 * Some NAND chips can correct themselves the data.
28 * - prepare: Prepare an I/O request. Enable/disable the ECC engine based on
30 * engine, this step may involve to derive the ECC bytes and place
32 * - finish: Finish an I/O request. Correct the data in case of a read
35 * hardware specific stuff to do, like shutting down the engine to
40 * - raw: Correction disabled
41 * - ecc: Correction enabled
44 * - read: Load data from the NAND chip
45 * - write: Store data in the NAND chip
51 * [external ECC engine]
52 * - external + prepare + raw + read: do nothing
53 * - external + finish + raw + read: do nothing
54 * - external + prepare + raw + write: do nothing
55 * - external + finish + raw + write: do nothing
56 * - external + prepare + ecc + read: do nothing
57 * - external + finish + ecc + read: calculate expected ECC bytes, extract
58 * ECC bytes from OOB buffer, correct
60 * - external + prepare + ecc + write: calculate ECC bytes and store them at
63 * - external + finish + ecc + write: do nothing
65 * [pipelined ECC engine]
66 * - pipelined + prepare + raw + read: disable the controller's ECC engine if
68 * - pipelined + finish + raw + read: do nothing
69 * - pipelined + prepare + raw + write: disable the controller's ECC engine if
71 * - pipelined + finish + raw + write: do nothing
72 * - pipelined + prepare + ecc + read: enable the controller's ECC engine if
74 * - pipelined + finish + ecc + read: check the status, report any
76 * - pipelined + prepare + ecc + write: enable the controller's ECC engine if
78 * - pipelined + finish + ecc + write: do nothing
80 * [ondie ECC engine]
81 * - ondie + prepare + raw + read: send commands to disable the on-chip ECC
82 * engine if activated
83 * - ondie + finish + raw + read: do nothing
84 * - ondie + prepare + raw + write: send commands to disable the on-chip ECC
85 * engine if activated
86 * - ondie + finish + raw + write: do nothing
87 * - ondie + prepare + ecc + read: send commands to enable the on-chip ECC
88 * engine if deactivated
89 * - ondie + finish + ecc + read: send commands to check the status, report
91 * - ondie + prepare + ecc + write: send commands to enable the on-chip ECC
92 * engine if deactivated
93 * - ondie + finish + ecc + write: do nothing
97 #include <linux/mtd/nand.h>
100 * nand_ecc_init_ctx - Init the ECC engine context
101 * @nand: the NAND device
105 int nand_ecc_init_ctx(struct nand_device *nand) in nand_ecc_init_ctx() argument
107 if (!nand->ecc.engine->ops->init_ctx) in nand_ecc_init_ctx()
110 return nand->ecc.engine->ops->init_ctx(nand); in nand_ecc_init_ctx()
115 * nand_ecc_cleanup_ctx - Cleanup the ECC engine context
116 * @nand: the NAND device
118 void nand_ecc_cleanup_ctx(struct nand_device *nand) in nand_ecc_cleanup_ctx() argument
120 if (nand->ecc.engine->ops->cleanup_ctx) in nand_ecc_cleanup_ctx()
121 nand->ecc.engine->ops->cleanup_ctx(nand); in nand_ecc_cleanup_ctx()
126 * nand_ecc_prepare_io_req - Prepare an I/O request
127 * @nand: the NAND device
130 int nand_ecc_prepare_io_req(struct nand_device *nand, in nand_ecc_prepare_io_req() argument
133 if (!nand->ecc.engine->ops->prepare_io_req) in nand_ecc_prepare_io_req()
136 return nand->ecc.engine->ops->prepare_io_req(nand, req); in nand_ecc_prepare_io_req()
141 * nand_ecc_finish_io_req - Finish an I/O request
142 * @nand: the NAND device
145 int nand_ecc_finish_io_req(struct nand_device *nand, in nand_ecc_finish_io_req() argument
148 if (!nand->ecc.engine->ops->finish_io_req) in nand_ecc_finish_io_req()
151 return nand->ecc.engine->ops->finish_io_req(nand, req); in nand_ecc_finish_io_req()
159 struct nand_device *nand = mtd_to_nanddev(mtd); in nand_ooblayout_ecc_sp() local
160 unsigned int total_ecc_bytes = nand->ecc.ctx.total; in nand_ooblayout_ecc_sp()
163 return -ERANGE; in nand_ooblayout_ecc_sp()
166 oobregion->offset = 0; in nand_ooblayout_ecc_sp()
167 if (mtd->oobsize == 16) in nand_ooblayout_ecc_sp()
168 oobregion->length = 4; in nand_ooblayout_ecc_sp()
170 oobregion->length = 3; in nand_ooblayout_ecc_sp()
172 if (mtd->oobsize == 8) in nand_ooblayout_ecc_sp()
173 return -ERANGE; in nand_ooblayout_ecc_sp()
175 oobregion->offset = 6; in nand_ooblayout_ecc_sp()
176 oobregion->length = total_ecc_bytes - 4; in nand_ooblayout_ecc_sp()
186 return -ERANGE; in nand_ooblayout_free_sp()
188 if (mtd->oobsize == 16) { in nand_ooblayout_free_sp()
190 return -ERANGE; in nand_ooblayout_free_sp()
192 oobregion->length = 8; in nand_ooblayout_free_sp()
193 oobregion->offset = 8; in nand_ooblayout_free_sp()
195 oobregion->length = 2; in nand_ooblayout_free_sp()
197 oobregion->offset = 3; in nand_ooblayout_free_sp()
199 oobregion->offset = 6; in nand_ooblayout_free_sp()
206 .ecc = nand_ooblayout_ecc_sp,
219 struct nand_device *nand = mtd_to_nanddev(mtd); in nand_ooblayout_ecc_lp() local
220 unsigned int total_ecc_bytes = nand->ecc.ctx.total; in nand_ooblayout_ecc_lp()
223 return -ERANGE; in nand_ooblayout_ecc_lp()
225 oobregion->length = total_ecc_bytes; in nand_ooblayout_ecc_lp()
226 oobregion->offset = mtd->oobsize - oobregion->length; in nand_ooblayout_ecc_lp()
234 struct nand_device *nand = mtd_to_nanddev(mtd); in nand_ooblayout_free_lp() local
235 unsigned int total_ecc_bytes = nand->ecc.ctx.total; in nand_ooblayout_free_lp()
238 return -ERANGE; in nand_ooblayout_free_lp()
240 oobregion->length = mtd->oobsize - total_ecc_bytes - 2; in nand_ooblayout_free_lp()
241 oobregion->offset = 2; in nand_ooblayout_free_lp()
247 .ecc = nand_ooblayout_ecc_lp,
258 * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
264 struct nand_device *nand = mtd_to_nanddev(mtd); in nand_ooblayout_ecc_lp_hamming() local
265 unsigned int total_ecc_bytes = nand->ecc.ctx.total; in nand_ooblayout_ecc_lp_hamming()
268 return -ERANGE; in nand_ooblayout_ecc_lp_hamming()
270 switch (mtd->oobsize) { in nand_ooblayout_ecc_lp_hamming()
272 oobregion->offset = 40; in nand_ooblayout_ecc_lp_hamming()
275 oobregion->offset = 80; in nand_ooblayout_ecc_lp_hamming()
278 return -EINVAL; in nand_ooblayout_ecc_lp_hamming()
281 oobregion->length = total_ecc_bytes; in nand_ooblayout_ecc_lp_hamming()
282 if (oobregion->offset + oobregion->length > mtd->oobsize) in nand_ooblayout_ecc_lp_hamming()
283 return -ERANGE; in nand_ooblayout_ecc_lp_hamming()
291 struct nand_device *nand = mtd_to_nanddev(mtd); in nand_ooblayout_free_lp_hamming() local
292 unsigned int total_ecc_bytes = nand->ecc.ctx.total; in nand_ooblayout_free_lp_hamming()
296 return -ERANGE; in nand_ooblayout_free_lp_hamming()
298 switch (mtd->oobsize) { in nand_ooblayout_free_lp_hamming()
306 return -EINVAL; in nand_ooblayout_free_lp_hamming()
310 oobregion->offset = 2; in nand_ooblayout_free_lp_hamming()
311 oobregion->length = ecc_offset - 2; in nand_ooblayout_free_lp_hamming()
313 oobregion->offset = ecc_offset + total_ecc_bytes; in nand_ooblayout_free_lp_hamming()
314 oobregion->length = mtd->oobsize - oobregion->offset; in nand_ooblayout_free_lp_hamming()
321 .ecc = nand_ooblayout_ecc_lp_hamming,
336 if (of_property_read_bool(np, "nand-no-ecc-engine")) in of_get_nand_ecc_engine_type()
339 if (of_property_read_bool(np, "nand-use-soft-ecc-engine")) in of_get_nand_ecc_engine_type()
342 eng_np = of_parse_phandle(np, "nand-ecc-engine", 0); in of_get_nand_ecc_engine_type()
366 err = of_property_read_string(np, "nand-ecc-placement", &pm); in of_get_nand_ecc_placement()
390 err = of_property_read_string(np, "nand-ecc-algo", &pm); in of_get_nand_ecc_algo()
408 ret = of_property_read_u32(np, "nand-ecc-step-size", &val); in of_get_nand_ecc_step_size()
417 ret = of_property_read_u32(np, "nand-ecc-strength", &val); in of_get_nand_ecc_strength()
421 void of_get_nand_ecc_user_config(struct nand_device *nand) in of_get_nand_ecc_user_config() argument
423 struct device_node *dn = nanddev_get_of_node(nand); in of_get_nand_ecc_user_config()
426 nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn); in of_get_nand_ecc_user_config()
427 nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn); in of_get_nand_ecc_user_config()
428 nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn); in of_get_nand_ecc_user_config()
432 nand->ecc.user_conf.strength = strength; in of_get_nand_ecc_user_config()
436 nand->ecc.user_conf.step_size = size; in of_get_nand_ecc_user_config()
438 if (of_property_read_bool(dn, "nand-ecc-maximize")) in of_get_nand_ecc_user_config()
439 nand->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE_STRENGTH; in of_get_nand_ecc_user_config()
444 * nand_ecc_is_strong_enough - Check if the chip configuration meets the
447 * @nand: Device to check
460 bool nand_ecc_is_strong_enough(struct nand_device *nand) in nand_ecc_is_strong_enough() argument
462 const struct nand_ecc_props *reqs = nanddev_get_ecc_requirements(nand); in nand_ecc_is_strong_enough()
463 const struct nand_ecc_props *conf = nanddev_get_ecc_conf(nand); in nand_ecc_is_strong_enough()
464 struct mtd_info *mtd = nanddev_to_mtd(nand); in nand_ecc_is_strong_enough()
467 if (conf->step_size == 0 || reqs->step_size == 0) in nand_ecc_is_strong_enough()
475 corr = (mtd->writesize * conf->strength) / conf->step_size; in nand_ecc_is_strong_enough()
476 ds_corr = (mtd->writesize * reqs->strength) / reqs->step_size; in nand_ecc_is_strong_enough()
478 return corr >= ds_corr && conf->strength >= reqs->strength; in nand_ecc_is_strong_enough()
484 MODULE_DESCRIPTION("Generic ECC engine");