76 #define mmc_readl(host, reg) \  macro
311 		rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_reset_host()
348 	rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_init_host()
425 	rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_start_dma()
462 		ri = mmc_readl(host, REG_RINTR);  in sunxi_mmc_send_manual_stop()
472 			req->stop->resp[0] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_send_manual_stop()
528 			mrq->cmd->resp[0] = mmc_readl(host, REG_RESP3);  in sunxi_mmc_finalize_request()
529 			mrq->cmd->resp[1] = mmc_readl(host, REG_RESP2);  in sunxi_mmc_finalize_request()
530 			mrq->cmd->resp[2] = mmc_readl(host, REG_RESP1);  in sunxi_mmc_finalize_request()
531 			mrq->cmd->resp[3] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_finalize_request()
533 			mrq->cmd->resp[0] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_finalize_request()
543 		rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_finalize_request()
574 	idma_int  = mmc_readl(host, REG_IDST);  in sunxi_mmc_irq()
575 	msk_int   = mmc_readl(host, REG_MISTA);  in sunxi_mmc_irq()
664 	rval = mmc_readl(host, REG_CLKCR);  in sunxi_mmc_oclk_onoff()
678 		rval = mmc_readl(host, REG_CMDR);  in sunxi_mmc_oclk_onoff()
683 		   mmc_readl(host, REG_RINTR) & ~SDXC_SDIO_INTERRUPT);  in sunxi_mmc_oclk_onoff()
691 		rval = mmc_readl(host, REG_CLKCR);  in sunxi_mmc_oclk_onoff()
816 	rval = mmc_readl(host, REG_CLKCR);  in sunxi_mmc_clk_set_rate()
832 		rval = mmc_readl(host, REG_SD_NTSR);  in sunxi_mmc_clk_set_rate()
885 	rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_set_clk()
980 	imask = mmc_readl(host, REG_IMASK);  in sunxi_mmc_enable_sdio_irq()
1104 	return !!(mmc_readl(host, REG_STAS) & SDXC_CARD_DATA_BUSY);  in sunxi_mmc_card_busy()