1 // SPDX-License-Identifier: GPL-2.0-or-later
4  * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
5  * (C) Copyright 2007-2011 Aaron Maoye <leafy.myeh@reuuimllatech.com>
6  * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
7  * (C) Copyright 2013-2014 David Lanzendörfer <david.lanzendoerfer@o2s.ch>
8  * (C) Copyright 2013-2014 Hans de Goede <hdegoede@redhat.com>
12 #include <linux/clk.h>
13 #include <linux/clk/sunxi-ng.h>
16 #include <linux/dma-mapping.h>
27 #include <linux/mmc/slot-gpio.h>
77 	readl((host)->reg_base + SDXC_##reg)
79 	writel((value), (host)->reg_base + SDXC_##reg)
202 * If the idma-des-size-bits of property is ie 13, bufsize bits are:
203 *  Bits  0-12: buf1 size
204 *  Bits 13-25: buf2 size
205 *  Bits 26-31: not used
214 #define SDXC_IDMAC_DES0_OWN	BIT(31) /* 1-idma owns it, 0-host owns it */
277 	struct clk	*clk_ahb;
278 	struct clk	*clk_mmc;
279 	struct clk	*clk_sample;
280 	struct clk	*clk_output;
315 		dev_err(mmc_dev(host->mmc), "fatal err reset timeout\n");  in sunxi_mmc_reset_host()
316 		return -EIO;  in sunxi_mmc_reset_host()
327 		return -EIO;  in sunxi_mmc_init_host()
338 	mmc_writel(host, REG_IMASK, host->sdio_imask);  in sunxi_mmc_init_host()
346 	mmc_writel(host, REG_DLBA, host->sg_dma);  in sunxi_mmc_init_host()
360 	struct sunxi_idma_des *pdes = (struct sunxi_idma_des *)host->sg_cpu;  in sunxi_mmc_init_idma_des()
361 	dma_addr_t next_desc = host->sg_dma;  in sunxi_mmc_init_idma_des()
362 	int i, max_len = (1 << host->cfg->idma_des_size_bits);  in sunxi_mmc_init_idma_des()
364 	for (i = 0; i < data->sg_len; i++) {  in sunxi_mmc_init_idma_des()
369 		if (data->sg[i].length == max_len)  in sunxi_mmc_init_idma_des()
372 			pdes[i].buf_size = cpu_to_le32(data->sg[i].length);  in sunxi_mmc_init_idma_des()
376 			cpu_to_le32(sg_dma_address(&data->sg[i]));  in sunxi_mmc_init_idma_des()
381 	pdes[i - 1].config |= cpu_to_le32(SDXC_IDMAC_DES0_LD |  in sunxi_mmc_init_idma_des()
383 	pdes[i - 1].config &= cpu_to_le32(~SDXC_IDMAC_DES0_DIC);  in sunxi_mmc_init_idma_des()
384 	pdes[i - 1].buf_addr_ptr2 = 0;  in sunxi_mmc_init_idma_des()
387 	 * Avoid the io-store starting the idmac hitting io-mem before the  in sunxi_mmc_init_idma_des()
388 	 * descriptors hit the main-mem.  in sunxi_mmc_init_idma_des()
399 	dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,  in sunxi_mmc_map_dma()
402 		dev_err(mmc_dev(host->mmc), "dma_map_sg failed\n");  in sunxi_mmc_map_dma()
403 		return -ENOMEM;  in sunxi_mmc_map_dma()
406 	for_each_sg(data->sg, sg, data->sg_len, i) {  in sunxi_mmc_map_dma()
407 		if (sg->offset & 3 || sg->length & 3) {  in sunxi_mmc_map_dma()
408 			dev_err(mmc_dev(host->mmc),  in sunxi_mmc_map_dma()
410 				sg->offset, sg->length);  in sunxi_mmc_map_dma()
411 			return -EINVAL;  in sunxi_mmc_map_dma()
433 	if (!(data->flags & MMC_DATA_WRITE))  in sunxi_mmc_start_dma()
449 	if (req->cmd->opcode == SD_IO_RW_EXTENDED) {  in sunxi_mmc_send_manual_stop()
452 		      ((req->cmd->arg >> 28) & 0x7);  in sunxi_mmc_send_manual_stop()
467 		dev_err(mmc_dev(host->mmc), "send stop command failed\n");  in sunxi_mmc_send_manual_stop()
468 		if (req->stop)  in sunxi_mmc_send_manual_stop()
469 			req->stop->resp[0] = -ETIMEDOUT;  in sunxi_mmc_send_manual_stop()
471 		if (req->stop)  in sunxi_mmc_send_manual_stop()
472 			req->stop->resp[0] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_send_manual_stop()
480 	struct mmc_command *cmd = host->mrq->cmd;  in sunxi_mmc_dump_errinfo()
481 	struct mmc_data *data = host->mrq->data;  in sunxi_mmc_dump_errinfo()
484 	if ((host->int_sum & SDXC_INTERRUPT_ERROR_BIT) ==  in sunxi_mmc_dump_errinfo()
485 		SDXC_RESP_TIMEOUT && (cmd->opcode == SD_IO_SEND_OP_COND ||  in sunxi_mmc_dump_errinfo()
486 				      cmd->opcode == SD_IO_RW_DIRECT))  in sunxi_mmc_dump_errinfo()
489 	dev_dbg(mmc_dev(host->mmc),  in sunxi_mmc_dump_errinfo()
491 		host->mmc->index, cmd->opcode,  in sunxi_mmc_dump_errinfo()
492 		data ? (data->flags & MMC_DATA_WRITE ? " WR" : " RD") : "",  in sunxi_mmc_dump_errinfo()
493 		host->int_sum & SDXC_RESP_ERROR     ? " RE"     : "",  in sunxi_mmc_dump_errinfo()
494 		host->int_sum & SDXC_RESP_CRC_ERROR  ? " RCE"    : "",  in sunxi_mmc_dump_errinfo()
495 		host->int_sum & SDXC_DATA_CRC_ERROR  ? " DCE"    : "",  in sunxi_mmc_dump_errinfo()
496 		host->int_sum & SDXC_RESP_TIMEOUT ? " RTO"    : "",  in sunxi_mmc_dump_errinfo()
497 		host->int_sum & SDXC_DATA_TIMEOUT ? " DTO"    : "",  in sunxi_mmc_dump_errinfo()
498 		host->int_sum & SDXC_FIFO_RUN_ERROR  ? " FE"     : "",  in sunxi_mmc_dump_errinfo()
499 		host->int_sum & SDXC_HARD_WARE_LOCKED ? " HL"     : "",  in sunxi_mmc_dump_errinfo()
500 		host->int_sum & SDXC_START_BIT_ERROR ? " SBE"    : "",  in sunxi_mmc_dump_errinfo()
501 		host->int_sum & SDXC_END_BIT_ERROR   ? " EBE"    : ""  in sunxi_mmc_dump_errinfo()
508 	struct mmc_request *mrq = host->mrq;  in sunxi_mmc_finalize_request()
509 	struct mmc_data *data = mrq->data;  in sunxi_mmc_finalize_request()
512 	mmc_writel(host, REG_IMASK, host->sdio_imask);  in sunxi_mmc_finalize_request()
515 	if (host->int_sum & SDXC_INTERRUPT_ERROR_BIT) {  in sunxi_mmc_finalize_request()
517 		mrq->cmd->error = -ETIMEDOUT;  in sunxi_mmc_finalize_request()
520 			data->error = -ETIMEDOUT;  in sunxi_mmc_finalize_request()
521 			host->manual_stop_mrq = mrq;  in sunxi_mmc_finalize_request()
524 		if (mrq->stop)  in sunxi_mmc_finalize_request()
525 			mrq->stop->error = -ETIMEDOUT;  in sunxi_mmc_finalize_request()
527 		if (mrq->cmd->flags & MMC_RSP_136) {  in sunxi_mmc_finalize_request()
528 			mrq->cmd->resp[0] = mmc_readl(host, REG_RESP3);  in sunxi_mmc_finalize_request()
529 			mrq->cmd->resp[1] = mmc_readl(host, REG_RESP2);  in sunxi_mmc_finalize_request()
530 			mrq->cmd->resp[2] = mmc_readl(host, REG_RESP1);  in sunxi_mmc_finalize_request()
531 			mrq->cmd->resp[3] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_finalize_request()
533 			mrq->cmd->resp[0] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_finalize_request()
537 			data->bytes_xfered = data->blocks * data->blksz;  in sunxi_mmc_finalize_request()
550 		dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,  in sunxi_mmc_finalize_request()
556 	host->mrq = NULL;  in sunxi_mmc_finalize_request()
557 	host->int_sum = 0;  in sunxi_mmc_finalize_request()
558 	host->wait_dma = false;  in sunxi_mmc_finalize_request()
560 	return host->manual_stop_mrq ? IRQ_WAKE_THREAD : IRQ_HANDLED;  in sunxi_mmc_finalize_request()
572 	spin_lock(&host->lock);  in sunxi_mmc_irq()
577 	dev_dbg(mmc_dev(host->mmc), "irq: rq %p mi %08x idi %08x\n",  in sunxi_mmc_irq()
578 		host->mrq, msk_int, idma_int);  in sunxi_mmc_irq()
580 	mrq = host->mrq;  in sunxi_mmc_irq()
583 			host->wait_dma = false;  in sunxi_mmc_irq()
585 		host->int_sum |= msk_int;  in sunxi_mmc_irq()
588 		if ((host->int_sum & SDXC_RESP_TIMEOUT) &&  in sunxi_mmc_irq()
589 				!(host->int_sum & SDXC_COMMAND_DONE))  in sunxi_mmc_irq()
591 				   host->sdio_imask | SDXC_COMMAND_DONE);  in sunxi_mmc_irq()
593 		else if (host->int_sum & SDXC_INTERRUPT_ERROR_BIT)  in sunxi_mmc_irq()
595 		else if ((host->int_sum & SDXC_INTERRUPT_DONE_BIT) &&  in sunxi_mmc_irq()
596 				!host->wait_dma)  in sunxi_mmc_irq()
609 	spin_unlock(&host->lock);  in sunxi_mmc_irq()
612 		mmc_request_done(host->mmc, mrq);  in sunxi_mmc_irq()
615 		mmc_signal_sdio_irq(host->mmc);  in sunxi_mmc_irq()
626 	spin_lock_irqsave(&host->lock, iflags);  in sunxi_mmc_handle_manual_stop()
627 	mrq = host->manual_stop_mrq;  in sunxi_mmc_handle_manual_stop()
628 	spin_unlock_irqrestore(&host->lock, iflags);  in sunxi_mmc_handle_manual_stop()
631 		dev_err(mmc_dev(host->mmc), "no request for manual stop\n");  in sunxi_mmc_handle_manual_stop()
635 	dev_err(mmc_dev(host->mmc), "data error, sending stop command\n");  in sunxi_mmc_handle_manual_stop()
640 	 * we've cleared host->manual_stop_mrq so we do not need to  in sunxi_mmc_handle_manual_stop()
647 	spin_lock_irqsave(&host->lock, iflags);  in sunxi_mmc_handle_manual_stop()
648 	host->manual_stop_mrq = NULL;  in sunxi_mmc_handle_manual_stop()
649 	spin_unlock_irqrestore(&host->lock, iflags);  in sunxi_mmc_handle_manual_stop()
651 	mmc_request_done(host->mmc, mrq);  in sunxi_mmc_handle_manual_stop()
661 	dev_dbg(mmc_dev(host->mmc), "%sabling the clock\n",  in sunxi_mmc_oclk_onoff()
669 	if (host->cfg->mask_data0)  in sunxi_mmc_oclk_onoff()
686 		dev_err(mmc_dev(host->mmc), "fatal err update clk timeout\n");  in sunxi_mmc_oclk_onoff()
687 		return -EIO;  in sunxi_mmc_oclk_onoff()
690 	if (host->cfg->mask_data0) {  in sunxi_mmc_oclk_onoff()
700 	if (!host->cfg->can_calibrate)  in sunxi_mmc_calibrate()
712 	writel(SDXC_CAL_DL_SW_EN, host->reg_base + reg_off);  in sunxi_mmc_calibrate()
722 	/* clk controller delays not used under new timings mode */  in sunxi_mmc_clk_set_phase()
723 	if (host->use_new_timings)  in sunxi_mmc_clk_set_phase()
727 	if (!host->cfg->clk_delays)  in sunxi_mmc_clk_set_phase()
736 		if (ios->timing != MMC_TIMING_UHS_DDR50 &&  in sunxi_mmc_clk_set_phase()
737 		    ios->timing != MMC_TIMING_MMC_DDR52) {  in sunxi_mmc_clk_set_phase()
739 		} else if (ios->bus_width == MMC_BUS_WIDTH_8) {  in sunxi_mmc_clk_set_phase()
745 		dev_dbg(mmc_dev(host->mmc), "Invalid clock... returning\n");  in sunxi_mmc_clk_set_phase()
746 		return -EINVAL;  in sunxi_mmc_clk_set_phase()
749 	clk_set_phase(host->clk_sample, host->cfg->clk_delays[index].sample);  in sunxi_mmc_clk_set_phase()
750 	clk_set_phase(host->clk_output, host->cfg->clk_delays[index].output);  in sunxi_mmc_clk_set_phase()
758 	struct mmc_host *mmc = host->mmc;  in sunxi_mmc_clk_set_rate()
760 	u32 rval, clock = ios->clock, div = 1;  in sunxi_mmc_clk_set_rate()
768 	mmc->actual_clock = 0;  in sunxi_mmc_clk_set_rate()
770 	if (!ios->clock)  in sunxi_mmc_clk_set_rate()
782 	if (ios->timing == MMC_TIMING_MMC_DDR52 &&  in sunxi_mmc_clk_set_rate()
783 	    (host->use_new_timings ||  in sunxi_mmc_clk_set_rate()
784 	     ios->bus_width == MMC_BUS_WIDTH_8)) {  in sunxi_mmc_clk_set_rate()
789 	if (host->use_new_timings && host->cfg->ccu_has_timings_switch) {  in sunxi_mmc_clk_set_rate()
790 		ret = sunxi_ccu_set_mmc_timing_mode(host->clk_mmc, true);  in sunxi_mmc_clk_set_rate()
798 	rate = clk_round_rate(host->clk_mmc, clock);  in sunxi_mmc_clk_set_rate()
800 		dev_err(mmc_dev(mmc), "error rounding clk to %d: %ld\n",  in sunxi_mmc_clk_set_rate()
804 	dev_dbg(mmc_dev(mmc), "setting clk to %d, rounded %ld\n",  in sunxi_mmc_clk_set_rate()
808 	ret = clk_set_rate(host->clk_mmc, rate);  in sunxi_mmc_clk_set_rate()
810 		dev_err(mmc_dev(mmc), "error setting clk to %ld: %d\n",  in sunxi_mmc_clk_set_rate()
818 	rval |= div - 1;  in sunxi_mmc_clk_set_rate()
830 	if (host->use_new_timings) {  in sunxi_mmc_clk_set_rate()
859 	mmc->actual_clock = rate;  in sunxi_mmc_clk_set_rate()
886 	if (ios->timing == MMC_TIMING_UHS_DDR50 ||  in sunxi_mmc_set_clk()
887 	    ios->timing == MMC_TIMING_MMC_DDR52)  in sunxi_mmc_set_clk()
893 	host->ferror = sunxi_mmc_clk_set_rate(host, ios);  in sunxi_mmc_set_clk()
900 	struct mmc_host *mmc = host->mmc;  in sunxi_mmc_card_power()
902 	switch (ios->power_mode) {  in sunxi_mmc_card_power()
906 		if (!IS_ERR(mmc->supply.vmmc)) {  in sunxi_mmc_card_power()
907 			host->ferror = mmc_regulator_set_ocr(mmc,  in sunxi_mmc_card_power()
908 							     mmc->supply.vmmc,  in sunxi_mmc_card_power()
909 							     ios->vdd);  in sunxi_mmc_card_power()
910 			if (host->ferror)  in sunxi_mmc_card_power()
914 		if (!IS_ERR(mmc->supply.vqmmc)) {  in sunxi_mmc_card_power()
915 			host->ferror = regulator_enable(mmc->supply.vqmmc);  in sunxi_mmc_card_power()
916 			if (host->ferror) {  in sunxi_mmc_card_power()
921 			host->vqmmc_enabled = true;  in sunxi_mmc_card_power()
928 		if (!IS_ERR(mmc->supply.vmmc))  in sunxi_mmc_card_power()
929 			mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);  in sunxi_mmc_card_power()
931 		if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled)  in sunxi_mmc_card_power()
932 			regulator_disable(mmc->supply.vqmmc);  in sunxi_mmc_card_power()
934 		host->vqmmc_enabled = false;  in sunxi_mmc_card_power()
948 	sunxi_mmc_set_bus_width(host, ios->bus_width);  in sunxi_mmc_set_ios()
957 	if (!IS_ERR(mmc->supply.vqmmc)) {  in sunxi_mmc_volt_switch()
963 	if (mmc->ios.signal_voltage == MMC_SIGNAL_VOLTAGE_330)  in sunxi_mmc_volt_switch()
966 	return -EINVAL;  in sunxi_mmc_volt_switch()
976 		pm_runtime_get_noresume(host->dev);  in sunxi_mmc_enable_sdio_irq()
978 	spin_lock_irqsave(&host->lock, flags);  in sunxi_mmc_enable_sdio_irq()
982 		host->sdio_imask = SDXC_SDIO_INTERRUPT;  in sunxi_mmc_enable_sdio_irq()
985 		host->sdio_imask = 0;  in sunxi_mmc_enable_sdio_irq()
989 	spin_unlock_irqrestore(&host->lock, flags);  in sunxi_mmc_enable_sdio_irq()
992 		pm_runtime_put_noidle(host->mmc->parent);  in sunxi_mmc_enable_sdio_irq()
1007 	struct mmc_command *cmd = mrq->cmd;  in sunxi_mmc_request()
1008 	struct mmc_data *data = mrq->data;  in sunxi_mmc_request()
1011 	u32 cmd_val = SDXC_START | (cmd->opcode & 0x3f);  in sunxi_mmc_request()
1012 	bool wait_dma = host->wait_dma;  in sunxi_mmc_request()
1016 	if (host->ferror) {  in sunxi_mmc_request()
1017 		mrq->cmd->error = host->ferror;  in sunxi_mmc_request()
1026 			cmd->error = ret;  in sunxi_mmc_request()
1027 			data->error = ret;  in sunxi_mmc_request()
1033 	if (cmd->opcode == MMC_GO_IDLE_STATE) {  in sunxi_mmc_request()
1038 	if (cmd->flags & MMC_RSP_PRESENT) {  in sunxi_mmc_request()
1040 		if (cmd->flags & MMC_RSP_136)  in sunxi_mmc_request()
1042 		if (cmd->flags & MMC_RSP_CRC)  in sunxi_mmc_request()
1045 		if ((cmd->flags & MMC_CMD_MASK) == MMC_CMD_ADTC) {  in sunxi_mmc_request()
1048 			if (cmd->data->stop) {  in sunxi_mmc_request()
1055 			if (cmd->data->flags & MMC_DATA_WRITE)  in sunxi_mmc_request()
1067 		cmd_val & 0x3f, cmd_val, cmd->arg, imask,  in sunxi_mmc_request()
1068 		mrq->data ? mrq->data->blksz * mrq->data->blocks : 0);  in sunxi_mmc_request()
1070 	spin_lock_irqsave(&host->lock, iflags);  in sunxi_mmc_request()
1072 	if (host->mrq || host->manual_stop_mrq) {  in sunxi_mmc_request()
1073 		spin_unlock_irqrestore(&host->lock, iflags);  in sunxi_mmc_request()
1076 			dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len,  in sunxi_mmc_request()
1080 		mrq->cmd->error = -EBUSY;  in sunxi_mmc_request()
1086 		mmc_writel(host, REG_BLKSZ, data->blksz);  in sunxi_mmc_request()
1087 		mmc_writel(host, REG_BCNTR, data->blksz * data->blocks);  in sunxi_mmc_request()
1091 	host->mrq = mrq;  in sunxi_mmc_request()
1092 	host->wait_dma = wait_dma;  in sunxi_mmc_request()
1093 	mmc_writel(host, REG_IMASK, host->sdio_imask | imask);  in sunxi_mmc_request()
1094 	mmc_writel(host, REG_CARG, cmd->arg);  in sunxi_mmc_request()
1097 	spin_unlock_irqrestore(&host->lock, iflags);  in sunxi_mmc_request()
1182 	{ .compatible = "allwinner,sun4i-a10-mmc", .data = &sun4i_a10_cfg },
1183 	{ .compatible = "allwinner,sun5i-a13-mmc", .data = &sun5i_a13_cfg },
1184 	{ .compatible = "allwinner,sun7i-a20-mmc", .data = &sun7i_a20_cfg },
1185 	{ .compatible = "allwinner,sun8i-a83t-emmc", .data = &sun8i_a83t_emmc_cfg },
1186 	{ .compatible = "allwinner,sun9i-a80-mmc", .data = &sun9i_a80_cfg },
1187 	{ .compatible = "allwinner,sun50i-a64-mmc", .data = &sun50i_a64_cfg },
1188 	{ .compatible = "allwinner,sun50i-a64-emmc", .data = &sun50i_a64_emmc_cfg },
1197 	if (!IS_ERR(host->reset)) {  in sunxi_mmc_enable()
1198 		ret = reset_control_reset(host->reset);  in sunxi_mmc_enable()
1200 			dev_err(host->dev, "Couldn't reset the MMC controller (%d)\n",  in sunxi_mmc_enable()
1206 	ret = clk_prepare_enable(host->clk_ahb);  in sunxi_mmc_enable()
1208 		dev_err(host->dev, "Couldn't enable the bus clocks (%d)\n", ret);  in sunxi_mmc_enable()
1212 	ret = clk_prepare_enable(host->clk_mmc);  in sunxi_mmc_enable()
1214 		dev_err(host->dev, "Enable mmc clk err %d\n", ret);  in sunxi_mmc_enable()
1218 	ret = clk_prepare_enable(host->clk_output);  in sunxi_mmc_enable()
1220 		dev_err(host->dev, "Enable output clk err %d\n", ret);  in sunxi_mmc_enable()
1224 	ret = clk_prepare_enable(host->clk_sample);  in sunxi_mmc_enable()
1226 		dev_err(host->dev, "Enable sample clk err %d\n", ret);  in sunxi_mmc_enable()
1241 	clk_disable_unprepare(host->clk_sample);  in sunxi_mmc_enable()
1243 	clk_disable_unprepare(host->clk_output);  in sunxi_mmc_enable()
1245 	clk_disable_unprepare(host->clk_mmc);  in sunxi_mmc_enable()
1247 	clk_disable_unprepare(host->clk_ahb);  in sunxi_mmc_enable()
1249 	if (!IS_ERR(host->reset))  in sunxi_mmc_enable()
1250 		reset_control_assert(host->reset);  in sunxi_mmc_enable()
1258 	clk_disable_unprepare(host->clk_sample);  in sunxi_mmc_disable()
1259 	clk_disable_unprepare(host->clk_output);  in sunxi_mmc_disable()
1260 	clk_disable_unprepare(host->clk_mmc);  in sunxi_mmc_disable()
1261 	clk_disable_unprepare(host->clk_ahb);  in sunxi_mmc_disable()
1263 	if (!IS_ERR(host->reset))  in sunxi_mmc_disable()
1264 		reset_control_assert(host->reset);  in sunxi_mmc_disable()
1272 	host->cfg = of_device_get_match_data(&pdev->dev);  in sunxi_mmc_resource_request()
1273 	if (!host->cfg)  in sunxi_mmc_resource_request()
1274 		return -EINVAL;  in sunxi_mmc_resource_request()
1276 	ret = mmc_regulator_get_supply(host->mmc);  in sunxi_mmc_resource_request()
1280 	host->reg_base = devm_platform_ioremap_resource(pdev, 0);  in sunxi_mmc_resource_request()
1281 	if (IS_ERR(host->reg_base))  in sunxi_mmc_resource_request()
1282 		return PTR_ERR(host->reg_base);  in sunxi_mmc_resource_request()
1284 	host->clk_ahb = devm_clk_get(&pdev->dev, "ahb");  in sunxi_mmc_resource_request()
1285 	if (IS_ERR(host->clk_ahb)) {  in sunxi_mmc_resource_request()
1286 		dev_err(&pdev->dev, "Could not get ahb clock\n");  in sunxi_mmc_resource_request()
1287 		return PTR_ERR(host->clk_ahb);  in sunxi_mmc_resource_request()
1290 	host->clk_mmc = devm_clk_get(&pdev->dev, "mmc");  in sunxi_mmc_resource_request()
1291 	if (IS_ERR(host->clk_mmc)) {  in sunxi_mmc_resource_request()
1292 		dev_err(&pdev->dev, "Could not get mmc clock\n");  in sunxi_mmc_resource_request()
1293 		return PTR_ERR(host->clk_mmc);  in sunxi_mmc_resource_request()
1296 	if (host->cfg->clk_delays) {  in sunxi_mmc_resource_request()
1297 		host->clk_output = devm_clk_get(&pdev->dev, "output");  in sunxi_mmc_resource_request()
1298 		if (IS_ERR(host->clk_output)) {  in sunxi_mmc_resource_request()
1299 			dev_err(&pdev->dev, "Could not get output clock\n");  in sunxi_mmc_resource_request()
1300 			return PTR_ERR(host->clk_output);  in sunxi_mmc_resource_request()
1303 		host->clk_sample = devm_clk_get(&pdev->dev, "sample");  in sunxi_mmc_resource_request()
1304 		if (IS_ERR(host->clk_sample)) {  in sunxi_mmc_resource_request()
1305 			dev_err(&pdev->dev, "Could not get sample clock\n");  in sunxi_mmc_resource_request()
1306 			return PTR_ERR(host->clk_sample);  in sunxi_mmc_resource_request()
1310 	host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev,  in sunxi_mmc_resource_request()
1311 								"ahb");  in sunxi_mmc_resource_request()
1312 	if (PTR_ERR(host->reset) == -EPROBE_DEFER)  in sunxi_mmc_resource_request()
1313 		return PTR_ERR(host->reset);  in sunxi_mmc_resource_request()
1319 	host->irq = platform_get_irq(pdev, 0);  in sunxi_mmc_resource_request()
1320 	if (host->irq <= 0) {  in sunxi_mmc_resource_request()
1321 		ret = -EINVAL;  in sunxi_mmc_resource_request()
1325 	return devm_request_threaded_irq(&pdev->dev, host->irq, sunxi_mmc_irq,  in sunxi_mmc_resource_request()
1326 			sunxi_mmc_handle_manual_stop, 0, "sunxi-mmc", host);  in sunxi_mmc_resource_request()
1339 	mmc = mmc_alloc_host(sizeof(struct sunxi_mmc_host), &pdev->dev);  in sunxi_mmc_probe()
1341 		dev_err(&pdev->dev, "mmc alloc host failed\n");  in sunxi_mmc_probe()
1342 		return -ENOMEM;  in sunxi_mmc_probe()
1347 	host->dev = &pdev->dev;  in sunxi_mmc_probe()
1348 	host->mmc = mmc;  in sunxi_mmc_probe()
1349 	spin_lock_init(&host->lock);  in sunxi_mmc_probe()
1355 	host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,  in sunxi_mmc_probe()
1356 					  &host->sg_dma, GFP_KERNEL);  in sunxi_mmc_probe()
1357 	if (!host->sg_cpu) {  in sunxi_mmc_probe()
1358 		dev_err(&pdev->dev, "Failed to allocate DMA descriptor mem\n");  in sunxi_mmc_probe()
1359 		ret = -ENOMEM;  in sunxi_mmc_probe()
1363 	if (host->cfg->ccu_has_timings_switch) {  in sunxi_mmc_probe()
1366 		 * Try setting the clk to new timing mode.  in sunxi_mmc_probe()
1368 		sunxi_ccu_set_mmc_timing_mode(host->clk_mmc, true);  in sunxi_mmc_probe()
1371 		ret = sunxi_ccu_get_mmc_timing_mode(host->clk_mmc);  in sunxi_mmc_probe()
1377 			dev_warn(&pdev->dev, "MMC clk timing mode unknown\n");  in sunxi_mmc_probe()
1378 			host->use_new_timings = false;  in sunxi_mmc_probe()
1380 			host->use_new_timings = !!ret;  in sunxi_mmc_probe()
1382 	} else if (host->cfg->needs_new_timings) {  in sunxi_mmc_probe()
1384 		host->use_new_timings = true;  in sunxi_mmc_probe()
1387 	mmc->ops		= &sunxi_mmc_ops;  in sunxi_mmc_probe()
1388 	mmc->max_blk_count	= 8192;  in sunxi_mmc_probe()
1389 	mmc->max_blk_size	= 4096;  in sunxi_mmc_probe()
1390 	mmc->max_segs		= PAGE_SIZE / sizeof(struct sunxi_idma_des);  in sunxi_mmc_probe()
1391 	mmc->max_seg_size	= (1 << host->cfg->idma_des_size_bits);  in sunxi_mmc_probe()
1392 	mmc->max_req_size	= mmc->max_seg_size * mmc->max_segs;  in sunxi_mmc_probe()
1394 	mmc->f_min		=   400000;  in sunxi_mmc_probe()
1395 	mmc->f_max		= 52000000;  in sunxi_mmc_probe()
1396 	mmc->caps	       |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |  in sunxi_mmc_probe()
1406 	if ((host->cfg->clk_delays || host->use_new_timings) &&  in sunxi_mmc_probe()
1407 	    !of_device_is_compatible(pdev->dev.of_node,  in sunxi_mmc_probe()
1408 				     "allwinner,sun50i-h5-emmc"))  in sunxi_mmc_probe()
1409 		mmc->caps      |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;  in sunxi_mmc_probe()
1421 	if (!(host->cfg->clk_delays || host->use_new_timings)) {  in sunxi_mmc_probe()
1422 		mmc->caps &= ~(MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR |  in sunxi_mmc_probe()
1424 		mmc->caps2 &= ~MMC_CAP2_HS200;  in sunxi_mmc_probe()
1428 	mmc->caps2 &= ~MMC_CAP2_HS400;  in sunxi_mmc_probe()
1434 	pm_runtime_set_active(&pdev->dev);  in sunxi_mmc_probe()
1435 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);  in sunxi_mmc_probe()
1436 	pm_runtime_use_autosuspend(&pdev->dev);  in sunxi_mmc_probe()
1437 	pm_runtime_enable(&pdev->dev);  in sunxi_mmc_probe()
1443 	dev_info(&pdev->dev, "initialized, max. request size: %u KB%s\n",  in sunxi_mmc_probe()
1444 		 mmc->max_req_size >> 10,  in sunxi_mmc_probe()
1445 		 host->use_new_timings ? ", uses new timings mode" : "");  in sunxi_mmc_probe()
1450 	dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);  in sunxi_mmc_probe()
1462 	pm_runtime_force_suspend(&pdev->dev);  in sunxi_mmc_remove()
1463 	disable_irq(host->irq);  in sunxi_mmc_remove()
1465 	dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);  in sunxi_mmc_remove()
1483 	sunxi_mmc_set_bus_width(host, mmc->ios.bus_width);  in sunxi_mmc_runtime_resume()
1484 	sunxi_mmc_set_clk(host, &mmc->ios);  in sunxi_mmc_runtime_resume()
1485 	enable_irq(host->irq);  in sunxi_mmc_runtime_resume()
1500 	disable_irq(host->irq);  in sunxi_mmc_runtime_suspend()
1516 		.name	= "sunxi-mmc",
1529 MODULE_ALIAS("platform:sunxi-mmc");