Lines Matching +full:int +full:- +full:clock +full:- +full:stable +full:- +full:broken
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
34 #include <linux/mmc/slot-gpio.h>
41 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
44 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
48 static unsigned int debug_quirks = 0;
49 static unsigned int debug_quirks2;
74 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
77 SDHCI_DUMP("Timeout: 0x%08x | Int stat: 0x%08x\n", in sdhci_dumpregs()
80 SDHCI_DUMP("Int enab: 0x%08x | Sig enab: 0x%08x\n", in sdhci_dumpregs()
83 SDHCI_DUMP("ACmd stat: 0x%08x | Slot int: 0x%08x\n", in sdhci_dumpregs()
101 if (host->flags & SDHCI_USE_ADMA) { in sdhci_dumpregs()
102 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_dumpregs()
114 if (host->ops->dump_vendor_regs) in sdhci_dumpregs()
115 host->ops->dump_vendor_regs(host); in sdhci_dumpregs()
145 host->v4_mode = true; in sdhci_enable_v4_mode()
152 return cmd->data || cmd->flags & MMC_RSP_BUSY; in sdhci_data_line_cmd()
159 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || in sdhci_set_card_detection()
160 !mmc_card_is_removable(host->mmc) || mmc_can_gpio_cd(host->mmc)) in sdhci_set_card_detection()
167 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_set_card_detection()
170 host->ier &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_set_card_detection()
173 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
174 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
189 if (host->bus_on) in sdhci_runtime_pm_bus_on()
191 host->bus_on = true; in sdhci_runtime_pm_bus_on()
192 pm_runtime_get_noresume(host->mmc->parent); in sdhci_runtime_pm_bus_on()
197 if (!host->bus_on) in sdhci_runtime_pm_bus_off()
199 host->bus_on = false; in sdhci_runtime_pm_bus_off()
200 pm_runtime_put_noidle(host->mmc->parent); in sdhci_runtime_pm_bus_off()
210 host->clock = 0; in sdhci_reset()
211 /* Reset-all turns off SD Bus Power */ in sdhci_reset()
212 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_reset()
227 mmc_hostname(host->mmc), (int)mask); in sdhci_reset()
238 if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { in sdhci_do_reset()
239 struct mmc_host *mmc = host->mmc; in sdhci_do_reset()
241 if (!mmc->ops->get_cd(mmc)) in sdhci_do_reset()
245 host->ops->reset(host, mask); in sdhci_do_reset()
248 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_do_reset()
249 if (host->ops->enable_dma) in sdhci_do_reset()
250 host->ops->enable_dma(host); in sdhci_do_reset()
254 host->preset_enabled = false; in sdhci_do_reset()
260 host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_set_default_irqs()
266 if (host->tuning_mode == SDHCI_TUNING_MODE_2 || in sdhci_set_default_irqs()
267 host->tuning_mode == SDHCI_TUNING_MODE_3) in sdhci_set_default_irqs()
268 host->ier |= SDHCI_INT_RETUNE; in sdhci_set_default_irqs()
270 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
271 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
279 if (host->version < SDHCI_SPEC_200) in sdhci_config_dma()
290 if (!(host->flags & SDHCI_REQ_USE_DMA)) in sdhci_config_dma()
294 if (host->flags & SDHCI_USE_ADMA) in sdhci_config_dma()
297 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_config_dma()
299 * If v4 mode, all supported DMA can be 64-bit addressing if in sdhci_config_dma()
300 * controller supports 64-bit system address, otherwise only in sdhci_config_dma()
301 * ADMA can support 64-bit addressing. in sdhci_config_dma()
303 if (host->v4_mode) { in sdhci_config_dma()
307 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_config_dma()
320 static void sdhci_init(struct sdhci_host *host, int soft) in sdhci_init()
322 struct mmc_host *mmc = host->mmc; in sdhci_init()
330 if (host->v4_mode) in sdhci_init()
333 spin_lock_irqsave(&host->lock, flags); in sdhci_init()
335 spin_unlock_irqrestore(&host->lock, flags); in sdhci_init()
337 host->cqe_on = false; in sdhci_init()
340 /* force clock reconfiguration */ in sdhci_init()
341 host->clock = 0; in sdhci_init()
342 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
348 u32 cd = host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_reinit()
359 if (cd != (host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT))) in sdhci_reinit()
360 mmc_detect_change(host->mmc, msecs_to_jiffies(200)); in sdhci_reinit()
367 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_activate()
379 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_deactivate()
394 spin_lock_irqsave(&host->lock, flags); in sdhci_led_control()
396 if (host->runtime_suspended) in sdhci_led_control()
404 spin_unlock_irqrestore(&host->lock, flags); in sdhci_led_control()
407 static int sdhci_led_register(struct sdhci_host *host) in sdhci_led_register()
409 struct mmc_host *mmc = host->mmc; in sdhci_led_register()
411 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_register()
414 snprintf(host->led_name, sizeof(host->led_name), in sdhci_led_register()
417 host->led.name = host->led_name; in sdhci_led_register()
418 host->led.brightness = LED_OFF; in sdhci_led_register()
419 host->led.default_trigger = mmc_hostname(mmc); in sdhci_led_register()
420 host->led.brightness_set = sdhci_led_control; in sdhci_led_register()
422 return led_classdev_register(mmc_dev(mmc), &host->led); in sdhci_led_register()
427 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_unregister()
430 led_classdev_unregister(&host->led); in sdhci_led_unregister()
443 static inline int sdhci_led_register(struct sdhci_host *host) in sdhci_led_register()
467 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_mod_timer()
468 mod_timer(&host->data_timer, timeout); in sdhci_mod_timer()
470 mod_timer(&host->timer, timeout); in sdhci_mod_timer()
475 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_del_timer()
476 del_timer(&host->data_timer); in sdhci_del_timer()
478 del_timer(&host->timer); in sdhci_del_timer()
483 return host->cmd || host->data_cmd; in sdhci_has_requests()
501 blksize = host->data->blksz; in sdhci_read_block_pio()
507 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_read_block_pio()
509 len = min(host->sg_miter.length, blksize); in sdhci_read_block_pio()
511 blksize -= len; in sdhci_read_block_pio()
512 host->sg_miter.consumed = len; in sdhci_read_block_pio()
514 buf = host->sg_miter.addr; in sdhci_read_block_pio()
526 chunk--; in sdhci_read_block_pio()
527 len--; in sdhci_read_block_pio()
531 sg_miter_stop(&host->sg_miter); in sdhci_read_block_pio()
545 blksize = host->data->blksz; in sdhci_write_block_pio()
552 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_write_block_pio()
554 len = min(host->sg_miter.length, blksize); in sdhci_write_block_pio()
556 blksize -= len; in sdhci_write_block_pio()
557 host->sg_miter.consumed = len; in sdhci_write_block_pio()
559 buf = host->sg_miter.addr; in sdhci_write_block_pio()
566 len--; in sdhci_write_block_pio()
576 sg_miter_stop(&host->sg_miter); in sdhci_write_block_pio()
585 if (host->blocks == 0) in sdhci_transfer_pio()
588 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
598 if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && in sdhci_transfer_pio()
599 (host->data->blocks == 1)) in sdhci_transfer_pio()
603 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) in sdhci_transfer_pio()
606 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
611 host->blocks--; in sdhci_transfer_pio()
612 if (host->blocks == 0) in sdhci_transfer_pio()
619 static int sdhci_pre_dma_transfer(struct sdhci_host *host, in sdhci_pre_dma_transfer()
620 struct mmc_data *data, int cookie) in sdhci_pre_dma_transfer()
622 int sg_count; in sdhci_pre_dma_transfer()
628 if (data->host_cookie == COOKIE_PRE_MAPPED) in sdhci_pre_dma_transfer()
629 return data->sg_count; in sdhci_pre_dma_transfer()
632 if (host->bounce_buffer) { in sdhci_pre_dma_transfer()
633 unsigned int length = data->blksz * data->blocks; in sdhci_pre_dma_transfer()
635 if (length > host->bounce_buffer_size) { in sdhci_pre_dma_transfer()
637 mmc_hostname(host->mmc), length, in sdhci_pre_dma_transfer()
638 host->bounce_buffer_size); in sdhci_pre_dma_transfer()
639 return -EIO; in sdhci_pre_dma_transfer()
643 if (host->ops->copy_to_bounce_buffer) { in sdhci_pre_dma_transfer()
644 host->ops->copy_to_bounce_buffer(host, in sdhci_pre_dma_transfer()
647 sg_copy_to_buffer(data->sg, data->sg_len, in sdhci_pre_dma_transfer()
648 host->bounce_buffer, length); in sdhci_pre_dma_transfer()
652 dma_sync_single_for_device(host->mmc->parent, in sdhci_pre_dma_transfer()
653 host->bounce_addr, in sdhci_pre_dma_transfer()
654 host->bounce_buffer_size, in sdhci_pre_dma_transfer()
660 sg_count = dma_map_sg(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
661 data->sg, data->sg_len, in sdhci_pre_dma_transfer()
666 return -ENOSPC; in sdhci_pre_dma_transfer()
668 data->sg_count = sg_count; in sdhci_pre_dma_transfer()
669 data->host_cookie = cookie; in sdhci_pre_dma_transfer()
677 return kmap_atomic(sg_page(sg)) + sg->offset; in sdhci_kmap_atomic()
687 dma_addr_t addr, int len, unsigned int cmd) in sdhci_adma_write_desc()
691 /* 32-bit and 64-bit descriptors have these members in same position */ in sdhci_adma_write_desc()
692 dma_desc->cmd = cpu_to_le16(cmd); in sdhci_adma_write_desc()
693 dma_desc->len = cpu_to_le16(len); in sdhci_adma_write_desc()
694 dma_desc->addr_lo = cpu_to_le32(lower_32_bits(addr)); in sdhci_adma_write_desc()
696 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_write_desc()
697 dma_desc->addr_hi = cpu_to_le32(upper_32_bits(addr)); in sdhci_adma_write_desc()
699 *desc += host->desc_sz; in sdhci_adma_write_desc()
705 int len, unsigned int cmd) in __sdhci_adma_write_desc()
707 if (host->ops->adma_write_desc) in __sdhci_adma_write_desc()
708 host->ops->adma_write_desc(host, desc, addr, len, cmd); in __sdhci_adma_write_desc()
717 /* 32-bit and 64-bit descriptors have 'cmd' in same position */ in sdhci_adma_mark_end()
718 dma_desc->cmd |= cpu_to_le16(ADMA2_END); in sdhci_adma_mark_end()
722 struct mmc_data *data, int sg_count) in sdhci_adma_table_pre()
729 int len, offset, i; in sdhci_adma_table_pre()
736 host->sg_count = sg_count; in sdhci_adma_table_pre()
738 desc = host->adma_table; in sdhci_adma_table_pre()
739 align = host->align_buffer; in sdhci_adma_table_pre()
741 align_addr = host->align_addr; in sdhci_adma_table_pre()
743 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_pre()
749 * be 32-bit aligned. If they aren't, then we use a bounce in sdhci_adma_table_pre()
753 offset = (SDHCI_ADMA2_ALIGN - (addr & SDHCI_ADMA2_MASK)) & in sdhci_adma_table_pre()
756 if (data->flags & MMC_DATA_WRITE) { in sdhci_adma_table_pre()
772 len -= offset; in sdhci_adma_table_pre()
786 WARN_ON((desc - host->adma_table) >= host->adma_table_sz); in sdhci_adma_table_pre()
789 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { in sdhci_adma_table_pre()
791 if (desc != host->adma_table) { in sdhci_adma_table_pre()
792 desc -= host->desc_sz; in sdhci_adma_table_pre()
796 /* Add a terminating entry - nop, end, valid */ in sdhci_adma_table_pre()
805 int i, size; in sdhci_adma_table_post()
810 if (data->flags & MMC_DATA_READ) { in sdhci_adma_table_post()
814 for_each_sg(data->sg, sg, host->sg_count, i) in sdhci_adma_table_post()
821 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, in sdhci_adma_table_post()
822 data->sg_len, DMA_FROM_DEVICE); in sdhci_adma_table_post()
824 align = host->align_buffer; in sdhci_adma_table_post()
826 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_post()
828 size = SDHCI_ADMA2_ALIGN - in sdhci_adma_table_post()
845 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_set_adma_addr()
851 if (host->bounce_buffer) in sdhci_sdma_address()
852 return host->bounce_addr; in sdhci_sdma_address()
854 return sg_dma_address(host->data->sg); in sdhci_sdma_address()
859 if (host->v4_mode) in sdhci_set_sdma_addr()
865 static unsigned int sdhci_target_timeout(struct sdhci_host *host, in sdhci_target_timeout()
869 unsigned int target_timeout; in sdhci_target_timeout()
873 target_timeout = cmd->busy_timeout * 1000; in sdhci_target_timeout()
875 target_timeout = DIV_ROUND_UP(data->timeout_ns, 1000); in sdhci_target_timeout()
876 if (host->clock && data->timeout_clks) { in sdhci_target_timeout()
880 * data->timeout_clks is in units of clock cycles. in sdhci_target_timeout()
881 * host->clock is in Hz. target_timeout is in us. in sdhci_target_timeout()
884 val = 1000000ULL * data->timeout_clks; in sdhci_target_timeout()
885 if (do_div(val, host->clock)) in sdhci_target_timeout()
897 struct mmc_data *data = cmd->data; in sdhci_calc_sw_timeout()
898 struct mmc_host *mmc = host->mmc; in sdhci_calc_sw_timeout()
899 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout()
900 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
901 unsigned int blksz; in sdhci_calc_sw_timeout()
902 unsigned int freq; in sdhci_calc_sw_timeout()
910 blksz = data->blksz; in sdhci_calc_sw_timeout()
911 freq = host->mmc->actual_clock ? : host->clock; in sdhci_calc_sw_timeout()
917 host->data_timeout = data->blocks * target_timeout + in sdhci_calc_sw_timeout()
920 host->data_timeout = target_timeout; in sdhci_calc_sw_timeout()
923 if (host->data_timeout) in sdhci_calc_sw_timeout()
924 host->data_timeout += MMC_CMD_TRANSFER_TIME; in sdhci_calc_sw_timeout()
939 * longer to time out, but that's much better than having a too-short in sdhci_calc_timeout()
942 if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) in sdhci_calc_timeout()
949 data = cmd->data; in sdhci_calc_timeout()
951 if (!data && !cmd->busy_timeout) in sdhci_calc_timeout()
959 * We do this in steps in order to fit inside a 32 bit int. in sdhci_calc_timeout()
963 * (2) host->timeout_clk < 2^16 in sdhci_calc_timeout()
968 current_timeout = (1 << 13) * 1000 / host->timeout_clk; in sdhci_calc_timeout()
977 if (!(host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT)) in sdhci_calc_timeout()
979 count, cmd->opcode); in sdhci_calc_timeout()
993 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_irqs()
994 host->ier = (host->ier & ~pio_irqs) | dma_irqs; in sdhci_set_transfer_irqs()
996 host->ier = (host->ier & ~dma_irqs) | pio_irqs; in sdhci_set_transfer_irqs()
998 if (host->flags & (SDHCI_AUTO_CMD23 | SDHCI_AUTO_CMD12)) in sdhci_set_transfer_irqs()
999 host->ier |= SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1001 host->ier &= ~SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1003 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1004 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs()
1010 host->ier |= SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1012 host->ier &= ~SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1013 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_data_timeout_irq()
1014 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_data_timeout_irq()
1024 host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT) { in __sdhci_set_timeout()
1027 } else if (!(host->ier & SDHCI_INT_DATA_TIMEOUT)) { in __sdhci_set_timeout()
1037 if (host->ops->set_timeout) in sdhci_set_timeout()
1038 host->ops->set_timeout(host, cmd); in sdhci_set_timeout()
1046 WARN_ON(host->data); in sdhci_initialize_data()
1049 BUG_ON(data->blksz * data->blocks > 524288); in sdhci_initialize_data()
1050 BUG_ON(data->blksz > host->mmc->max_blk_size); in sdhci_initialize_data()
1051 BUG_ON(data->blocks > 65535); in sdhci_initialize_data()
1053 host->data = data; in sdhci_initialize_data()
1054 host->data_early = 0; in sdhci_initialize_data()
1055 host->data->bytes_xfered = 0; in sdhci_initialize_data()
1063 SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), in sdhci_set_block_info()
1066 * For Version 4.10 onwards, if v4 mode is enabled, 32-bit Block Count in sdhci_set_block_info()
1067 * can be supported, in that case 16-bit block count register must be 0. in sdhci_set_block_info()
1069 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_set_block_info()
1070 (host->quirks2 & SDHCI_QUIRK2_USE_32BIT_BLK_CNT)) { in sdhci_set_block_info()
1073 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1075 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1081 struct mmc_data *data = cmd->data; in sdhci_prepare_data()
1085 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_prepare_data()
1087 unsigned int length_mask, offset_mask; in sdhci_prepare_data()
1088 int i; in sdhci_prepare_data()
1090 host->flags |= SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1101 if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1102 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) { in sdhci_prepare_data()
1112 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) in sdhci_prepare_data()
1114 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) in sdhci_prepare_data()
1119 for_each_sg(data->sg, sg, data->sg_len, i) { in sdhci_prepare_data()
1120 if (sg->length & length_mask) { in sdhci_prepare_data()
1122 sg->length); in sdhci_prepare_data()
1123 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1126 if (sg->offset & offset_mask) { in sdhci_prepare_data()
1128 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1135 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_prepare_data()
1136 int sg_cnt = sdhci_pre_dma_transfer(host, data, COOKIE_MAPPED); in sdhci_prepare_data()
1144 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1145 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1147 sdhci_set_adma_addr(host, host->adma_addr); in sdhci_prepare_data()
1156 if (!(host->flags & SDHCI_REQ_USE_DMA)) { in sdhci_prepare_data()
1157 int flags; in sdhci_prepare_data()
1160 if (host->data->flags & MMC_DATA_READ) in sdhci_prepare_data()
1164 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in sdhci_prepare_data()
1165 host->blocks = data->blocks; in sdhci_prepare_data()
1175 static int sdhci_external_dma_init(struct sdhci_host *host) in sdhci_external_dma_init()
1177 int ret = 0; in sdhci_external_dma_init()
1178 struct mmc_host *mmc = host->mmc; in sdhci_external_dma_init()
1180 host->tx_chan = dma_request_chan(mmc->parent, "tx"); in sdhci_external_dma_init()
1181 if (IS_ERR(host->tx_chan)) { in sdhci_external_dma_init()
1182 ret = PTR_ERR(host->tx_chan); in sdhci_external_dma_init()
1183 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1185 host->tx_chan = NULL; in sdhci_external_dma_init()
1189 host->rx_chan = dma_request_chan(mmc->parent, "rx"); in sdhci_external_dma_init()
1190 if (IS_ERR(host->rx_chan)) { in sdhci_external_dma_init()
1191 if (host->tx_chan) { in sdhci_external_dma_init()
1192 dma_release_channel(host->tx_chan); in sdhci_external_dma_init()
1193 host->tx_chan = NULL; in sdhci_external_dma_init()
1196 ret = PTR_ERR(host->rx_chan); in sdhci_external_dma_init()
1197 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1199 host->rx_chan = NULL; in sdhci_external_dma_init()
1208 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; in sdhci_external_dma_channel()
1211 static int sdhci_external_dma_setup(struct sdhci_host *host, in sdhci_external_dma_setup()
1214 int ret, i; in sdhci_external_dma_setup()
1217 struct mmc_data *data = cmd->data; in sdhci_external_dma_setup()
1221 int sg_cnt; in sdhci_external_dma_setup()
1223 if (!host->mapbase) in sdhci_external_dma_setup()
1224 return -EINVAL; in sdhci_external_dma_setup()
1226 cfg.src_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1227 cfg.dst_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1230 cfg.src_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1231 cfg.dst_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1234 for (i = 0; i < data->sg_len; i++) { in sdhci_external_dma_setup()
1235 if ((data->sg + i)->length % data->blksz) in sdhci_external_dma_setup()
1236 return -EINVAL; in sdhci_external_dma_setup()
1247 return -EINVAL; in sdhci_external_dma_setup()
1249 dir = data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; in sdhci_external_dma_setup()
1250 desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, dir, in sdhci_external_dma_setup()
1253 return -EINVAL; in sdhci_external_dma_setup()
1255 desc->callback = NULL; in sdhci_external_dma_setup()
1256 desc->callback_param = NULL; in sdhci_external_dma_setup()
1267 if (host->tx_chan) { in sdhci_external_dma_release()
1268 dma_release_channel(host->tx_chan); in sdhci_external_dma_release()
1269 host->tx_chan = NULL; in sdhci_external_dma_release()
1272 if (host->rx_chan) { in sdhci_external_dma_release()
1273 dma_release_channel(host->rx_chan); in sdhci_external_dma_release()
1274 host->rx_chan = NULL; in sdhci_external_dma_release()
1283 struct mmc_data *data = cmd->data; in __sdhci_external_dma_prepare_data()
1287 host->flags |= SDHCI_REQ_USE_DMA; in __sdhci_external_dma_prepare_data()
1301 mmc_hostname(host->mmc)); in sdhci_external_dma_prepare_data()
1311 if (!cmd->data) in sdhci_external_dma_pre_transfer()
1314 chan = sdhci_external_dma_channel(host, cmd->data); in sdhci_external_dma_pre_transfer()
1321 static inline int sdhci_external_dma_init(struct sdhci_host *host) in sdhci_external_dma_init()
1323 return -EOPNOTSUPP; in sdhci_external_dma_init()
1352 host->use_external_dma = en; in sdhci_switch_external_dma()
1359 return !mrq->sbc && (host->flags & SDHCI_AUTO_CMD12) && in sdhci_auto_cmd12()
1360 !mrq->cap_cmd_during_tfr; in sdhci_auto_cmd12()
1366 return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23); in sdhci_auto_cmd23()
1372 return mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23); in sdhci_manual_cmd23()
1379 bool use_cmd12 = sdhci_auto_cmd12(host, cmd->mrq) && in sdhci_auto_cmd_select()
1380 (cmd->opcode != SD_IO_RW_EXTENDED); in sdhci_auto_cmd_select()
1381 bool use_cmd23 = sdhci_auto_cmd23(host, cmd->mrq); in sdhci_auto_cmd_select()
1388 * here because some controllers (e.g sdhci-of-dwmshc) expect it. in sdhci_auto_cmd_select()
1390 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_auto_cmd_select()
1406 * on successful completion (so no Auto-CMD12). in sdhci_auto_cmd_select()
1418 struct mmc_data *data = cmd->data; in sdhci_set_transfer_mode()
1421 if (host->quirks2 & in sdhci_set_transfer_mode()
1424 if (cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200) in sdhci_set_transfer_mode()
1435 WARN_ON(!host->data); in sdhci_set_transfer_mode()
1437 if (!(host->quirks2 & SDHCI_QUIRK2_SUPPORT_SINGLE)) in sdhci_set_transfer_mode()
1440 if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { in sdhci_set_transfer_mode()
1443 if (sdhci_auto_cmd23(host, cmd->mrq)) in sdhci_set_transfer_mode()
1444 sdhci_writel(host, cmd->mrq->sbc->arg, SDHCI_ARGUMENT2); in sdhci_set_transfer_mode()
1447 if (data->flags & MMC_DATA_READ) in sdhci_set_transfer_mode()
1449 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_mode()
1457 return (!(host->flags & SDHCI_DEVICE_DEAD) && in sdhci_needs_reset()
1458 ((mrq->cmd && mrq->cmd->error) || in sdhci_needs_reset()
1459 (mrq->sbc && mrq->sbc->error) || in sdhci_needs_reset()
1460 (mrq->data && mrq->data->stop && mrq->data->stop->error) || in sdhci_needs_reset()
1461 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))); in sdhci_needs_reset()
1466 int i; in sdhci_set_mrq_done()
1469 if (host->mrqs_done[i] == mrq) { in sdhci_set_mrq_done()
1476 if (!host->mrqs_done[i]) { in sdhci_set_mrq_done()
1477 host->mrqs_done[i] = mrq; in sdhci_set_mrq_done()
1487 if (host->cmd && host->cmd->mrq == mrq) in __sdhci_finish_mrq()
1488 host->cmd = NULL; in __sdhci_finish_mrq()
1490 if (host->data_cmd && host->data_cmd->mrq == mrq) in __sdhci_finish_mrq()
1491 host->data_cmd = NULL; in __sdhci_finish_mrq()
1493 if (host->deferred_cmd && host->deferred_cmd->mrq == mrq) in __sdhci_finish_mrq()
1494 host->deferred_cmd = NULL; in __sdhci_finish_mrq()
1496 if (host->data && host->data->mrq == mrq) in __sdhci_finish_mrq()
1497 host->data = NULL; in __sdhci_finish_mrq()
1500 host->pending_reset = true; in __sdhci_finish_mrq()
1514 queue_work(host->complete_wq, &host->complete_work); in sdhci_finish_mrq()
1519 struct mmc_command *data_cmd = host->data_cmd; in __sdhci_finish_data()
1520 struct mmc_data *data = host->data; in __sdhci_finish_data()
1522 host->data = NULL; in __sdhci_finish_data()
1523 host->data_cmd = NULL; in __sdhci_finish_data()
1529 if (data->error) { in __sdhci_finish_data()
1530 if (!host->cmd || host->cmd == data_cmd) in __sdhci_finish_data()
1535 if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) == in __sdhci_finish_data()
1546 if (data->error) in __sdhci_finish_data()
1547 data->bytes_xfered = 0; in __sdhci_finish_data()
1549 data->bytes_xfered = data->blksz * data->blocks; in __sdhci_finish_data()
1552 * Need to send CMD12 if - in __sdhci_finish_data()
1553 * a) open-ended multiblock transfer not using auto CMD12 (no CMD23) in __sdhci_finish_data()
1556 if (data->stop && in __sdhci_finish_data()
1557 ((!data->mrq->sbc && !sdhci_auto_cmd12(host, data->mrq)) || in __sdhci_finish_data()
1558 data->error)) { in __sdhci_finish_data()
1564 if (data->mrq->cap_cmd_during_tfr) { in __sdhci_finish_data()
1565 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1568 host->cmd = NULL; in __sdhci_finish_data()
1569 if (!sdhci_send_command(host, data->stop)) { in __sdhci_finish_data()
1575 data->stop->error = -EIO; in __sdhci_finish_data()
1576 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1578 WARN_ON(host->deferred_cmd); in __sdhci_finish_data()
1579 host->deferred_cmd = data->stop; in __sdhci_finish_data()
1584 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1595 int flags; in sdhci_send_command()
1599 WARN_ON(host->cmd); in sdhci_send_command()
1602 cmd->error = 0; in sdhci_send_command()
1604 if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && in sdhci_send_command()
1605 cmd->opcode == MMC_STOP_TRANSMISSION) in sdhci_send_command()
1606 cmd->flags |= MMC_RSP_BUSY; in sdhci_send_command()
1614 if (cmd->mrq->data && (cmd == cmd->mrq->data->stop)) in sdhci_send_command()
1620 host->cmd = cmd; in sdhci_send_command()
1621 host->data_timeout = 0; in sdhci_send_command()
1623 WARN_ON(host->data_cmd); in sdhci_send_command()
1624 host->data_cmd = cmd; in sdhci_send_command()
1628 if (cmd->data) { in sdhci_send_command()
1629 if (host->use_external_dma) in sdhci_send_command()
1635 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); in sdhci_send_command()
1639 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { in sdhci_send_command()
1642 * This does not happen in practice because 136-bit response in sdhci_send_command()
1646 cmd->flags &= ~MMC_RSP_BUSY; in sdhci_send_command()
1649 if (!(cmd->flags & MMC_RSP_PRESENT)) in sdhci_send_command()
1651 else if (cmd->flags & MMC_RSP_136) in sdhci_send_command()
1653 else if (cmd->flags & MMC_RSP_BUSY) in sdhci_send_command()
1658 if (cmd->flags & MMC_RSP_CRC) in sdhci_send_command()
1660 if (cmd->flags & MMC_RSP_OPCODE) in sdhci_send_command()
1664 if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || in sdhci_send_command()
1665 cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) in sdhci_send_command()
1669 if (host->data_timeout) in sdhci_send_command()
1670 timeout += nsecs_to_jiffies(host->data_timeout); in sdhci_send_command()
1671 else if (!cmd->data && cmd->busy_timeout > 9000) in sdhci_send_command()
1672 timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; in sdhci_send_command()
1675 sdhci_mod_timer(host, cmd->mrq, timeout); in sdhci_send_command()
1677 if (host->use_external_dma) in sdhci_send_command()
1680 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); in sdhci_send_command()
1688 if (!present || host->flags & SDHCI_DEVICE_DEAD) { in sdhci_present_error()
1689 cmd->error = -ENOMEDIUM; in sdhci_present_error()
1699 __releases(host->lock) in sdhci_send_command_retry()
1700 __acquires(host->lock) in sdhci_send_command_retry()
1702 struct mmc_command *deferred_cmd = host->deferred_cmd; in sdhci_send_command_retry()
1703 int timeout = 10; /* Approx. 10 ms */ in sdhci_send_command_retry()
1707 if (!timeout--) { in sdhci_send_command_retry()
1709 mmc_hostname(host->mmc)); in sdhci_send_command_retry()
1711 cmd->error = -EIO; in sdhci_send_command_retry()
1715 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_command_retry()
1719 present = host->mmc->ops->get_cd(host->mmc); in sdhci_send_command_retry()
1721 spin_lock_irqsave(&host->lock, flags); in sdhci_send_command_retry()
1724 if (cmd == deferred_cmd && cmd != host->deferred_cmd) in sdhci_send_command_retry()
1731 if (cmd == host->deferred_cmd) in sdhci_send_command_retry()
1732 host->deferred_cmd = NULL; in sdhci_send_command_retry()
1739 int i, reg; in sdhci_read_rsp_136()
1742 reg = SDHCI_RESPONSE + (3 - i) * 4; in sdhci_read_rsp_136()
1743 cmd->resp[i] = sdhci_readl(host, reg); in sdhci_read_rsp_136()
1746 if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC) in sdhci_read_rsp_136()
1751 cmd->resp[i] <<= 8; in sdhci_read_rsp_136()
1753 cmd->resp[i] |= cmd->resp[i + 1] >> 24; in sdhci_read_rsp_136()
1759 struct mmc_command *cmd = host->cmd; in sdhci_finish_command()
1761 host->cmd = NULL; in sdhci_finish_command()
1763 if (cmd->flags & MMC_RSP_PRESENT) { in sdhci_finish_command()
1764 if (cmd->flags & MMC_RSP_136) { in sdhci_finish_command()
1767 cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_finish_command()
1771 if (cmd->mrq->cap_cmd_during_tfr && cmd == cmd->mrq->cmd) in sdhci_finish_command()
1772 mmc_command_done(host->mmc, cmd->mrq); in sdhci_finish_command()
1784 if (cmd->flags & MMC_RSP_BUSY) { in sdhci_finish_command()
1785 if (cmd->data) { in sdhci_finish_command()
1787 } else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && in sdhci_finish_command()
1788 cmd == host->data_cmd) { in sdhci_finish_command()
1795 if (cmd == cmd->mrq->sbc) { in sdhci_finish_command()
1796 if (!sdhci_send_command(host, cmd->mrq->cmd)) { in sdhci_finish_command()
1797 WARN_ON(host->deferred_cmd); in sdhci_finish_command()
1798 host->deferred_cmd = cmd->mrq->cmd; in sdhci_finish_command()
1803 if (host->data && host->data_early) in sdhci_finish_command()
1806 if (!cmd->data) in sdhci_finish_command()
1807 __sdhci_finish_mrq(host, cmd->mrq); in sdhci_finish_command()
1815 switch (host->timing) { in sdhci_get_preset_value()
1837 pr_warn("%s: Invalid UHS-I mode selected\n", in sdhci_get_preset_value()
1838 mmc_hostname(host->mmc)); in sdhci_get_preset_value()
1845 u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, in sdhci_calc_clk() argument
1846 unsigned int *actual_clock) in sdhci_calc_clk()
1848 int div = 0; /* Initialized for compiler warning */ in sdhci_calc_clk()
1849 int real_div = div, clk_mul = 1; in sdhci_calc_clk()
1853 if (host->version >= SDHCI_SPEC_300) { in sdhci_calc_clk()
1854 if (host->preset_enabled) { in sdhci_calc_clk()
1860 if (host->clk_mul && in sdhci_calc_clk()
1864 clk_mul = host->clk_mul; in sdhci_calc_clk()
1866 real_div = max_t(int, 1, div << 1); in sdhci_calc_clk()
1872 * Check if the Host Controller supports Programmable Clock in sdhci_calc_clk()
1875 if (host->clk_mul) { in sdhci_calc_clk()
1877 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1878 <= clock) in sdhci_calc_clk()
1881 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1883 * Set Programmable Clock Mode in the Clock in sdhci_calc_clk()
1888 clk_mul = host->clk_mul; in sdhci_calc_clk()
1889 div--; in sdhci_calc_clk()
1892 * Divisor can be too small to reach clock in sdhci_calc_clk()
1893 * speed requirement. Then use the base clock. in sdhci_calc_clk()
1899 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
1901 if (host->max_clk <= clock) in sdhci_calc_clk()
1906 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1912 if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) in sdhci_calc_clk()
1913 && !div && host->max_clk <= 25000000) in sdhci_calc_clk()
1919 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1928 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
1953 pr_err("%s: Internal clock never stabilised.\n", in sdhci_enable_clk()
1954 mmc_hostname(host->mmc)); in sdhci_enable_clk()
1961 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) { in sdhci_enable_clk()
1975 pr_err("%s: PLL clock never stabilised.\n", in sdhci_enable_clk()
1976 mmc_hostname(host->mmc)); in sdhci_enable_clk()
1989 void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) in sdhci_set_clock() argument
1993 host->mmc->actual_clock = 0; in sdhci_set_clock()
1997 if (clock == 0) in sdhci_set_clock()
2000 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_set_clock()
2008 struct mmc_host *mmc = host->mmc; in sdhci_set_power_reg()
2010 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_reg()
2045 mmc_hostname(host->mmc), vdd); in sdhci_set_power_noreg()
2050 if (host->pwr == pwr) in sdhci_set_power_noreg()
2053 host->pwr = pwr; in sdhci_set_power_noreg()
2057 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2064 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) in sdhci_set_power_noreg()
2072 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) in sdhci_set_power_noreg()
2079 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2084 * they can apply clock after applying power in sdhci_set_power_noreg()
2086 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) in sdhci_set_power_noreg()
2095 if (IS_ERR(host->mmc->supply.vmmc)) in sdhci_set_power()
2112 if (!IS_ERR(host->mmc->supply.vmmc)) { in sdhci_set_power_and_bus_voltage()
2113 struct mmc_host *mmc = host->mmc; in sdhci_set_power_and_bus_voltage()
2115 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_and_bus_voltage()
2135 present = mmc->ops->get_cd(mmc); in sdhci_request()
2137 spin_lock_irqsave(&host->lock, flags); in sdhci_request()
2141 if (sdhci_present_error(host, mrq->cmd, present)) in sdhci_request()
2144 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request()
2149 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2155 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2159 int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq) in sdhci_request_atomic()
2164 int ret = 0; in sdhci_request_atomic()
2166 spin_lock_irqsave(&host->lock, flags); in sdhci_request_atomic()
2168 if (sdhci_present_error(host, mrq->cmd, true)) { in sdhci_request_atomic()
2173 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request_atomic()
2179 * again in non-atomic context. So we should not finish this request in sdhci_request_atomic()
2183 ret = -EBUSY; in sdhci_request_atomic()
2188 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_atomic()
2193 void sdhci_set_bus_width(struct sdhci_host *host, int width) in sdhci_set_bus_width()
2202 if (host->mmc->caps & MMC_CAP_8_BIT_DATA) in sdhci_set_bus_width()
2233 ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */ in sdhci_set_uhs_signaling()
2243 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2246 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_set_ios()
2247 if (!IS_ERR(mmc->supply.vmmc) && in sdhci_set_ios()
2248 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2249 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sdhci_set_ios()
2257 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios()
2262 if (host->version >= SDHCI_SPEC_300 && in sdhci_set_ios()
2263 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios()
2264 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) in sdhci_set_ios()
2267 if (!ios->clock || ios->clock != host->clock) { in sdhci_set_ios()
2268 host->ops->set_clock(host, ios->clock); in sdhci_set_ios()
2269 host->clock = ios->clock; in sdhci_set_ios()
2271 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK && in sdhci_set_ios()
2272 host->clock) { in sdhci_set_ios()
2273 host->timeout_clk = host->mmc->actual_clock ? in sdhci_set_ios()
2274 host->mmc->actual_clock / 1000 : in sdhci_set_ios()
2275 host->clock / 1000; in sdhci_set_ios()
2276 host->mmc->max_busy_timeout = in sdhci_set_ios()
2277 host->ops->get_max_timeout_count ? in sdhci_set_ios()
2278 host->ops->get_max_timeout_count(host) : in sdhci_set_ios()
2280 host->mmc->max_busy_timeout /= host->timeout_clk; in sdhci_set_ios()
2284 if (host->ops->set_power) in sdhci_set_ios()
2285 host->ops->set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2287 sdhci_set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2289 if (host->ops->platform_send_init_74_clocks) in sdhci_set_ios()
2290 host->ops->platform_send_init_74_clocks(host, ios->power_mode); in sdhci_set_ios()
2292 host->ops->set_bus_width(host, ios->bus_width); in sdhci_set_ios()
2296 if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) { in sdhci_set_ios()
2297 if (ios->timing == MMC_TIMING_SD_HS || in sdhci_set_ios()
2298 ios->timing == MMC_TIMING_MMC_HS || in sdhci_set_ios()
2299 ios->timing == MMC_TIMING_MMC_HS400 || in sdhci_set_ios()
2300 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_set_ios()
2301 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
2302 ios->timing == MMC_TIMING_UHS_SDR50 || in sdhci_set_ios()
2303 ios->timing == MMC_TIMING_UHS_SDR104 || in sdhci_set_ios()
2304 ios->timing == MMC_TIMING_UHS_DDR50 || in sdhci_set_ios()
2305 ios->timing == MMC_TIMING_UHS_SDR25) in sdhci_set_ios()
2311 if (host->version >= SDHCI_SPEC_300) { in sdhci_set_ios()
2314 if (!host->preset_enabled) { in sdhci_set_ios()
2322 if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) in sdhci_set_ios()
2324 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_B) in sdhci_set_ios()
2326 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) in sdhci_set_ios()
2328 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_D) in sdhci_set_ios()
2341 * need to reset SD Clock Enable before changing High in sdhci_set_ios()
2342 * Speed Enable to avoid generating clock gliches. in sdhci_set_ios()
2345 /* Reset SD Clock Enable */ in sdhci_set_ios()
2352 /* Re-enable SD Clock */ in sdhci_set_ios()
2353 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2356 /* Reset SD Clock Enable */ in sdhci_set_ios()
2361 host->ops->set_uhs_signaling(host, ios->timing); in sdhci_set_ios()
2362 host->timing = ios->timing; in sdhci_set_ios()
2364 if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) && in sdhci_set_ios()
2365 ((ios->timing == MMC_TIMING_UHS_SDR12) || in sdhci_set_ios()
2366 (ios->timing == MMC_TIMING_UHS_SDR25) || in sdhci_set_ios()
2367 (ios->timing == MMC_TIMING_UHS_SDR50) || in sdhci_set_ios()
2368 (ios->timing == MMC_TIMING_UHS_SDR104) || in sdhci_set_ios()
2369 (ios->timing == MMC_TIMING_UHS_DDR50) || in sdhci_set_ios()
2370 (ios->timing == MMC_TIMING_MMC_DDR52))) { in sdhci_set_ios()
2375 ios->drv_type = FIELD_GET(SDHCI_PRESET_DRV_MASK, in sdhci_set_ios()
2379 /* Re-enable SD Clock */ in sdhci_set_ios()
2380 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2389 if (host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) in sdhci_set_ios()
2394 static int sdhci_get_cd(struct mmc_host *mmc) in sdhci_get_cd()
2397 int gpio_cd = mmc_gpio_get_cd(mmc); in sdhci_get_cd()
2399 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd()
2403 if (!mmc_card_is_removable(host->mmc)) in sdhci_get_cd()
2414 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) in sdhci_get_cd()
2421 static int sdhci_check_ro(struct sdhci_host *host) in sdhci_check_ro()
2424 int is_readonly; in sdhci_check_ro()
2426 spin_lock_irqsave(&host->lock, flags); in sdhci_check_ro()
2428 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_check_ro()
2430 else if (host->ops->get_ro) in sdhci_check_ro()
2431 is_readonly = host->ops->get_ro(host); in sdhci_check_ro()
2432 else if (mmc_can_gpio_ro(host->mmc)) in sdhci_check_ro()
2433 is_readonly = mmc_gpio_get_ro(host->mmc); in sdhci_check_ro()
2438 spin_unlock_irqrestore(&host->lock, flags); in sdhci_check_ro()
2440 /* This quirk needs to be replaced by a callback-function later */ in sdhci_check_ro()
2441 return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? in sdhci_check_ro()
2447 static int sdhci_get_ro(struct mmc_host *mmc) in sdhci_get_ro()
2450 int i, ro_count; in sdhci_get_ro()
2452 if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) in sdhci_get_ro()
2470 if (host->ops && host->ops->hw_reset) in sdhci_hw_reset()
2471 host->ops->hw_reset(host); in sdhci_hw_reset()
2474 static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable) in sdhci_enable_sdio_irq_nolock()
2476 if (!(host->flags & SDHCI_DEVICE_DEAD)) { in sdhci_enable_sdio_irq_nolock()
2478 host->ier |= SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2480 host->ier &= ~SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2482 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_enable_sdio_irq_nolock()
2483 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_enable_sdio_irq_nolock()
2487 void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) in sdhci_enable_sdio_irq()
2493 pm_runtime_get_noresume(host->mmc->parent); in sdhci_enable_sdio_irq()
2495 spin_lock_irqsave(&host->lock, flags); in sdhci_enable_sdio_irq()
2497 spin_unlock_irqrestore(&host->lock, flags); in sdhci_enable_sdio_irq()
2500 pm_runtime_put_noidle(host->mmc->parent); in sdhci_enable_sdio_irq()
2509 spin_lock_irqsave(&host->lock, flags); in sdhci_ack_sdio_irq()
2511 spin_unlock_irqrestore(&host->lock, flags); in sdhci_ack_sdio_irq()
2514 int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, in sdhci_start_signal_voltage_switch()
2519 int ret; in sdhci_start_signal_voltage_switch()
2525 if (host->version < SDHCI_SPEC_300) in sdhci_start_signal_voltage_switch()
2530 switch (ios->signal_voltage) { in sdhci_start_signal_voltage_switch()
2532 if (!(host->flags & SDHCI_SIGNALING_330)) in sdhci_start_signal_voltage_switch()
2533 return -EINVAL; in sdhci_start_signal_voltage_switch()
2538 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2543 return -EIO; in sdhci_start_signal_voltage_switch()
2549 /* 3.3V regulator output should be stable within 5 ms */ in sdhci_start_signal_voltage_switch()
2554 pr_warn("%s: 3.3V regulator output did not become stable\n", in sdhci_start_signal_voltage_switch()
2557 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2559 if (!(host->flags & SDHCI_SIGNALING_180)) in sdhci_start_signal_voltage_switch()
2560 return -EINVAL; in sdhci_start_signal_voltage_switch()
2561 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2566 return -EIO; in sdhci_start_signal_voltage_switch()
2578 if (host->ops->voltage_switch) in sdhci_start_signal_voltage_switch()
2579 host->ops->voltage_switch(host); in sdhci_start_signal_voltage_switch()
2581 /* 1.8V regulator output should be stable within 5 ms */ in sdhci_start_signal_voltage_switch()
2586 pr_warn("%s: 1.8V regulator output did not become stable\n", in sdhci_start_signal_voltage_switch()
2589 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2591 if (!(host->flags & SDHCI_SIGNALING_120)) in sdhci_start_signal_voltage_switch()
2592 return -EINVAL; in sdhci_start_signal_voltage_switch()
2593 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2598 return -EIO; in sdhci_start_signal_voltage_switch()
2609 static int sdhci_card_busy(struct mmc_host *mmc) in sdhci_card_busy()
2620 static int sdhci_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_prepare_hs400_tuning()
2625 spin_lock_irqsave(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2626 host->flags |= SDHCI_HS400_TUNING; in sdhci_prepare_hs400_tuning()
2627 spin_unlock_irqrestore(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2638 if (host->quirks2 & SDHCI_QUIRK2_TUNING_WORK_AROUND) in sdhci_start_tuning()
2659 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_end_tuning()
2660 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_end_tuning()
2684 mmc_abort_tuning(host->mmc, opcode); in sdhci_abort_tuning()
2691 * automatically) so mmc_send_tuning() will return -EIO. Also the tuning command
2697 struct mmc_host *mmc = host->mmc; in sdhci_send_tuning()
2701 u32 b = host->sdma_boundary; in sdhci_send_tuning()
2703 spin_lock_irqsave(&host->lock, flags); in sdhci_send_tuning()
2716 mmc->ios.bus_width == MMC_BUS_WIDTH_8) in sdhci_send_tuning()
2730 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2731 host->tuning_done = 0; in sdhci_send_tuning()
2735 host->cmd = NULL; in sdhci_send_tuning()
2739 host->tuning_done = 0; in sdhci_send_tuning()
2741 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2744 wait_event_timeout(host->buf_ready_int, (host->tuning_done == 1), in sdhci_send_tuning()
2750 static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode) in __sdhci_execute_tuning()
2752 int i; in __sdhci_execute_tuning()
2758 for (i = 0; i < host->tuning_loop_count; i++) { in __sdhci_execute_tuning()
2763 if (!host->tuning_done) { in __sdhci_execute_tuning()
2764 pr_debug("%s: Tuning timeout, falling back to fixed sampling clock\n", in __sdhci_execute_tuning()
2765 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2767 return -ETIMEDOUT; in __sdhci_execute_tuning()
2771 if (host->tuning_delay > 0) in __sdhci_execute_tuning()
2772 mdelay(host->tuning_delay); in __sdhci_execute_tuning()
2783 pr_info("%s: Tuning failed, falling back to fixed sampling clock\n", in __sdhci_execute_tuning()
2784 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2786 return -EAGAIN; in __sdhci_execute_tuning()
2789 int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) in sdhci_execute_tuning()
2792 int err = 0; in sdhci_execute_tuning()
2793 unsigned int tuning_count = 0; in sdhci_execute_tuning()
2796 hs400_tuning = host->flags & SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2798 if (host->tuning_mode == SDHCI_TUNING_MODE_1) in sdhci_execute_tuning()
2799 tuning_count = host->tuning_count; in sdhci_execute_tuning()
2808 switch (host->timing) { in sdhci_execute_tuning()
2811 err = -EINVAL; in sdhci_execute_tuning()
2816 * Periodic re-tuning for HS400 is not expected to be needed, so in sdhci_execute_tuning()
2828 if (host->flags & SDHCI_SDR50_NEEDS_TUNING) in sdhci_execute_tuning()
2836 if (host->ops->platform_execute_tuning) { in sdhci_execute_tuning()
2837 err = host->ops->platform_execute_tuning(host, opcode); in sdhci_execute_tuning()
2841 host->mmc->retune_period = tuning_count; in sdhci_execute_tuning()
2843 if (host->tuning_delay < 0) in sdhci_execute_tuning()
2844 host->tuning_delay = opcode == MMC_SEND_TUNING_BLOCK; in sdhci_execute_tuning()
2848 host->tuning_err = __sdhci_execute_tuning(host, opcode); in sdhci_execute_tuning()
2852 host->flags &= ~SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2861 if (host->version < SDHCI_SPEC_300) in sdhci_enable_preset_value()
2868 if (host->preset_enabled != enable) { in sdhci_enable_preset_value()
2879 host->flags |= SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2881 host->flags &= ~SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2883 host->preset_enabled = enable; in sdhci_enable_preset_value()
2888 int err) in sdhci_post_req()
2891 struct mmc_data *data = mrq->data; in sdhci_post_req()
2893 if (data->host_cookie != COOKIE_UNMAPPED) in sdhci_post_req()
2894 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in sdhci_post_req()
2897 data->host_cookie = COOKIE_UNMAPPED; in sdhci_post_req()
2904 mrq->data->host_cookie = COOKIE_UNMAPPED; in sdhci_pre_req()
2907 * No pre-mapping in the pre hook if we're using the bounce buffer, in sdhci_pre_req()
2911 if (host->flags & SDHCI_REQ_USE_DMA && !host->bounce_buffer) in sdhci_pre_req()
2912 sdhci_pre_dma_transfer(host, mrq->data, COOKIE_PRE_MAPPED); in sdhci_pre_req()
2915 static void sdhci_error_out_mrqs(struct sdhci_host *host, int err) in sdhci_error_out_mrqs()
2917 if (host->data_cmd) { in sdhci_error_out_mrqs()
2918 host->data_cmd->error = err; in sdhci_error_out_mrqs()
2919 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_error_out_mrqs()
2922 if (host->cmd) { in sdhci_error_out_mrqs()
2923 host->cmd->error = err; in sdhci_error_out_mrqs()
2924 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_error_out_mrqs()
2932 int present; in sdhci_card_event()
2935 if (host->ops->card_event) in sdhci_card_event()
2936 host->ops->card_event(host); in sdhci_card_event()
2938 present = mmc->ops->get_cd(mmc); in sdhci_card_event()
2940 spin_lock_irqsave(&host->lock, flags); in sdhci_card_event()
2945 mmc_hostname(host->mmc)); in sdhci_card_event()
2947 mmc_hostname(host->mmc)); in sdhci_card_event()
2952 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_card_event()
2955 spin_unlock_irqrestore(&host->lock, flags); in sdhci_card_event()
2985 int i; in sdhci_request_done()
2987 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
2990 mrq = host->mrqs_done[i]; in sdhci_request_done()
2996 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3005 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_request_done()
3006 struct mmc_data *data = mrq->data; in sdhci_request_done()
3008 if (host->use_external_dma && data && in sdhci_request_done()
3009 (mrq->cmd->error || data->error)) { in sdhci_request_done()
3012 host->mrqs_done[i] = NULL; in sdhci_request_done()
3013 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3015 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3019 if (data && data->host_cookie == COOKIE_MAPPED) { in sdhci_request_done()
3020 if (host->bounce_buffer) { in sdhci_request_done()
3026 unsigned int length = data->bytes_xfered; in sdhci_request_done()
3028 if (length > host->bounce_buffer_size) { in sdhci_request_done()
3030 mmc_hostname(host->mmc), in sdhci_request_done()
3031 host->bounce_buffer_size, in sdhci_request_done()
3032 data->bytes_xfered); in sdhci_request_done()
3034 length = host->bounce_buffer_size; in sdhci_request_done()
3037 host->mmc->parent, in sdhci_request_done()
3038 host->bounce_addr, in sdhci_request_done()
3039 host->bounce_buffer_size, in sdhci_request_done()
3041 sg_copy_from_buffer(data->sg, in sdhci_request_done()
3042 data->sg_len, in sdhci_request_done()
3043 host->bounce_buffer, in sdhci_request_done()
3048 host->mmc->parent, in sdhci_request_done()
3049 host->bounce_addr, in sdhci_request_done()
3050 host->bounce_buffer_size, in sdhci_request_done()
3055 dma_unmap_sg(mmc_dev(host->mmc), data->sg, in sdhci_request_done()
3056 data->sg_len, in sdhci_request_done()
3059 data->host_cookie = COOKIE_UNMAPPED; in sdhci_request_done()
3071 * also be in mrqs_done, otherwise host->cmd and host->data_cmd in sdhci_request_done()
3074 if (host->cmd || host->data_cmd) { in sdhci_request_done()
3075 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3080 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) in sdhci_request_done()
3082 host->ops->set_clock(host, host->clock); in sdhci_request_done()
3089 host->pending_reset = false; in sdhci_request_done()
3092 host->mrqs_done[i] = NULL; in sdhci_request_done()
3094 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3096 if (host->ops->request_done) in sdhci_request_done()
3097 host->ops->request_done(host, mrq); in sdhci_request_done()
3099 mmc_request_done(host->mmc, mrq); in sdhci_request_done()
3120 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_timer()
3122 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { in sdhci_timeout_timer()
3124 mmc_hostname(host->mmc)); in sdhci_timeout_timer()
3127 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_timer()
3128 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_timer()
3131 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_timer()
3141 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_data_timer()
3143 if (host->data || host->data_cmd || in sdhci_timeout_data_timer()
3144 (host->cmd && sdhci_data_line_cmd(host->cmd))) { in sdhci_timeout_data_timer()
3146 mmc_hostname(host->mmc)); in sdhci_timeout_data_timer()
3149 if (host->data) { in sdhci_timeout_data_timer()
3150 host->data->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3152 queue_work(host->complete_wq, &host->complete_work); in sdhci_timeout_data_timer()
3153 } else if (host->data_cmd) { in sdhci_timeout_data_timer()
3154 host->data_cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3155 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_timeout_data_timer()
3157 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3158 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_data_timer()
3162 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_data_timer()
3173 /* Handle auto-CMD12 error */ in sdhci_cmd_irq()
3174 if (intmask & SDHCI_INT_AUTO_CMD_ERR && host->data_cmd) { in sdhci_cmd_irq()
3175 struct mmc_request *mrq = host->data_cmd->mrq; in sdhci_cmd_irq()
3177 int data_err_bit = (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT) ? in sdhci_cmd_irq()
3181 /* Treat auto-CMD12 error the same as data error */ in sdhci_cmd_irq()
3182 if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { in sdhci_cmd_irq()
3188 if (!host->cmd) { in sdhci_cmd_irq()
3194 if (host->pending_reset) in sdhci_cmd_irq()
3197 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_cmd_irq()
3205 host->cmd->error = -ETIMEDOUT; in sdhci_cmd_irq()
3207 host->cmd->error = -EILSEQ; in sdhci_cmd_irq()
3210 if (host->cmd->data && in sdhci_cmd_irq()
3213 host->cmd = NULL; in sdhci_cmd_irq()
3218 __sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_cmd_irq()
3222 /* Handle auto-CMD23 error */ in sdhci_cmd_irq()
3224 struct mmc_request *mrq = host->cmd->mrq; in sdhci_cmd_irq()
3226 int err = (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT) ? in sdhci_cmd_irq()
3227 -ETIMEDOUT : in sdhci_cmd_irq()
3228 -EILSEQ; in sdhci_cmd_irq()
3230 if (mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) { in sdhci_cmd_irq()
3231 mrq->sbc->error = err; in sdhci_cmd_irq()
3243 void *desc = host->adma_table; in sdhci_adma_show_error()
3244 dma_addr_t dma = host->adma_addr; in sdhci_adma_show_error()
3251 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_show_error()
3254 le32_to_cpu(dma_desc->addr_hi), in sdhci_adma_show_error()
3255 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3256 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3257 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3261 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3262 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3263 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3265 desc += host->desc_sz; in sdhci_adma_show_error()
3266 dma += host->desc_sz; in sdhci_adma_show_error()
3268 if (dma_desc->cmd & cpu_to_le16(ADMA2_END)) in sdhci_adma_show_error()
3282 host->tuning_done = 1; in sdhci_data_irq()
3283 wake_up(&host->buf_ready_int); in sdhci_data_irq()
3288 if (!host->data) { in sdhci_data_irq()
3289 struct mmc_command *data_cmd = host->data_cmd; in sdhci_data_irq()
3296 if (data_cmd && (data_cmd->flags & MMC_RSP_BUSY)) { in sdhci_data_irq()
3298 host->data_cmd = NULL; in sdhci_data_irq()
3299 data_cmd->error = -ETIMEDOUT; in sdhci_data_irq()
3300 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3304 host->data_cmd = NULL; in sdhci_data_irq()
3306 * Some cards handle busy-end interrupt in sdhci_data_irq()
3310 if (host->cmd == data_cmd) in sdhci_data_irq()
3313 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3323 if (host->pending_reset) in sdhci_data_irq()
3327 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_data_irq()
3334 host->data->error = -ETIMEDOUT; in sdhci_data_irq()
3336 host->data->error = -EILSEQ; in sdhci_data_irq()
3340 host->data->error = -EILSEQ; in sdhci_data_irq()
3342 pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), in sdhci_data_irq()
3345 host->data->error = -EIO; in sdhci_data_irq()
3346 if (host->ops->adma_workaround) in sdhci_data_irq()
3347 host->ops->adma_workaround(host, intmask); in sdhci_data_irq()
3350 if (host->data->error) in sdhci_data_irq()
3369 dmanow = dmastart + host->data->bytes_xfered; in sdhci_data_irq()
3374 ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + in sdhci_data_irq()
3376 host->data->bytes_xfered = dmanow - dmastart; in sdhci_data_irq()
3378 &dmastart, host->data->bytes_xfered, &dmanow); in sdhci_data_irq()
3383 if (host->cmd == host->data_cmd) { in sdhci_data_irq()
3389 host->data_early = 1; in sdhci_data_irq()
3400 struct mmc_data *data = mrq->data; in sdhci_defer_done()
3402 return host->pending_reset || host->always_defer_done || in sdhci_defer_done()
3403 ((host->flags & SDHCI_REQ_USE_DMA) && data && in sdhci_defer_done()
3404 data->host_cookie == COOKIE_MAPPED); in sdhci_defer_done()
3407 static irqreturn_t sdhci_irq(int irq, void *dev_id) in sdhci_irq()
3413 int max_loops = 16; in sdhci_irq()
3414 int i; in sdhci_irq()
3416 spin_lock(&host->lock); in sdhci_irq()
3418 if (host->runtime_suspended) { in sdhci_irq()
3419 spin_unlock(&host->lock); in sdhci_irq()
3432 if (host->ops->irq) { in sdhci_irq()
3433 intmask = host->ops->irq(host, intmask); in sdhci_irq()
3458 host->ier &= ~(SDHCI_INT_CARD_INSERT | in sdhci_irq()
3460 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_irq()
3462 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_irq()
3463 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_irq()
3468 host->thread_isr |= intmask & (SDHCI_INT_CARD_INSERT | in sdhci_irq()
3481 mmc_hostname(host->mmc)); in sdhci_irq()
3484 mmc_retune_needed(host->mmc); in sdhci_irq()
3487 (host->ier & SDHCI_INT_CARD_INT)) { in sdhci_irq()
3489 sdio_signal_irq(host->mmc); in sdhci_irq()
3506 } while (intmask && --max_loops); in sdhci_irq()
3510 struct mmc_request *mrq = host->mrqs_done[i]; in sdhci_irq()
3519 host->mrqs_done[i] = NULL; in sdhci_irq()
3523 if (host->deferred_cmd) in sdhci_irq()
3526 spin_unlock(&host->lock); in sdhci_irq()
3533 if (host->ops->request_done) in sdhci_irq()
3534 host->ops->request_done(host, mrqs_done[i]); in sdhci_irq()
3536 mmc_request_done(host->mmc, mrqs_done[i]); in sdhci_irq()
3541 mmc_hostname(host->mmc), unexpected); in sdhci_irq()
3548 static irqreturn_t sdhci_thread_irq(int irq, void *dev_id) in sdhci_thread_irq()
3558 spin_lock_irqsave(&host->lock, flags); in sdhci_thread_irq()
3560 isr = host->thread_isr; in sdhci_thread_irq()
3561 host->thread_isr = 0; in sdhci_thread_irq()
3563 cmd = host->deferred_cmd; in sdhci_thread_irq()
3565 sdhci_finish_mrq(host, cmd->mrq); in sdhci_thread_irq()
3567 spin_unlock_irqrestore(&host->lock, flags); in sdhci_thread_irq()
3570 struct mmc_host *mmc = host->mmc; in sdhci_thread_irq()
3572 mmc->ops->card_event(mmc); in sdhci_thread_irq()
3589 return mmc_card_is_removable(host->mmc) && in sdhci_cd_irq_can_wakeup()
3590 !(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_cd_irq_can_wakeup()
3591 !mmc_can_gpio_cd(host->mmc); in sdhci_cd_irq_can_wakeup()
3596 * the Interrupt Status Enable register too. See 'Table 1-6: Wakeup Signal
3615 if (mmc_card_wake_sdio_irq(host->mmc)) { in sdhci_enable_irq_wakeups()
3630 host->irq_wake_enabled = !enable_irq_wake(host->irq); in sdhci_enable_irq_wakeups()
3632 return host->irq_wake_enabled; in sdhci_enable_irq_wakeups()
3645 disable_irq_wake(host->irq); in sdhci_disable_irq_wakeups()
3647 host->irq_wake_enabled = false; in sdhci_disable_irq_wakeups()
3650 int sdhci_suspend_host(struct sdhci_host *host) in sdhci_suspend_host()
3654 mmc_retune_timer_stop(host->mmc); in sdhci_suspend_host()
3656 if (!device_may_wakeup(mmc_dev(host->mmc)) || in sdhci_suspend_host()
3658 host->ier = 0; in sdhci_suspend_host()
3661 free_irq(host->irq, host); in sdhci_suspend_host()
3669 int sdhci_resume_host(struct sdhci_host *host) in sdhci_resume_host()
3671 struct mmc_host *mmc = host->mmc; in sdhci_resume_host()
3672 int ret = 0; in sdhci_resume_host()
3674 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_resume_host()
3675 if (host->ops->enable_dma) in sdhci_resume_host()
3676 host->ops->enable_dma(host); in sdhci_resume_host()
3679 if ((host->mmc->pm_flags & MMC_PM_KEEP_POWER) && in sdhci_resume_host()
3680 (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { in sdhci_resume_host()
3683 host->pwr = 0; in sdhci_resume_host()
3684 host->clock = 0; in sdhci_resume_host()
3685 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_resume_host()
3687 sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); in sdhci_resume_host()
3690 if (host->irq_wake_enabled) { in sdhci_resume_host()
3693 ret = request_threaded_irq(host->irq, sdhci_irq, in sdhci_resume_host()
3695 mmc_hostname(host->mmc), host); in sdhci_resume_host()
3707 int sdhci_runtime_suspend_host(struct sdhci_host *host) in sdhci_runtime_suspend_host()
3711 mmc_retune_timer_stop(host->mmc); in sdhci_runtime_suspend_host()
3713 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3714 host->ier &= SDHCI_INT_CARD_INT; in sdhci_runtime_suspend_host()
3715 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_runtime_suspend_host()
3716 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_runtime_suspend_host()
3717 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3719 synchronize_hardirq(host->irq); in sdhci_runtime_suspend_host()
3721 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3722 host->runtime_suspended = true; in sdhci_runtime_suspend_host()
3723 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3729 int sdhci_runtime_resume_host(struct sdhci_host *host, int soft_reset) in sdhci_runtime_resume_host()
3731 struct mmc_host *mmc = host->mmc; in sdhci_runtime_resume_host()
3733 int host_flags = host->flags; in sdhci_runtime_resume_host()
3736 if (host->ops->enable_dma) in sdhci_runtime_resume_host()
3737 host->ops->enable_dma(host); in sdhci_runtime_resume_host()
3742 if (mmc->ios.power_mode != MMC_POWER_UNDEFINED && in sdhci_runtime_resume_host()
3743 mmc->ios.power_mode != MMC_POWER_OFF) { in sdhci_runtime_resume_host()
3744 /* Force clock and power re-program */ in sdhci_runtime_resume_host()
3745 host->pwr = 0; in sdhci_runtime_resume_host()
3746 host->clock = 0; in sdhci_runtime_resume_host()
3747 mmc->ops->start_signal_voltage_switch(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3748 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3751 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { in sdhci_runtime_resume_host()
3752 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3754 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3757 if ((mmc->caps2 & MMC_CAP2_HS400_ES) && in sdhci_runtime_resume_host()
3758 mmc->ops->hs400_enhanced_strobe) in sdhci_runtime_resume_host()
3759 mmc->ops->hs400_enhanced_strobe(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3762 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3764 host->runtime_suspended = false; in sdhci_runtime_resume_host()
3773 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3793 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_enable()
3802 if (host->v4_mode && (host->caps1 & SDHCI_CAN_DO_ADMA3)) in sdhci_cqe_enable()
3804 else if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_cqe_enable()
3810 sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, 512), in sdhci_cqe_enable()
3816 host->ier = host->cqe_ier; in sdhci_cqe_enable()
3818 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_cqe_enable()
3819 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_cqe_enable()
3821 host->cqe_on = true; in sdhci_cqe_enable()
3824 mmc_hostname(mmc), host->ier, in sdhci_cqe_enable()
3827 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_enable()
3836 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_disable()
3840 host->cqe_on = false; in sdhci_cqe_disable()
3848 mmc_hostname(mmc), host->ier, in sdhci_cqe_disable()
3851 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_disable()
3855 bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error, in sdhci_cqe_irq()
3856 int *data_error) in sdhci_cqe_irq()
3860 if (!host->cqe_on) in sdhci_cqe_irq()
3864 *cmd_error = -EILSEQ; in sdhci_cqe_irq()
3866 *cmd_error = -ETIMEDOUT; in sdhci_cqe_irq()
3871 *data_error = -EILSEQ; in sdhci_cqe_irq()
3873 *data_error = -ETIMEDOUT; in sdhci_cqe_irq()
3875 *data_error = -EIO; in sdhci_cqe_irq()
3880 mask = intmask & host->cqe_ier; in sdhci_cqe_irq()
3885 mmc_hostname(host->mmc)); in sdhci_cqe_irq()
3887 intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR); in sdhci_cqe_irq()
3891 mmc_hostname(host->mmc), intmask); in sdhci_cqe_irq()
3915 return ERR_PTR(-ENOMEM); in sdhci_alloc_host()
3918 host->mmc = mmc; in sdhci_alloc_host()
3919 host->mmc_host_ops = sdhci_ops; in sdhci_alloc_host()
3920 mmc->ops = &host->mmc_host_ops; in sdhci_alloc_host()
3922 host->flags = SDHCI_SIGNALING_330; in sdhci_alloc_host()
3924 host->cqe_ier = SDHCI_CQE_INT_MASK; in sdhci_alloc_host()
3925 host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK; in sdhci_alloc_host()
3927 host->tuning_delay = -1; in sdhci_alloc_host()
3928 host->tuning_loop_count = MAX_TUNING_LOOP; in sdhci_alloc_host()
3930 host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG; in sdhci_alloc_host()
3937 host->adma_table_cnt = SDHCI_MAX_SEGS * 2 + 1; in sdhci_alloc_host()
3944 static int sdhci_set_dma_mask(struct sdhci_host *host) in sdhci_set_dma_mask()
3946 struct mmc_host *mmc = host->mmc; in sdhci_set_dma_mask()
3948 int ret = -EINVAL; in sdhci_set_dma_mask()
3950 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) in sdhci_set_dma_mask()
3951 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
3953 /* Try 64-bit mask if hardware is capable of it */ in sdhci_set_dma_mask()
3954 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_set_dma_mask()
3957 pr_warn("%s: Failed to set 64-bit DMA mask.\n", in sdhci_set_dma_mask()
3959 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
3963 /* 32-bit mask as default & fallback */ in sdhci_set_dma_mask()
3967 pr_warn("%s: Failed to set 32-bit DMA mask.\n", in sdhci_set_dma_mask()
3981 if (host->read_caps) in __sdhci_read_caps()
3984 host->read_caps = true; in __sdhci_read_caps()
3987 host->quirks = debug_quirks; in __sdhci_read_caps()
3990 host->quirks2 = debug_quirks2; in __sdhci_read_caps()
3994 if (host->v4_mode) in __sdhci_read_caps()
3997 of_property_read_u64(mmc_dev(host->mmc)->of_node, in __sdhci_read_caps()
3998 "sdhci-caps-mask", &dt_caps_mask); in __sdhci_read_caps()
3999 of_property_read_u64(mmc_dev(host->mmc)->of_node, in __sdhci_read_caps()
4000 "sdhci-caps", &dt_caps); in __sdhci_read_caps()
4003 host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; in __sdhci_read_caps()
4005 if (host->quirks & SDHCI_QUIRK_MISSING_CAPS) in __sdhci_read_caps()
4009 host->caps = *caps; in __sdhci_read_caps()
4011 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in __sdhci_read_caps()
4012 host->caps &= ~lower_32_bits(dt_caps_mask); in __sdhci_read_caps()
4013 host->caps |= lower_32_bits(dt_caps); in __sdhci_read_caps()
4016 if (host->version < SDHCI_SPEC_300) in __sdhci_read_caps()
4020 host->caps1 = *caps1; in __sdhci_read_caps()
4022 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in __sdhci_read_caps()
4023 host->caps1 &= ~upper_32_bits(dt_caps_mask); in __sdhci_read_caps()
4024 host->caps1 |= upper_32_bits(dt_caps); in __sdhci_read_caps()
4031 struct mmc_host *mmc = host->mmc; in sdhci_allocate_bounce_buffer()
4032 unsigned int max_blocks; in sdhci_allocate_bounce_buffer()
4033 unsigned int bounce_size; in sdhci_allocate_bounce_buffer()
4034 int ret; in sdhci_allocate_bounce_buffer()
4047 if (mmc->max_req_size < bounce_size) in sdhci_allocate_bounce_buffer()
4048 bounce_size = mmc->max_req_size; in sdhci_allocate_bounce_buffer()
4056 host->bounce_buffer = devm_kmalloc(mmc->parent, in sdhci_allocate_bounce_buffer()
4059 if (!host->bounce_buffer) { in sdhci_allocate_bounce_buffer()
4065 * mmc->max_segs == 1. in sdhci_allocate_bounce_buffer()
4070 host->bounce_addr = dma_map_single(mmc->parent, in sdhci_allocate_bounce_buffer()
4071 host->bounce_buffer, in sdhci_allocate_bounce_buffer()
4074 ret = dma_mapping_error(mmc->parent, host->bounce_addr); in sdhci_allocate_bounce_buffer()
4078 host->bounce_buffer_size = bounce_size; in sdhci_allocate_bounce_buffer()
4081 mmc->max_segs = max_blocks; in sdhci_allocate_bounce_buffer()
4082 mmc->max_seg_size = bounce_size; in sdhci_allocate_bounce_buffer()
4083 mmc->max_req_size = bounce_size; in sdhci_allocate_bounce_buffer()
4093 * version 4.10 in Capabilities Register is used as 64-bit System in sdhci_can_64bit_dma()
4096 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) in sdhci_can_64bit_dma()
4097 return host->caps & SDHCI_CAN_64BIT_V4; in sdhci_can_64bit_dma()
4099 return host->caps & SDHCI_CAN_64BIT; in sdhci_can_64bit_dma()
4102 int sdhci_setup_host(struct sdhci_host *host) in sdhci_setup_host()
4106 unsigned int ocr_avail; in sdhci_setup_host()
4107 unsigned int override_timeout_clk; in sdhci_setup_host()
4109 int ret = 0; in sdhci_setup_host()
4114 return -EINVAL; in sdhci_setup_host()
4116 mmc = host->mmc; in sdhci_setup_host()
4124 if (!mmc->supply.vqmmc) { in sdhci_setup_host()
4140 override_timeout_clk = host->timeout_clk; in sdhci_setup_host()
4142 if (host->version > SDHCI_SPEC_420) { in sdhci_setup_host()
4144 mmc_hostname(mmc), host->version); in sdhci_setup_host()
4147 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) in sdhci_setup_host()
4148 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4149 else if (!(host->caps & SDHCI_CAN_DO_SDMA)) in sdhci_setup_host()
4152 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4154 if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && in sdhci_setup_host()
4155 (host->flags & SDHCI_USE_SDMA)) { in sdhci_setup_host()
4156 DBG("Disabling DMA as it is marked broken\n"); in sdhci_setup_host()
4157 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4160 if ((host->version >= SDHCI_SPEC_200) && in sdhci_setup_host()
4161 (host->caps & SDHCI_CAN_DO_ADMA2)) in sdhci_setup_host()
4162 host->flags |= SDHCI_USE_ADMA; in sdhci_setup_host()
4164 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && in sdhci_setup_host()
4165 (host->flags & SDHCI_USE_ADMA)) { in sdhci_setup_host()
4166 DBG("Disabling ADMA as it is marked broken\n"); in sdhci_setup_host()
4167 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4171 host->flags |= SDHCI_USE_64_BIT_DMA; in sdhci_setup_host()
4173 if (host->use_external_dma) { in sdhci_setup_host()
4175 if (ret == -EPROBE_DEFER) in sdhci_setup_host()
4185 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4188 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_setup_host()
4189 if (host->ops->set_dma_mask) in sdhci_setup_host()
4190 ret = host->ops->set_dma_mask(host); in sdhci_setup_host()
4194 if (!ret && host->ops->enable_dma) in sdhci_setup_host()
4195 ret = host->ops->enable_dma(host); in sdhci_setup_host()
4198 pr_warn("%s: No suitable DMA available - falling back to PIO\n", in sdhci_setup_host()
4200 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4206 /* SDMA does not support 64-bit DMA if v4 mode not set */ in sdhci_setup_host()
4207 if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) in sdhci_setup_host()
4208 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4210 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4214 if (!(host->flags & SDHCI_USE_64_BIT_DMA)) in sdhci_setup_host()
4215 host->alloc_desc_sz = SDHCI_ADMA2_32_DESC_SZ; in sdhci_setup_host()
4216 else if (!host->alloc_desc_sz) in sdhci_setup_host()
4217 host->alloc_desc_sz = SDHCI_ADMA2_64_DESC_SZ(host); in sdhci_setup_host()
4219 host->desc_sz = host->alloc_desc_sz; in sdhci_setup_host()
4220 host->adma_table_sz = host->adma_table_cnt * host->desc_sz; in sdhci_setup_host()
4222 host->align_buffer_sz = SDHCI_MAX_SEGS * SDHCI_ADMA2_ALIGN; in sdhci_setup_host()
4224 * Use zalloc to zero the reserved high 32-bits of 128-bit in sdhci_setup_host()
4228 host->align_buffer_sz + host->adma_table_sz, in sdhci_setup_host()
4231 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", in sdhci_setup_host()
4233 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4234 } else if ((dma + host->align_buffer_sz) & in sdhci_setup_host()
4235 (SDHCI_ADMA2_DESC_ALIGN - 1)) { in sdhci_setup_host()
4238 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4239 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4240 host->adma_table_sz, buf, dma); in sdhci_setup_host()
4242 host->align_buffer = buf; in sdhci_setup_host()
4243 host->align_addr = dma; in sdhci_setup_host()
4245 host->adma_table = buf + host->align_buffer_sz; in sdhci_setup_host()
4246 host->adma_addr = dma + host->align_buffer_sz; in sdhci_setup_host()
4255 if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { in sdhci_setup_host()
4256 host->dma_mask = DMA_BIT_MASK(64); in sdhci_setup_host()
4257 mmc_dev(mmc)->dma_mask = &host->dma_mask; in sdhci_setup_host()
4260 if (host->version >= SDHCI_SPEC_300) in sdhci_setup_host()
4261 host->max_clk = FIELD_GET(SDHCI_CLOCK_V3_BASE_MASK, host->caps); in sdhci_setup_host()
4263 host->max_clk = FIELD_GET(SDHCI_CLOCK_BASE_MASK, host->caps); in sdhci_setup_host()
4265 host->max_clk *= 1000000; in sdhci_setup_host()
4266 if (host->max_clk == 0 || host->quirks & in sdhci_setup_host()
4268 if (!host->ops->get_max_clock) { in sdhci_setup_host()
4269 pr_err("%s: Hardware doesn't specify base clock frequency.\n", in sdhci_setup_host()
4271 ret = -ENODEV; in sdhci_setup_host()
4274 host->max_clk = host->ops->get_max_clock(host); in sdhci_setup_host()
4278 * In case of Host Controller v3.00, find out whether clock in sdhci_setup_host()
4281 host->clk_mul = FIELD_GET(SDHCI_CLOCK_MUL_MASK, host->caps1); in sdhci_setup_host()
4284 * In case the value in Clock Multiplier is 0, then programmable in sdhci_setup_host()
4285 * clock mode is not supported, otherwise the actual clock in sdhci_setup_host()
4286 * multiplier is one more than the value of Clock Multiplier in sdhci_setup_host()
4289 if (host->clk_mul) in sdhci_setup_host()
4290 host->clk_mul += 1; in sdhci_setup_host()
4295 max_clk = host->max_clk; in sdhci_setup_host()
4297 if (host->ops->get_min_clock) in sdhci_setup_host()
4298 mmc->f_min = host->ops->get_min_clock(host); in sdhci_setup_host()
4299 else if (host->version >= SDHCI_SPEC_300) { in sdhci_setup_host()
4300 if (host->clk_mul) in sdhci_setup_host()
4301 max_clk = host->max_clk * host->clk_mul; in sdhci_setup_host()
4303 * Divided Clock Mode minimum clock rate is always less than in sdhci_setup_host()
4304 * Programmable Clock Mode minimum clock rate. in sdhci_setup_host()
4306 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; in sdhci_setup_host()
4308 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; in sdhci_setup_host()
4310 if (!mmc->f_max || mmc->f_max > max_clk) in sdhci_setup_host()
4311 mmc->f_max = max_clk; in sdhci_setup_host()
4313 if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { in sdhci_setup_host()
4314 host->timeout_clk = FIELD_GET(SDHCI_TIMEOUT_CLK_MASK, host->caps); in sdhci_setup_host()
4316 if (host->caps & SDHCI_TIMEOUT_CLK_UNIT) in sdhci_setup_host()
4317 host->timeout_clk *= 1000; in sdhci_setup_host()
4319 if (host->timeout_clk == 0) { in sdhci_setup_host()
4320 if (!host->ops->get_timeout_clock) { in sdhci_setup_host()
4321 pr_err("%s: Hardware doesn't specify timeout clock frequency.\n", in sdhci_setup_host()
4323 ret = -ENODEV; in sdhci_setup_host()
4327 host->timeout_clk = in sdhci_setup_host()
4328 DIV_ROUND_UP(host->ops->get_timeout_clock(host), in sdhci_setup_host()
4333 host->timeout_clk = override_timeout_clk; in sdhci_setup_host()
4335 mmc->max_busy_timeout = host->ops->get_max_timeout_count ? in sdhci_setup_host()
4336 host->ops->get_max_timeout_count(host) : 1 << 27; in sdhci_setup_host()
4337 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_setup_host()
4340 if (host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT && in sdhci_setup_host()
4341 !host->ops->get_max_timeout_count) in sdhci_setup_host()
4342 mmc->max_busy_timeout = 0; in sdhci_setup_host()
4344 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23; in sdhci_setup_host()
4345 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in sdhci_setup_host()
4347 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) in sdhci_setup_host()
4348 host->flags |= SDHCI_AUTO_CMD12; in sdhci_setup_host()
4351 * For v3 mode, Auto-CMD23 stuff only works in ADMA or PIO. in sdhci_setup_host()
4352 * For v4 mode, SDMA may use Auto-CMD23 as well. in sdhci_setup_host()
4354 if ((host->version >= SDHCI_SPEC_300) && in sdhci_setup_host()
4355 ((host->flags & SDHCI_USE_ADMA) || in sdhci_setup_host()
4356 !(host->flags & SDHCI_USE_SDMA) || host->v4_mode) && in sdhci_setup_host()
4357 !(host->quirks2 & SDHCI_QUIRK2_ACMD23_BROKEN)) { in sdhci_setup_host()
4358 host->flags |= SDHCI_AUTO_CMD23; in sdhci_setup_host()
4359 DBG("Auto-CMD23 available\n"); in sdhci_setup_host()
4361 DBG("Auto-CMD23 unavailable\n"); in sdhci_setup_host()
4365 * A controller may support 8-bit width, but the board itself in sdhci_setup_host()
4367 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in in sdhci_setup_host()
4369 * won't assume 8-bit width for hosts without that CAP. in sdhci_setup_host()
4371 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) in sdhci_setup_host()
4372 mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_setup_host()
4374 if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) in sdhci_setup_host()
4375 mmc->caps &= ~MMC_CAP_CMD23; in sdhci_setup_host()
4377 if (host->caps & SDHCI_CAN_DO_HISPD) in sdhci_setup_host()
4378 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; in sdhci_setup_host()
4380 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_setup_host()
4382 mmc_gpio_get_cd(host->mmc) < 0) in sdhci_setup_host()
4383 mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_setup_host()
4385 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_setup_host()
4387 ret = regulator_enable(mmc->supply.vqmmc); in sdhci_setup_host()
4388 host->sdhci_core_to_disable_vqmmc = !ret; in sdhci_setup_host()
4392 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000, in sdhci_setup_host()
4394 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | in sdhci_setup_host()
4399 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 2700000, in sdhci_setup_host()
4401 host->flags &= ~SDHCI_SIGNALING_330; in sdhci_setup_host()
4406 mmc->supply.vqmmc = ERR_PTR(-EINVAL); in sdhci_setup_host()
4411 if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { in sdhci_setup_host()
4412 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4416 * (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), in sdhci_setup_host()
4422 mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES); in sdhci_setup_host()
4423 mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS); in sdhci_setup_host()
4426 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ in sdhci_setup_host()
4427 if (host->caps1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4429 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; in sdhci_setup_host()
4432 if (host->caps1 & SDHCI_SUPPORT_SDR104) { in sdhci_setup_host()
4433 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4437 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) in sdhci_setup_host()
4438 mmc->caps2 |= MMC_CAP2_HS200; in sdhci_setup_host()
4439 } else if (host->caps1 & SDHCI_SUPPORT_SDR50) { in sdhci_setup_host()
4440 mmc->caps |= MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4443 if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 && in sdhci_setup_host()
4444 (host->caps1 & SDHCI_SUPPORT_HS400)) in sdhci_setup_host()
4445 mmc->caps2 |= MMC_CAP2_HS400; in sdhci_setup_host()
4447 if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) && in sdhci_setup_host()
4448 (IS_ERR(mmc->supply.vqmmc) || in sdhci_setup_host()
4449 !regulator_is_supported_voltage(mmc->supply.vqmmc, 1100000, in sdhci_setup_host()
4451 mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V; in sdhci_setup_host()
4453 if ((host->caps1 & SDHCI_SUPPORT_DDR50) && in sdhci_setup_host()
4454 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) in sdhci_setup_host()
4455 mmc->caps |= MMC_CAP_UHS_DDR50; in sdhci_setup_host()
4458 if (host->caps1 & SDHCI_USE_SDR50_TUNING) in sdhci_setup_host()
4459 host->flags |= SDHCI_SDR50_NEEDS_TUNING; in sdhci_setup_host()
4462 if (host->caps1 & SDHCI_DRIVER_TYPE_A) in sdhci_setup_host()
4463 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; in sdhci_setup_host()
4464 if (host->caps1 & SDHCI_DRIVER_TYPE_C) in sdhci_setup_host()
4465 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; in sdhci_setup_host()
4466 if (host->caps1 & SDHCI_DRIVER_TYPE_D) in sdhci_setup_host()
4467 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; in sdhci_setup_host()
4469 /* Initial value for re-tuning timer count */ in sdhci_setup_host()
4470 host->tuning_count = FIELD_GET(SDHCI_RETUNING_TIMER_COUNT_MASK, in sdhci_setup_host()
4471 host->caps1); in sdhci_setup_host()
4474 * In case Re-tuning Timer is not disabled, the actual value of in sdhci_setup_host()
4475 * re-tuning timer will be 2 ^ (n - 1). in sdhci_setup_host()
4477 if (host->tuning_count) in sdhci_setup_host()
4478 host->tuning_count = 1 << (host->tuning_count - 1); in sdhci_setup_host()
4480 /* Re-tuning mode supported by the Host Controller */ in sdhci_setup_host()
4481 host->tuning_mode = FIELD_GET(SDHCI_RETUNING_MODE_MASK, host->caps1); in sdhci_setup_host()
4493 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { in sdhci_setup_host()
4494 int curr = regulator_get_current_limit(mmc->supply.vmmc); in sdhci_setup_host()
4509 if (host->caps & SDHCI_CAN_VDD_330) { in sdhci_setup_host()
4512 mmc->max_current_330 = FIELD_GET(SDHCI_MAX_CURRENT_330_MASK, in sdhci_setup_host()
4516 if (host->caps & SDHCI_CAN_VDD_300) { in sdhci_setup_host()
4519 mmc->max_current_300 = FIELD_GET(SDHCI_MAX_CURRENT_300_MASK, in sdhci_setup_host()
4523 if (host->caps & SDHCI_CAN_VDD_180) { in sdhci_setup_host()
4526 mmc->max_current_180 = FIELD_GET(SDHCI_MAX_CURRENT_180_MASK, in sdhci_setup_host()
4532 if (host->ocr_mask) in sdhci_setup_host()
4533 ocr_avail = host->ocr_mask; in sdhci_setup_host()
4536 if (mmc->ocr_avail) in sdhci_setup_host()
4537 ocr_avail = mmc->ocr_avail; in sdhci_setup_host()
4539 mmc->ocr_avail = ocr_avail; in sdhci_setup_host()
4540 mmc->ocr_avail_sdio = ocr_avail; in sdhci_setup_host()
4541 if (host->ocr_avail_sdio) in sdhci_setup_host()
4542 mmc->ocr_avail_sdio &= host->ocr_avail_sdio; in sdhci_setup_host()
4543 mmc->ocr_avail_sd = ocr_avail; in sdhci_setup_host()
4544 if (host->ocr_avail_sd) in sdhci_setup_host()
4545 mmc->ocr_avail_sd &= host->ocr_avail_sd; in sdhci_setup_host()
4547 mmc->ocr_avail_sd &= ~MMC_VDD_165_195; in sdhci_setup_host()
4548 mmc->ocr_avail_mmc = ocr_avail; in sdhci_setup_host()
4549 if (host->ocr_avail_mmc) in sdhci_setup_host()
4550 mmc->ocr_avail_mmc &= host->ocr_avail_mmc; in sdhci_setup_host()
4552 if (mmc->ocr_avail == 0) { in sdhci_setup_host()
4555 ret = -ENODEV; in sdhci_setup_host()
4559 if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | in sdhci_setup_host()
4562 (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) in sdhci_setup_host()
4563 host->flags |= SDHCI_SIGNALING_180; in sdhci_setup_host()
4565 if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) in sdhci_setup_host()
4566 host->flags |= SDHCI_SIGNALING_120; in sdhci_setup_host()
4568 spin_lock_init(&host->lock); in sdhci_setup_host()
4575 mmc->max_req_size = 524288; in sdhci_setup_host()
4581 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4582 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4583 } else if (host->flags & SDHCI_USE_SDMA) { in sdhci_setup_host()
4584 mmc->max_segs = 1; in sdhci_setup_host()
4586 unsigned int max_req_size = (1 << IO_TLB_SHIFT) * in sdhci_setup_host()
4588 mmc->max_req_size = min(mmc->max_req_size, in sdhci_setup_host()
4592 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4600 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4601 if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) in sdhci_setup_host()
4602 mmc->max_seg_size = 65535; in sdhci_setup_host()
4604 mmc->max_seg_size = 65536; in sdhci_setup_host()
4606 mmc->max_seg_size = mmc->max_req_size; in sdhci_setup_host()
4613 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { in sdhci_setup_host()
4614 mmc->max_blk_size = 2; in sdhci_setup_host()
4616 mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >> in sdhci_setup_host()
4618 if (mmc->max_blk_size >= 3) { in sdhci_setup_host()
4621 mmc->max_blk_size = 0; in sdhci_setup_host()
4625 mmc->max_blk_size = 512 << mmc->max_blk_size; in sdhci_setup_host()
4630 mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; in sdhci_setup_host()
4632 if (mmc->max_segs == 1) in sdhci_setup_host()
4633 /* This may alter mmc->*_blk_* parameters */ in sdhci_setup_host()
4639 if (host->sdhci_core_to_disable_vqmmc) in sdhci_setup_host()
4640 regulator_disable(mmc->supply.vqmmc); in sdhci_setup_host()
4642 if (host->align_buffer) in sdhci_setup_host()
4643 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4644 host->adma_table_sz, host->align_buffer, in sdhci_setup_host()
4645 host->align_addr); in sdhci_setup_host()
4646 host->adma_table = NULL; in sdhci_setup_host()
4647 host->align_buffer = NULL; in sdhci_setup_host()
4655 struct mmc_host *mmc = host->mmc; in sdhci_cleanup_host()
4657 if (host->sdhci_core_to_disable_vqmmc) in sdhci_cleanup_host()
4658 regulator_disable(mmc->supply.vqmmc); in sdhci_cleanup_host()
4660 if (host->align_buffer) in sdhci_cleanup_host()
4661 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_cleanup_host()
4662 host->adma_table_sz, host->align_buffer, in sdhci_cleanup_host()
4663 host->align_addr); in sdhci_cleanup_host()
4665 if (host->use_external_dma) in sdhci_cleanup_host()
4668 host->adma_table = NULL; in sdhci_cleanup_host()
4669 host->align_buffer = NULL; in sdhci_cleanup_host()
4673 int __sdhci_add_host(struct sdhci_host *host) in __sdhci_add_host()
4675 unsigned int flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_HIGHPRI; in __sdhci_add_host()
4676 struct mmc_host *mmc = host->mmc; in __sdhci_add_host()
4677 int ret; in __sdhci_add_host()
4679 if ((mmc->caps2 & MMC_CAP2_CQE) && in __sdhci_add_host()
4680 (host->quirks & SDHCI_QUIRK_BROKEN_CQE)) { in __sdhci_add_host()
4681 mmc->caps2 &= ~MMC_CAP2_CQE; in __sdhci_add_host()
4682 mmc->cqe_ops = NULL; in __sdhci_add_host()
4685 host->complete_wq = alloc_workqueue("sdhci", flags, 0); in __sdhci_add_host()
4686 if (!host->complete_wq) in __sdhci_add_host()
4687 return -ENOMEM; in __sdhci_add_host()
4689 INIT_WORK(&host->complete_work, sdhci_complete_work); in __sdhci_add_host()
4691 timer_setup(&host->timer, sdhci_timeout_timer, 0); in __sdhci_add_host()
4692 timer_setup(&host->data_timer, sdhci_timeout_data_timer, 0); in __sdhci_add_host()
4694 init_waitqueue_head(&host->buf_ready_int); in __sdhci_add_host()
4698 ret = request_threaded_irq(host->irq, sdhci_irq, sdhci_thread_irq, in __sdhci_add_host()
4702 mmc_hostname(mmc), host->irq, ret); in __sdhci_add_host()
4718 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), in __sdhci_add_host()
4719 host->use_external_dma ? "External DMA" : in __sdhci_add_host()
4720 (host->flags & SDHCI_USE_ADMA) ? in __sdhci_add_host()
4721 (host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" : in __sdhci_add_host()
4722 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); in __sdhci_add_host()
4734 free_irq(host->irq, host); in __sdhci_add_host()
4736 destroy_workqueue(host->complete_wq); in __sdhci_add_host()
4742 int sdhci_add_host(struct sdhci_host *host) in sdhci_add_host()
4744 int ret; in sdhci_add_host()
4763 void sdhci_remove_host(struct sdhci_host *host, int dead) in sdhci_remove_host()
4765 struct mmc_host *mmc = host->mmc; in sdhci_remove_host()
4769 spin_lock_irqsave(&host->lock, flags); in sdhci_remove_host()
4771 host->flags |= SDHCI_DEVICE_DEAD; in sdhci_remove_host()
4776 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_remove_host()
4779 spin_unlock_irqrestore(&host->lock, flags); in sdhci_remove_host()
4793 free_irq(host->irq, host); in sdhci_remove_host()
4795 del_timer_sync(&host->timer); in sdhci_remove_host()
4796 del_timer_sync(&host->data_timer); in sdhci_remove_host()
4798 destroy_workqueue(host->complete_wq); in sdhci_remove_host()
4800 if (host->sdhci_core_to_disable_vqmmc) in sdhci_remove_host()
4801 regulator_disable(mmc->supply.vqmmc); in sdhci_remove_host()
4803 if (host->align_buffer) in sdhci_remove_host()
4804 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_remove_host()
4805 host->adma_table_sz, host->align_buffer, in sdhci_remove_host()
4806 host->align_addr); in sdhci_remove_host()
4808 if (host->use_external_dma) in sdhci_remove_host()
4811 host->adma_table = NULL; in sdhci_remove_host()
4812 host->align_buffer = NULL; in sdhci_remove_host()
4819 mmc_free_host(host->mmc); in sdhci_free_host()
4830 static int __init sdhci_drv_init(void) in sdhci_drv_init()