Lines Matching refs:tegra_host
175 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_readw() local
176 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
211 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_writel() local
212 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_writel()
293 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_is_pad_and_regulator_valid() local
304 if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL)) in tegra_sdhci_is_pad_and_regulator_valid()
317 return tegra_host->pad_control_available; in tegra_sdhci_is_pad_and_regulator_valid()
326 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_tap() local
327 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_set_tap()
373 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_reset() local
374 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_reset()
382 tegra_sdhci_set_tap(host, tegra_host->default_tap); in tegra_sdhci_reset()
410 clk_ctrl |= tegra_host->default_trim << SDHCI_CLOCK_CTRL_TRIM_SHIFT; in tegra_sdhci_reset()
421 tegra_host->pad_calib_required = true; in tegra_sdhci_reset()
424 tegra_host->ddr_signaling = false; in tegra_sdhci_reset()
463 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_padctrl() local
465 &tegra_host->autocal_offsets; in tegra_sdhci_set_padctrl()
474 if (tegra_host->pinctrl_state_1v8_drv) { in tegra_sdhci_set_padctrl()
476 tegra_host->pinctrl_state_1v8_drv; in tegra_sdhci_set_padctrl()
482 if (tegra_host->pinctrl_state_3v3_drv) { in tegra_sdhci_set_padctrl()
484 tegra_host->pinctrl_state_3v3_drv; in tegra_sdhci_set_padctrl()
492 ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc, in tegra_sdhci_set_padctrl()
508 if (!tegra_host->pad_control_available) in tegra_sdhci_set_padctrl()
512 ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc, in tegra_sdhci_set_padctrl()
513 tegra_host->pinctrl_state_1v8); in tegra_sdhci_set_padctrl()
518 ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc, in tegra_sdhci_set_padctrl()
519 tegra_host->pinctrl_state_3v3); in tegra_sdhci_set_padctrl()
532 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_pad_autocalib() local
534 tegra_host->autocal_offsets; in tegra_sdhci_pad_autocalib()
594 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_parse_pad_autocal_dt() local
596 &tegra_host->autocal_offsets; in tegra_sdhci_parse_pad_autocal_dt()
653 if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL)) in tegra_sdhci_parse_pad_autocal_dt()
660 if (!IS_ERR(tegra_host->pinctrl_state_3v3) && in tegra_sdhci_parse_pad_autocal_dt()
661 (tegra_host->pinctrl_state_3v3_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
671 if (!IS_ERR(tegra_host->pinctrl_state_3v3) && in tegra_sdhci_parse_pad_autocal_dt()
672 (tegra_host->pinctrl_state_3v3_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
682 if (!IS_ERR(tegra_host->pinctrl_state_1v8) && in tegra_sdhci_parse_pad_autocal_dt()
683 (tegra_host->pinctrl_state_1v8_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
693 if (!IS_ERR(tegra_host->pinctrl_state_1v8) && in tegra_sdhci_parse_pad_autocal_dt()
694 (tegra_host->pinctrl_state_1v8_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
705 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_request() local
706 ktime_t since_calib = ktime_sub(ktime_get(), tegra_host->last_calib); in tegra_sdhci_request()
711 tegra_host->last_calib = ktime_get(); in tegra_sdhci_request()
720 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_parse_tap_and_trim() local
724 &tegra_host->default_tap); in tegra_sdhci_parse_tap_and_trim()
726 tegra_host->default_tap = 0; in tegra_sdhci_parse_tap_and_trim()
729 &tegra_host->default_trim); in tegra_sdhci_parse_tap_and_trim()
731 tegra_host->default_trim = 0; in tegra_sdhci_parse_tap_and_trim()
734 &tegra_host->dqs_trim); in tegra_sdhci_parse_tap_and_trim()
736 tegra_host->dqs_trim = 0x11; in tegra_sdhci_parse_tap_and_trim()
742 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_parse_dt() local
745 tegra_host->enable_hwcq = true; in tegra_sdhci_parse_dt()
747 tegra_host->enable_hwcq = false; in tegra_sdhci_parse_dt()
756 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_clock() local
774 host_clk = tegra_host->ddr_signaling ? clock * 2 : clock; in tegra_sdhci_set_clock()
776 tegra_host->curr_clk_rate = host_clk; in tegra_sdhci_set_clock()
777 if (tegra_host->ddr_signaling) in tegra_sdhci_set_clock()
784 if (tegra_host->pad_calib_required) { in tegra_sdhci_set_clock()
786 tegra_host->pad_calib_required = false; in tegra_sdhci_set_clock()
829 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_tap_correction() local
887 tegra_host->tuned_tap_delay = tap; in tegra_sdhci_tap_correction()
902 tegra_host->tuned_tap_delay = edge1 - fixed_tap; in tegra_sdhci_tap_correction()
904 tegra_host->tuned_tap_delay = edge1 + fixed_tap; in tegra_sdhci_tap_correction()
911 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_post_tuning() local
912 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_post_tuning()
921 tegra_host->tuned_tap_delay = (val & SDHCI_CLOCK_CTRL_TAP_MASK) >> in tegra_sdhci_post_tuning()
926 clk_rate_mhz = tegra_host->curr_clk_rate / USEC_PER_SEC; in tegra_sdhci_post_tuning()
963 tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay); in tegra_sdhci_post_tuning()
982 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_uhs_signaling() local
989 tegra_host->ddr_signaling = false; in tegra_sdhci_set_uhs_signaling()
1005 tegra_host->ddr_signaling = true; in tegra_sdhci_set_uhs_signaling()
1029 if (tegra_host->tuned_tap_delay && !set_default_tap) in tegra_sdhci_set_uhs_signaling()
1030 tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay); in tegra_sdhci_set_uhs_signaling()
1032 tegra_sdhci_set_tap(host, tegra_host->default_tap); in tegra_sdhci_set_uhs_signaling()
1035 tegra_sdhci_set_dqs_trim(host, tegra_host->dqs_trim); in tegra_sdhci_set_uhs_signaling()
1080 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_start_signal_voltage_switch() local
1095 if (tegra_host->pad_calib_required) in sdhci_tegra_start_signal_voltage_switch()
1102 struct sdhci_tegra *tegra_host) in tegra_sdhci_init_pinctrl_info() argument
1104 tegra_host->pinctrl_sdmmc = devm_pinctrl_get(dev); in tegra_sdhci_init_pinctrl_info()
1105 if (IS_ERR(tegra_host->pinctrl_sdmmc)) { in tegra_sdhci_init_pinctrl_info()
1107 PTR_ERR(tegra_host->pinctrl_sdmmc)); in tegra_sdhci_init_pinctrl_info()
1111 tegra_host->pinctrl_state_1v8_drv = pinctrl_lookup_state( in tegra_sdhci_init_pinctrl_info()
1112 tegra_host->pinctrl_sdmmc, "sdmmc-1v8-drv"); in tegra_sdhci_init_pinctrl_info()
1113 if (IS_ERR(tegra_host->pinctrl_state_1v8_drv)) { in tegra_sdhci_init_pinctrl_info()
1114 if (PTR_ERR(tegra_host->pinctrl_state_1v8_drv) == -ENODEV) in tegra_sdhci_init_pinctrl_info()
1115 tegra_host->pinctrl_state_1v8_drv = NULL; in tegra_sdhci_init_pinctrl_info()
1118 tegra_host->pinctrl_state_3v3_drv = pinctrl_lookup_state( in tegra_sdhci_init_pinctrl_info()
1119 tegra_host->pinctrl_sdmmc, "sdmmc-3v3-drv"); in tegra_sdhci_init_pinctrl_info()
1120 if (IS_ERR(tegra_host->pinctrl_state_3v3_drv)) { in tegra_sdhci_init_pinctrl_info()
1121 if (PTR_ERR(tegra_host->pinctrl_state_3v3_drv) == -ENODEV) in tegra_sdhci_init_pinctrl_info()
1122 tegra_host->pinctrl_state_3v3_drv = NULL; in tegra_sdhci_init_pinctrl_info()
1125 tegra_host->pinctrl_state_3v3 = in tegra_sdhci_init_pinctrl_info()
1126 pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-3v3"); in tegra_sdhci_init_pinctrl_info()
1127 if (IS_ERR(tegra_host->pinctrl_state_3v3)) { in tegra_sdhci_init_pinctrl_info()
1129 PTR_ERR(tegra_host->pinctrl_state_3v3)); in tegra_sdhci_init_pinctrl_info()
1133 tegra_host->pinctrl_state_1v8 = in tegra_sdhci_init_pinctrl_info()
1134 pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-1v8"); in tegra_sdhci_init_pinctrl_info()
1135 if (IS_ERR(tegra_host->pinctrl_state_1v8)) { in tegra_sdhci_init_pinctrl_info()
1137 PTR_ERR(tegra_host->pinctrl_state_1v8)); in tegra_sdhci_init_pinctrl_info()
1141 tegra_host->pad_control_available = true; in tegra_sdhci_init_pinctrl_info()
1149 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_voltage_switch() local
1150 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_voltage_switch()
1153 tegra_host->pad_calib_required = true; in tegra_sdhci_voltage_switch()
1197 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_update_dcmd_desc() local
1198 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in sdhci_tegra_update_dcmd_desc()
1516 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_add_host() local
1521 if (!tegra_host->enable_hwcq) in sdhci_tegra_add_host()
1567 struct sdhci_tegra *tegra_host; in sdhci_tegra_probe() local
1576 host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*tegra_host)); in sdhci_tegra_probe()
1581 tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_probe()
1582 tegra_host->ddr_signaling = false; in sdhci_tegra_probe()
1583 tegra_host->pad_calib_required = false; in sdhci_tegra_probe()
1584 tegra_host->pad_control_available = false; in sdhci_tegra_probe()
1585 tegra_host->soc_data = soc_data; in sdhci_tegra_probe()
1588 rc = tegra_sdhci_init_pinctrl_info(&pdev->dev, tegra_host); in sdhci_tegra_probe()
1609 if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50) in sdhci_tegra_probe()
1617 tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power", in sdhci_tegra_probe()
1619 if (IS_ERR(tegra_host->power_gpio)) { in sdhci_tegra_probe()
1620 rc = PTR_ERR(tegra_host->power_gpio); in sdhci_tegra_probe()
1658 tegra_host->tmclk = clk; in sdhci_tegra_probe()
1670 tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev, in sdhci_tegra_probe()
1672 if (IS_ERR(tegra_host->rst)) { in sdhci_tegra_probe()
1673 rc = PTR_ERR(tegra_host->rst); in sdhci_tegra_probe()
1678 rc = reset_control_assert(tegra_host->rst); in sdhci_tegra_probe()
1684 rc = reset_control_deassert(tegra_host->rst); in sdhci_tegra_probe()
1697 reset_control_assert(tegra_host->rst); in sdhci_tegra_probe()
1701 clk_disable_unprepare(tegra_host->tmclk); in sdhci_tegra_probe()
1712 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_remove() local
1716 reset_control_assert(tegra_host->rst); in sdhci_tegra_remove()
1719 clk_disable_unprepare(tegra_host->tmclk); in sdhci_tegra_remove()