Lines Matching +full:conf +full:- +full:sdio3
1 // SPDX-License-Identifier: GPL-2.0-only
28 #include "sdhci-pltfm.h"
65 * Fields below belong to SDIO3 Configuration Register (third register
80 dev_err(&pdev->dev, "no mbus dram info\n"); in mv_conf_mbus_windows()
81 return -EINVAL; in mv_conf_mbus_windows()
86 dev_err(&pdev->dev, "cannot get mbus registers\n"); in mv_conf_mbus_windows()
87 return -EINVAL; in mv_conf_mbus_windows()
90 regs = ioremap(res->start, resource_size(res)); in mv_conf_mbus_windows()
92 dev_err(&pdev->dev, "cannot map mbus registers\n"); in mv_conf_mbus_windows()
93 return -ENOMEM; in mv_conf_mbus_windows()
101 for (i = 0; i < dram->num_cs; i++) { in mv_conf_mbus_windows()
102 const struct mbus_dram_window *cs = dram->cs + i; in mv_conf_mbus_windows()
105 writel(((cs->size - 1) & 0xffff0000) | in mv_conf_mbus_windows()
106 (cs->mbus_attr << 8) | in mv_conf_mbus_windows()
107 (dram->mbus_dram_target_id << 4) | 1, in mv_conf_mbus_windows()
110 writel(cs->base, regs + SDHCI_WINDOW_BASE(i)); in mv_conf_mbus_windows()
121 struct device_node *np = pdev->dev.of_node; in armada_38x_quirks()
126 host->quirks &= ~SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; in armada_38x_quirks()
127 host->quirks |= SDHCI_QUIRK_MISSING_CAPS; in armada_38x_quirks()
129 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in armada_38x_quirks()
130 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in armada_38x_quirks()
133 "conf-sdio3"); in armada_38x_quirks()
135 pxa->sdio3_conf_reg = devm_ioremap_resource(&pdev->dev, res); in armada_38x_quirks()
136 if (IS_ERR(pxa->sdio3_conf_reg)) in armada_38x_quirks()
137 return PTR_ERR(pxa->sdio3_conf_reg); in armada_38x_quirks()
140 * According to erratum 'FE-2946959' both SDR50 and DDR50 in armada_38x_quirks()
141 * modes require specific clock adjustments in SDIO3 in armada_38x_quirks()
145 host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50); in armada_38x_quirks()
147 …dev_warn(&pdev->dev, "conf-sdio3 register not found: disabling SDR50 and DDR50 modes.\nConsider up… in armada_38x_quirks()
151 * According to erratum 'ERR-7878951' Armada 38x SDHCI in armada_38x_quirks()
155 if (of_property_read_bool(np, "no-1-8-v")) { in armada_38x_quirks()
156 host->caps &= ~SDHCI_CAN_VDD_180; in armada_38x_quirks()
157 host->mmc->caps &= ~MMC_CAP_1_8V_DDR; in armada_38x_quirks()
159 host->caps &= ~SDHCI_CAN_VDD_330; in armada_38x_quirks()
161 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_USE_SDR50_TUNING); in armada_38x_quirks()
168 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); in pxav3_reset()
169 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; in pxav3_reset()
178 if (pdata && 0 != pdata->clk_delay_cycles) { in pxav3_reset()
181 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav3_reset()
182 tmp |= (pdata->clk_delay_cycles & SDCLK_DELAY_MASK) in pxav3_reset()
185 writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav3_reset()
198 if (pxa->power_mode == MMC_POWER_UP in pxav3_gen_init_74_clocks()
201 dev_dbg(mmc_dev(host->mmc), in pxav3_gen_init_74_clocks()
202 "%s: slot->power_mode = %d," in pxav3_gen_init_74_clocks()
203 "ios->power_mode = %d\n", in pxav3_gen_init_74_clocks()
205 pxa->power_mode, in pxav3_gen_init_74_clocks()
209 tmp = readw(host->ioaddr + SD_CE_ATA_2); in pxav3_gen_init_74_clocks()
211 writew(tmp, host->ioaddr + SD_CE_ATA_2); in pxav3_gen_init_74_clocks()
214 tmp = readw(host->ioaddr + SD_CFG_FIFO_PARAM); in pxav3_gen_init_74_clocks()
216 writew(tmp, host->ioaddr + SD_CFG_FIFO_PARAM); in pxav3_gen_init_74_clocks()
223 if ((readw(host->ioaddr + SD_CE_ATA_2) in pxav3_gen_init_74_clocks()
230 dev_warn(mmc_dev(host->mmc), "74 clock interrupt not cleared\n"); in pxav3_gen_init_74_clocks()
233 tmp = readw(host->ioaddr + SD_CE_ATA_2); in pxav3_gen_init_74_clocks()
235 writew(tmp, host->ioaddr + SD_CE_ATA_2); in pxav3_gen_init_74_clocks()
237 pxa->power_mode = power_mode; in pxav3_gen_init_74_clocks()
247 * Set V18_EN -- UHS modes do not work without this. in pxav3_set_uhs_signaling()
274 * Update SDIO3 Configuration register according to erratum in pxav3_set_uhs_signaling()
275 * FE-2946959 in pxav3_set_uhs_signaling()
277 if (pxa->sdio3_conf_reg) { in pxav3_set_uhs_signaling()
278 u8 reg_val = readb(pxa->sdio3_conf_reg); in pxav3_set_uhs_signaling()
291 writeb(reg_val, pxa->sdio3_conf_reg); in pxav3_set_uhs_signaling()
295 dev_dbg(mmc_dev(host->mmc), in pxav3_set_uhs_signaling()
303 struct mmc_host *mmc = host->mmc; in pxav3_set_power()
304 u8 pwr = host->pwr; in pxav3_set_power()
308 if (host->pwr == pwr) in pxav3_set_power()
311 if (host->pwr == 0) in pxav3_set_power()
314 if (!IS_ERR(mmc->supply.vmmc)) in pxav3_set_power()
315 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in pxav3_set_power()
339 .compatible = "mrvl,pxav3-mmc",
342 .compatible = "marvell,armada-380-sdhci",
351 struct device_node *np = dev->of_node; in pxav3_get_mmc_pdata()
358 if (!of_property_read_u32(np, "mrvl,clk-delay-cycles", in pxav3_get_mmc_pdata()
360 pdata->clk_delay_cycles = clk_delay_cycles; in pxav3_get_mmc_pdata()
374 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; in sdhci_pxav3_probe()
375 struct device *dev = &pdev->dev; in sdhci_pxav3_probe()
376 struct device_node *np = pdev->dev.of_node; in sdhci_pxav3_probe()
389 pxa->clk_io = devm_clk_get(dev, "io"); in sdhci_pxav3_probe()
390 if (IS_ERR(pxa->clk_io)) in sdhci_pxav3_probe()
391 pxa->clk_io = devm_clk_get(dev, NULL); in sdhci_pxav3_probe()
392 if (IS_ERR(pxa->clk_io)) { in sdhci_pxav3_probe()
394 ret = PTR_ERR(pxa->clk_io); in sdhci_pxav3_probe()
397 pltfm_host->clk = pxa->clk_io; in sdhci_pxav3_probe()
398 clk_prepare_enable(pxa->clk_io); in sdhci_pxav3_probe()
400 pxa->clk_core = devm_clk_get(dev, "core"); in sdhci_pxav3_probe()
401 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_probe()
402 clk_prepare_enable(pxa->clk_core); in sdhci_pxav3_probe()
405 host->mmc->caps |= MMC_CAP_1_8V_DDR; in sdhci_pxav3_probe()
407 if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) { in sdhci_pxav3_probe()
416 match = of_match_device(of_match_ptr(sdhci_pxav3_of_match), &pdev->dev); in sdhci_pxav3_probe()
418 ret = mmc_of_parse(host->mmc); in sdhci_pxav3_probe()
423 pdev->dev.platform_data = pdata; in sdhci_pxav3_probe()
425 /* on-chip device */ in sdhci_pxav3_probe()
426 if (pdata->flags & PXA_FLAG_CARD_PERMANENT) in sdhci_pxav3_probe()
427 host->mmc->caps |= MMC_CAP_NONREMOVABLE; in sdhci_pxav3_probe()
430 if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT) in sdhci_pxav3_probe()
431 host->mmc->caps |= MMC_CAP_8_BIT_DATA; in sdhci_pxav3_probe()
433 if (pdata->quirks) in sdhci_pxav3_probe()
434 host->quirks |= pdata->quirks; in sdhci_pxav3_probe()
435 if (pdata->quirks2) in sdhci_pxav3_probe()
436 host->quirks2 |= pdata->quirks2; in sdhci_pxav3_probe()
437 if (pdata->host_caps) in sdhci_pxav3_probe()
438 host->mmc->caps |= pdata->host_caps; in sdhci_pxav3_probe()
439 if (pdata->host_caps2) in sdhci_pxav3_probe()
440 host->mmc->caps2 |= pdata->host_caps2; in sdhci_pxav3_probe()
441 if (pdata->pm_caps) in sdhci_pxav3_probe()
442 host->mmc->pm_caps |= pdata->pm_caps; in sdhci_pxav3_probe()
445 pm_runtime_get_noresume(&pdev->dev); in sdhci_pxav3_probe()
446 pm_runtime_set_active(&pdev->dev); in sdhci_pxav3_probe()
447 pm_runtime_set_autosuspend_delay(&pdev->dev, PXAV3_RPM_DELAY_MS); in sdhci_pxav3_probe()
448 pm_runtime_use_autosuspend(&pdev->dev); in sdhci_pxav3_probe()
449 pm_runtime_enable(&pdev->dev); in sdhci_pxav3_probe()
450 pm_suspend_ignore_children(&pdev->dev, 1); in sdhci_pxav3_probe()
456 if (host->mmc->pm_caps & MMC_PM_WAKE_SDIO_IRQ) in sdhci_pxav3_probe()
457 device_init_wakeup(&pdev->dev, 1); in sdhci_pxav3_probe()
459 pm_runtime_put_autosuspend(&pdev->dev); in sdhci_pxav3_probe()
464 pm_runtime_disable(&pdev->dev); in sdhci_pxav3_probe()
465 pm_runtime_put_noidle(&pdev->dev); in sdhci_pxav3_probe()
468 clk_disable_unprepare(pxa->clk_io); in sdhci_pxav3_probe()
469 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_probe()
481 pm_runtime_get_sync(&pdev->dev); in sdhci_pxav3_remove()
482 pm_runtime_disable(&pdev->dev); in sdhci_pxav3_remove()
483 pm_runtime_put_noidle(&pdev->dev); in sdhci_pxav3_remove()
487 clk_disable_unprepare(pxa->clk_io); in sdhci_pxav3_remove()
488 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_remove()
502 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_pxav3_suspend()
503 mmc_retune_needed(host->mmc); in sdhci_pxav3_suspend()
537 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_pxav3_runtime_suspend()
538 mmc_retune_needed(host->mmc); in sdhci_pxav3_runtime_suspend()
540 clk_disable_unprepare(pxa->clk_io); in sdhci_pxav3_runtime_suspend()
541 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_runtime_suspend()
542 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_runtime_suspend()
553 clk_prepare_enable(pxa->clk_io); in sdhci_pxav3_runtime_resume()
554 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_runtime_resume()
555 clk_prepare_enable(pxa->clk_core); in sdhci_pxav3_runtime_resume()
569 .name = "sdhci-pxav3",