Lines Matching +full:int +full:- +full:clock +full:- +full:stable +full:- +full:broken
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "sdhci-pci.h"
88 mmc_hostname(host->mmc)); in sdhci_o2_wait_card_detect_stable()
123 pr_err("%s: Internal clock never stabilised.\n", in sdhci_o2_enable_internal_clock()
124 mmc_hostname(host->mmc)); in sdhci_o2_enable_internal_clock()
142 static int sdhci_o2_get_cd(struct mmc_host *mmc) in sdhci_o2_get_cd()
156 pci_read_config_dword(chip->pdev, in o2_pci_set_baseclk()
162 pci_write_config_dword(chip->pdev, in o2_pci_set_baseclk()
177 static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host) in sdhci_o2_wait_dll_detect_lock()
197 int i; in __sdhci_o2_execute_tuning()
206 host->tuning_done = true; in __sdhci_o2_execute_tuning()
210 mmc_hostname(host->mmc)); in __sdhci_o2_execute_tuning()
217 pr_info("%s: Tuning failed, falling back to fixed sampling clock\n", in __sdhci_o2_execute_tuning()
218 mmc_hostname(host->mmc)); in __sdhci_o2_execute_tuning()
229 static int sdhci_o2_dll_recovery(struct sdhci_host *host) in sdhci_o2_dll_recovery()
231 int ret = 0; in sdhci_o2_dll_recovery()
235 struct sdhci_pci_chip *chip = slot->chip; in sdhci_o2_dll_recovery()
239 pci_read_config_byte(chip->pdev, in sdhci_o2_dll_recovery()
242 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); in sdhci_o2_dll_recovery()
243 while (o2_host->dll_adjust_count < DMDN_SZ && !ret) { in sdhci_o2_dll_recovery()
244 /* Disable clock */ in sdhci_o2_dll_recovery()
252 pci_read_config_dword(chip->pdev, in sdhci_o2_dll_recovery()
257 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG4, scratch_32); in sdhci_o2_dll_recovery()
258 o2_pci_set_baseclk(chip, dmdn_table[o2_host->dll_adjust_count]); in sdhci_o2_dll_recovery()
260 /* Enable internal clock */ in sdhci_o2_dll_recovery()
264 if (sdhci_o2_get_cd(host->mmc)) { in sdhci_o2_dll_recovery()
266 * need wait at least 5ms for dll status stable, in sdhci_o2_dll_recovery()
267 * after enable internal clock in sdhci_o2_dll_recovery()
277 mmc_hostname(host->mmc), in sdhci_o2_dll_recovery()
278 o2_host->dll_adjust_count); in sdhci_o2_dll_recovery()
282 mmc_hostname(host->mmc)); in sdhci_o2_dll_recovery()
286 o2_host->dll_adjust_count++; in sdhci_o2_dll_recovery()
288 if (!ret && o2_host->dll_adjust_count == DMDN_SZ) in sdhci_o2_dll_recovery()
290 mmc_hostname(host->mmc)); in sdhci_o2_dll_recovery()
292 pci_read_config_byte(chip->pdev, in sdhci_o2_dll_recovery()
295 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); in sdhci_o2_dll_recovery()
299 static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) in sdhci_o2_execute_tuning()
302 int current_bus_width = 0; in sdhci_o2_execute_tuning()
308 if ((host->timing != MMC_TIMING_MMC_HS200) && in sdhci_o2_execute_tuning()
309 (host->timing != MMC_TIMING_UHS_SDR104)) in sdhci_o2_execute_tuning()
314 return -EINVAL; in sdhci_o2_execute_tuning()
322 mmc_hostname(host->mmc)); in sdhci_o2_execute_tuning()
323 return -EINVAL; in sdhci_o2_execute_tuning()
328 if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) { in sdhci_o2_execute_tuning()
329 current_bus_width = mmc->ios.bus_width; in sdhci_o2_execute_tuning()
330 mmc->ios.bus_width = MMC_BUS_WIDTH_4; in sdhci_o2_execute_tuning()
343 mmc->ios.bus_width = MMC_BUS_WIDTH_8; in sdhci_o2_execute_tuning()
350 host->flags &= ~SDHCI_HS400_TUNING; in sdhci_o2_execute_tuning()
356 int ret; in o2_pci_led_enable()
360 ret = pci_read_config_dword(chip->pdev, in o2_pci_led_enable()
366 pci_write_config_dword(chip->pdev, in o2_pci_led_enable()
369 ret = pci_read_config_dword(chip->pdev, in o2_pci_led_enable()
375 pci_write_config_dword(chip->pdev, in o2_pci_led_enable()
382 int ret; in sdhci_pci_o2_fujin2_pci_init()
384 ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
388 pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
391 ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
396 pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
399 ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
403 pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
406 pci_write_config_dword(chip->pdev, O2_SD_DELAY_CTRL, 0x00002492); in sdhci_pci_o2_fujin2_pci_init()
409 ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
413 pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
416 ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
421 pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
423 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_fujin2_pci_init()
429 pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
432 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_fujin2_pci_init()
438 pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
441 ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
446 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
449 ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
454 pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
456 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_fujin2_pci_init()
462 pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
468 int ret; in sdhci_pci_o2_enable_msi()
470 ret = pci_find_capability(chip->pdev, PCI_CAP_ID_MSI); in sdhci_pci_o2_enable_msi()
473 mmc_hostname(host->mmc)); in sdhci_pci_o2_enable_msi()
477 ret = pci_alloc_irq_vectors(chip->pdev, 1, 1, in sdhci_pci_o2_enable_msi()
481 mmc_hostname(host->mmc), ret); in sdhci_pci_o2_enable_msi()
485 host->irq = pci_irq_vector(chip->pdev, 0); in sdhci_pci_o2_enable_msi()
490 /* Enable internal clock */ in sdhci_o2_enable_clk()
495 if (sdhci_o2_get_cd(host->mmc)) { in sdhci_o2_enable_clk()
501 static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock) in sdhci_pci_o2_set_clock() argument
507 struct sdhci_pci_chip *chip = slot->chip; in sdhci_pci_o2_set_clock()
509 host->mmc->actual_clock = 0; in sdhci_pci_o2_set_clock()
513 if (clock == 0) in sdhci_pci_o2_set_clock()
516 if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) { in sdhci_pci_o2_set_clock()
517 pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch); in sdhci_pci_o2_set_clock()
520 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_set_clock()
522 pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32); in sdhci_pci_o2_set_clock()
527 pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch); in sdhci_pci_o2_set_clock()
530 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_set_clock()
533 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_pci_o2_set_clock()
537 static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) in sdhci_pci_o2_probe_slot()
543 int ret; in sdhci_pci_o2_probe_slot()
545 chip = slot->chip; in sdhci_pci_o2_probe_slot()
546 host = slot->host; in sdhci_pci_o2_probe_slot()
548 o2_host->dll_adjust_count = 0; in sdhci_pci_o2_probe_slot()
556 host->mmc->caps |= MMC_CAP_8_BIT_DATA; in sdhci_pci_o2_probe_slot()
558 switch (chip->pdev->device) { in sdhci_pci_o2_probe_slot()
566 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; in sdhci_pci_o2_probe_slot()
570 if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) { in sdhci_pci_o2_probe_slot()
571 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe_slot()
574 return -EIO; in sdhci_pci_o2_probe_slot()
577 mmc_hostname(host->mmc)); in sdhci_pci_o2_probe_slot()
578 host->flags &= ~SDHCI_SIGNALING_330; in sdhci_pci_o2_probe_slot()
579 host->flags |= SDHCI_SIGNALING_180; in sdhci_pci_o2_probe_slot()
580 host->mmc->caps2 |= MMC_CAP2_NO_SD; in sdhci_pci_o2_probe_slot()
581 host->mmc->caps2 |= MMC_CAP2_NO_SDIO; in sdhci_pci_o2_probe_slot()
582 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe_slot()
586 slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd; in sdhci_pci_o2_probe_slot()
589 if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD1) { in sdhci_pci_o2_probe_slot()
590 slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd; in sdhci_pci_o2_probe_slot()
591 host->mmc->caps2 |= MMC_CAP2_NO_SDIO; in sdhci_pci_o2_probe_slot()
592 host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; in sdhci_pci_o2_probe_slot()
595 host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning; in sdhci_pci_o2_probe_slot()
597 if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2) in sdhci_pci_o2_probe_slot()
612 static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip) in sdhci_pci_o2_probe()
614 int ret; in sdhci_pci_o2_probe()
618 switch (chip->pdev->device) { in sdhci_pci_o2_probe()
623 /* This extra setup is required due to broken ADMA. */ in sdhci_pci_o2_probe()
624 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
629 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_probe()
632 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08); in sdhci_pci_o2_probe()
635 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
640 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch); in sdhci_pci_o2_probe()
645 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch); in sdhci_pci_o2_probe()
649 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch); in sdhci_pci_o2_probe()
650 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73); in sdhci_pci_o2_probe()
653 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39); in sdhci_pci_o2_probe()
654 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08); in sdhci_pci_o2_probe()
657 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
662 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch); in sdhci_pci_o2_probe()
665 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
670 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_probe()
676 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
682 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_probe()
685 if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) { in sdhci_pci_o2_probe()
686 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
696 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
702 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
707 pci_write_config_byte(chip->pdev, in sdhci_pci_o2_probe()
718 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
725 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
728 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
733 pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32); in sdhci_pci_o2_probe()
735 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
742 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
746 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
751 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
754 if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) in sdhci_pci_o2_probe()
758 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
763 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_probe()
768 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
774 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_probe()
776 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
783 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
789 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
792 ret = pci_read_config_dword(chip->pdev, in sdhci_pci_o2_probe()
796 pci_write_config_dword(chip->pdev, in sdhci_pci_o2_probe()
801 pci_write_config_byte(chip->pdev, in sdhci_pci_o2_probe()
804 ret = pci_read_config_byte(chip->pdev, in sdhci_pci_o2_probe()
809 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); in sdhci_pci_o2_probe()
817 static int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip) in sdhci_pci_o2_resume()