Lines Matching +full:mmci +full:- +full:gpio +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
6 * Copyright (C) 2010 ST-Ericsson SA
26 #include <linux/mmc/slot-gpio.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/amba/mmci.h>
43 #include "mmci.h"
45 #define DRIVER_NAME "mmci-pl18x"
341 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
342 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
344 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
358 if (host->cclk < 25000000) in mmci_reg_delay()
365 * This must be called with host->lock held
369 if (host->clk_reg != clk) { in mmci_write_clkreg()
370 host->clk_reg = clk; in mmci_write_clkreg()
371 writel(clk, host->base + MMCICLOCK); in mmci_write_clkreg()
376 * This must be called with host->lock held
380 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
381 host->pwr_reg = pwr; in mmci_write_pwrreg()
382 writel(pwr, host->base + MMCIPOWER); in mmci_write_pwrreg()
387 * This must be called with host->lock held
392 datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag; in mmci_write_datactrlreg()
394 if (host->datactrl_reg != datactrl) { in mmci_write_datactrlreg()
395 host->datactrl_reg = datactrl; in mmci_write_datactrlreg()
396 writel(datactrl, host->base + MMCIDATACTRL); in mmci_write_datactrlreg()
401 * This must be called with host->lock held
405 struct variant_data *variant = host->variant; in mmci_set_clkreg()
406 u32 clk = variant->clkreg; in mmci_set_clkreg()
409 host->cclk = 0; in mmci_set_clkreg()
412 if (variant->explicit_mclk_control) { in mmci_set_clkreg()
413 host->cclk = host->mclk; in mmci_set_clkreg()
414 } else if (desired >= host->mclk) { in mmci_set_clkreg()
416 if (variant->st_clkdiv) in mmci_set_clkreg()
418 host->cclk = host->mclk; in mmci_set_clkreg()
419 } else if (variant->st_clkdiv) { in mmci_set_clkreg()
422 * => clkdiv = (mclk / f) - 2 in mmci_set_clkreg()
426 clk = DIV_ROUND_UP(host->mclk, desired) - 2; in mmci_set_clkreg()
429 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
433 * => clkdiv = mclk / (2 * f) - 1 in mmci_set_clkreg()
435 clk = host->mclk / (2 * desired) - 1; in mmci_set_clkreg()
438 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
441 clk |= variant->clkreg_enable; in mmci_set_clkreg()
448 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
450 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_set_clkreg()
452 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_set_clkreg()
453 clk |= variant->clkreg_8bit_bus_enable; in mmci_set_clkreg()
455 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()
456 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
457 clk |= variant->clkreg_neg_edge_enable; in mmci_set_clkreg()
464 if (host->ops && host->ops->dma_release) in mmci_dma_release()
465 host->ops->dma_release(host); in mmci_dma_release()
467 host->use_dma = false; in mmci_dma_release()
472 if (!host->ops || !host->ops->dma_setup) in mmci_dma_setup()
475 if (host->ops->dma_setup(host)) in mmci_dma_setup()
479 host->next_cookie = 1; in mmci_dma_setup()
481 host->use_dma = true; in mmci_dma_setup()
490 struct variant_data *variant = host->variant; in mmci_validate_data()
494 if (!is_power_of_2(data->blksz) && !variant->datactrl_any_blocksz) { in mmci_validate_data()
495 dev_err(mmc_dev(host->mmc), in mmci_validate_data()
496 "unsupported block size (%d bytes)\n", data->blksz); in mmci_validate_data()
497 return -EINVAL; in mmci_validate_data()
500 if (host->ops && host->ops->validate_data) in mmci_validate_data()
501 return host->ops->validate_data(host, data); in mmci_validate_data()
510 if (!host->ops || !host->ops->prep_data) in mmci_prep_data()
513 err = host->ops->prep_data(host, data, next); in mmci_prep_data()
516 data->host_cookie = ++host->next_cookie < 0 ? in mmci_prep_data()
517 1 : host->next_cookie; in mmci_prep_data()
525 if (host->ops && host->ops->unprep_data) in mmci_unprep_data()
526 host->ops->unprep_data(host, data, err); in mmci_unprep_data()
528 data->host_cookie = 0; in mmci_unprep_data()
533 WARN_ON(data->host_cookie && data->host_cookie != host->next_cookie); in mmci_get_next_data()
535 if (host->ops && host->ops->get_next_data) in mmci_get_next_data()
536 host->ops->get_next_data(host, data); in mmci_get_next_data()
541 struct mmc_data *data = host->data; in mmci_dma_start()
544 if (!host->use_dma) in mmci_dma_start()
545 return -EINVAL; in mmci_dma_start()
551 if (!host->ops || !host->ops->dma_start) in mmci_dma_start()
552 return -EINVAL; in mmci_dma_start()
555 dev_vdbg(mmc_dev(host->mmc), in mmci_dma_start()
556 "Submit MMCI DMA job, sglen %d blksz %04x blks %04x flags %08x\n", in mmci_dma_start()
557 data->sg_len, data->blksz, data->blocks, data->flags); in mmci_dma_start()
559 ret = host->ops->dma_start(host, &datactrl); in mmci_dma_start()
567 * Let the MMCI say when the data is ended and it's time in mmci_dma_start()
568 * to fire next DMA request. When that happens, MMCI will in mmci_dma_start()
571 writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK, in mmci_dma_start()
572 host->base + MMCIMASK0); in mmci_dma_start()
578 if (!host->use_dma) in mmci_dma_finalize()
581 if (host->ops && host->ops->dma_finalize) in mmci_dma_finalize()
582 host->ops->dma_finalize(host, data); in mmci_dma_finalize()
587 if (!host->use_dma) in mmci_dma_error()
590 if (host->ops && host->ops->dma_error) in mmci_dma_error()
591 host->ops->dma_error(host); in mmci_dma_error()
597 writel(0, host->base + MMCICOMMAND); in mmci_request_end()
599 BUG_ON(host->data); in mmci_request_end()
601 host->mrq = NULL; in mmci_request_end()
602 host->cmd = NULL; in mmci_request_end()
604 mmc_request_done(host->mmc, mrq); in mmci_request_end()
609 void __iomem *base = host->base; in mmci_set_mask1()
610 struct variant_data *variant = host->variant; in mmci_set_mask1()
612 if (host->singleirq) { in mmci_set_mask1()
615 mask0 &= ~variant->irq_pio_mask; in mmci_set_mask1()
621 if (variant->mmcimask1) in mmci_set_mask1()
624 host->mask1_reg = mask; in mmci_set_mask1()
631 host->data = NULL; in mmci_stop_data()
638 if (data->flags & MMC_DATA_READ) in mmci_init_sg()
643 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmci_init_sg()
653 return MCI_DPSM_ENABLE | (host->data->blksz << 16); in ux500v2_get_dctrl_cfg()
658 void __iomem *base = host->base; in ux500_busy_complete()
663 * command in-progress, waiting for busy signaling to end, in ux500_busy_complete()
664 * store the status in host->busy_status. in ux500_busy_complete()
667 * it starts signaling busy on DAT0, hence re-read the in ux500_busy_complete()
673 if (!host->busy_status && !(status & err_msk) && in ux500_busy_complete()
674 (readl(base + MMCISTATUS) & host->variant->busy_detect_flag)) { in ux500_busy_complete()
676 host->variant->busy_detect_mask, in ux500_busy_complete()
679 host->busy_status = status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
684 * If there is a command in-progress that has been successfully in ux500_busy_complete()
694 if (host->busy_status && in ux500_busy_complete()
695 (status & host->variant->busy_detect_flag)) { in ux500_busy_complete()
696 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
701 * If there is a command in-progress that has been successfully in ux500_busy_complete()
706 if (host->busy_status) { in ux500_busy_complete()
707 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
710 ~host->variant->busy_detect_mask, base + MMCIMASK0); in ux500_busy_complete()
711 host->busy_status = 0; in ux500_busy_complete()
741 dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL); in mmci_dmae_setup()
743 return -ENOMEM; in mmci_dmae_setup()
745 host->dma_priv = dmae; in mmci_dmae_setup()
747 dmae->rx_channel = dma_request_chan(mmc_dev(host->mmc), "rx"); in mmci_dmae_setup()
748 if (IS_ERR(dmae->rx_channel)) { in mmci_dmae_setup()
749 int ret = PTR_ERR(dmae->rx_channel); in mmci_dmae_setup()
750 dmae->rx_channel = NULL; in mmci_dmae_setup()
754 dmae->tx_channel = dma_request_chan(mmc_dev(host->mmc), "tx"); in mmci_dmae_setup()
755 if (IS_ERR(dmae->tx_channel)) { in mmci_dmae_setup()
756 if (PTR_ERR(dmae->tx_channel) == -EPROBE_DEFER) in mmci_dmae_setup()
757 dev_warn(mmc_dev(host->mmc), in mmci_dmae_setup()
759 dmae->tx_channel = NULL; in mmci_dmae_setup()
767 if (dmae->rx_channel && !dmae->tx_channel) in mmci_dmae_setup()
768 dmae->tx_channel = dmae->rx_channel; in mmci_dmae_setup()
770 if (dmae->rx_channel) in mmci_dmae_setup()
771 rxname = dma_chan_name(dmae->rx_channel); in mmci_dmae_setup()
775 if (dmae->tx_channel) in mmci_dmae_setup()
776 txname = dma_chan_name(dmae->tx_channel); in mmci_dmae_setup()
780 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", in mmci_dmae_setup()
787 if (dmae->tx_channel) { in mmci_dmae_setup()
788 struct device *dev = dmae->tx_channel->device->dev; in mmci_dmae_setup()
791 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
792 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
794 if (dmae->rx_channel) { in mmci_dmae_setup()
795 struct device *dev = dmae->rx_channel->device->dev; in mmci_dmae_setup()
798 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
799 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
802 if (!dmae->tx_channel || !dmae->rx_channel) { in mmci_dmae_setup()
804 return -EINVAL; in mmci_dmae_setup()
816 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_release()
818 if (dmae->rx_channel) in mmci_dmae_release()
819 dma_release_channel(dmae->rx_channel); in mmci_dmae_release()
820 if (dmae->tx_channel) in mmci_dmae_release()
821 dma_release_channel(dmae->tx_channel); in mmci_dmae_release()
822 dmae->rx_channel = dmae->tx_channel = NULL; in mmci_dmae_release()
827 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dma_unmap()
830 if (data->flags & MMC_DATA_READ) in mmci_dma_unmap()
831 chan = dmae->rx_channel; in mmci_dma_unmap()
833 chan = dmae->tx_channel; in mmci_dma_unmap()
835 dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, in mmci_dma_unmap()
841 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_error()
846 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); in mmci_dmae_error()
847 dmaengine_terminate_all(dmae->cur); in mmci_dmae_error()
848 host->dma_in_progress = false; in mmci_dmae_error()
849 dmae->cur = NULL; in mmci_dmae_error()
850 dmae->desc_current = NULL; in mmci_dmae_error()
851 host->data->host_cookie = 0; in mmci_dmae_error()
853 mmci_dma_unmap(host, host->data); in mmci_dmae_error()
858 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_finalize()
867 status = readl(host->base + MMCISTATUS); in mmci_dmae_finalize()
874 * Check to see whether we still have some data left in the FIFO - in mmci_dmae_finalize()
876 * DMALBREQ and DMALSREQ signals while allowing us to DMA to non- in mmci_dmae_finalize()
881 if (!data->error) in mmci_dmae_finalize()
882 data->error = -EIO; in mmci_dmae_finalize()
883 } else if (!data->host_cookie) { in mmci_dmae_finalize()
888 * Use of DMA with scatter-gather is impossible. in mmci_dmae_finalize()
892 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); in mmci_dmae_finalize()
896 host->dma_in_progress = false; in mmci_dmae_finalize()
897 dmae->cur = NULL; in mmci_dmae_finalize()
898 dmae->desc_current = NULL; in mmci_dmae_finalize()
901 /* prepares DMA channel and DMA descriptor, returns non-zero on failure */
906 struct mmci_dmae_priv *dmae = host->dma_priv; in _mmci_dmae_prep_data()
907 struct variant_data *variant = host->variant; in _mmci_dmae_prep_data()
909 .src_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
910 .dst_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
913 .src_maxburst = variant->fifohalfsize >> 2, /* # of words */ in _mmci_dmae_prep_data()
914 .dst_maxburst = variant->fifohalfsize >> 2, /* # of words */ in _mmci_dmae_prep_data()
923 if (data->flags & MMC_DATA_READ) { in _mmci_dmae_prep_data()
925 chan = dmae->rx_channel; in _mmci_dmae_prep_data()
928 chan = dmae->tx_channel; in _mmci_dmae_prep_data()
933 return -EINVAL; in _mmci_dmae_prep_data()
936 if (data->blksz * data->blocks <= variant->fifosize) in _mmci_dmae_prep_data()
937 return -EINVAL; in _mmci_dmae_prep_data()
942 * - The Ux500 DMA controller (DMA40) in _mmci_dmae_prep_data()
943 * - The MMCI DMA interface on the Ux500 in _mmci_dmae_prep_data()
948 if (host->variant->dma_power_of_2 && !is_power_of_2(data->blksz)) in _mmci_dmae_prep_data()
949 return -EINVAL; in _mmci_dmae_prep_data()
951 device = chan->device; in _mmci_dmae_prep_data()
952 nr_sg = dma_map_sg(device->dev, data->sg, data->sg_len, in _mmci_dmae_prep_data()
955 return -EINVAL; in _mmci_dmae_prep_data()
957 if (host->variant->qcom_dml) in _mmci_dmae_prep_data()
961 desc = dmaengine_prep_slave_sg(chan, data->sg, nr_sg, in _mmci_dmae_prep_data()
972 dma_unmap_sg(device->dev, data->sg, data->sg_len, in _mmci_dmae_prep_data()
974 return -ENOMEM; in _mmci_dmae_prep_data()
981 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_prep_data()
982 struct mmci_dmae_next *nd = &dmae->next_data; in mmci_dmae_prep_data()
984 if (!host->use_dma) in mmci_dmae_prep_data()
985 return -EINVAL; in mmci_dmae_prep_data()
988 return _mmci_dmae_prep_data(host, data, &nd->chan, &nd->desc); in mmci_dmae_prep_data()
990 if (dmae->cur && dmae->desc_current) in mmci_dmae_prep_data()
994 return _mmci_dmae_prep_data(host, data, &dmae->cur, in mmci_dmae_prep_data()
995 &dmae->desc_current); in mmci_dmae_prep_data()
1000 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_start()
1003 host->dma_in_progress = true; in mmci_dmae_start()
1004 ret = dma_submit_error(dmaengine_submit(dmae->desc_current)); in mmci_dmae_start()
1006 host->dma_in_progress = false; in mmci_dmae_start()
1009 dma_async_issue_pending(dmae->cur); in mmci_dmae_start()
1018 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_get_next_data()
1019 struct mmci_dmae_next *next = &dmae->next_data; in mmci_dmae_get_next_data()
1021 if (!host->use_dma) in mmci_dmae_get_next_data()
1024 WARN_ON(!data->host_cookie && (next->desc || next->chan)); in mmci_dmae_get_next_data()
1026 dmae->desc_current = next->desc; in mmci_dmae_get_next_data()
1027 dmae->cur = next->chan; in mmci_dmae_get_next_data()
1028 next->desc = NULL; in mmci_dmae_get_next_data()
1029 next->chan = NULL; in mmci_dmae_get_next_data()
1036 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_unprep_data()
1038 if (!host->use_dma) in mmci_dmae_unprep_data()
1044 struct mmci_dmae_next *next = &dmae->next_data; in mmci_dmae_unprep_data()
1046 if (data->flags & MMC_DATA_READ) in mmci_dmae_unprep_data()
1047 chan = dmae->rx_channel; in mmci_dmae_unprep_data()
1049 chan = dmae->tx_channel; in mmci_dmae_unprep_data()
1052 if (dmae->desc_current == next->desc) in mmci_dmae_unprep_data()
1053 dmae->desc_current = NULL; in mmci_dmae_unprep_data()
1055 if (dmae->cur == next->chan) { in mmci_dmae_unprep_data()
1056 host->dma_in_progress = false; in mmci_dmae_unprep_data()
1057 dmae->cur = NULL; in mmci_dmae_unprep_data()
1060 next->desc = NULL; in mmci_dmae_unprep_data()
1061 next->chan = NULL; in mmci_dmae_unprep_data()
1084 host->ops = &mmci_variant_ops; in mmci_variant_init()
1089 host->ops = &mmci_variant_ops; in ux500_variant_init()
1090 host->ops->busy_complete = ux500_busy_complete; in ux500_variant_init()
1095 host->ops = &mmci_variant_ops; in ux500v2_variant_init()
1096 host->ops->busy_complete = ux500_busy_complete; in ux500v2_variant_init()
1097 host->ops->get_datactrl_cfg = ux500v2_get_dctrl_cfg; in ux500v2_variant_init()
1103 struct mmc_data *data = mrq->data; in mmci_pre_request()
1108 WARN_ON(data->host_cookie); in mmci_pre_request()
1120 struct mmc_data *data = mrq->data; in mmci_post_request()
1122 if (!data || !data->host_cookie) in mmci_post_request()
1130 struct variant_data *variant = host->variant; in mmci_start_data()
1135 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", in mmci_start_data()
1136 data->blksz, data->blocks, data->flags); in mmci_start_data()
1138 host->data = data; in mmci_start_data()
1139 host->size = data->blksz * data->blocks; in mmci_start_data()
1140 data->bytes_xfered = 0; in mmci_start_data()
1142 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1145 timeout = data->timeout_clks + (unsigned int)clks; in mmci_start_data()
1147 base = host->base; in mmci_start_data()
1149 writel(host->size, base + MMCIDATALENGTH); in mmci_start_data()
1151 datactrl = host->ops->get_datactrl_cfg(host); in mmci_start_data()
1152 datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0; in mmci_start_data()
1154 if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { in mmci_start_data()
1157 datactrl |= variant->datactrl_mask_sdio; in mmci_start_data()
1165 if (variant->st_sdio && data->flags & MMC_DATA_WRITE && in mmci_start_data()
1166 (host->size < 8 || in mmci_start_data()
1167 (host->size <= 8 && host->mclk > 50000000))) in mmci_start_data()
1168 clk = host->clk_reg & ~variant->clkreg_enable; in mmci_start_data()
1170 clk = host->clk_reg | variant->clkreg_enable; in mmci_start_data()
1175 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
1176 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
1177 datactrl |= variant->datactrl_mask_ddrmode; in mmci_start_data()
1189 if (data->flags & MMC_DATA_READ) { in mmci_start_data()
1193 * If we have less than the fifo 'half-full' threshold to in mmci_start_data()
1197 if (host->size < variant->fifohalfsize) in mmci_start_data()
1215 void __iomem *base = host->base; in mmci_start_command()
1218 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", in mmci_start_command()
1219 cmd->opcode, cmd->arg, cmd->flags); in mmci_start_command()
1221 if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) { in mmci_start_command()
1226 if (host->variant->cmdreg_stop && in mmci_start_command()
1227 cmd->opcode == MMC_STOP_TRANSMISSION) in mmci_start_command()
1228 c |= host->variant->cmdreg_stop; in mmci_start_command()
1230 c |= cmd->opcode | host->variant->cmdreg_cpsm_enable; in mmci_start_command()
1231 if (cmd->flags & MMC_RSP_PRESENT) { in mmci_start_command()
1232 if (cmd->flags & MMC_RSP_136) in mmci_start_command()
1233 c |= host->variant->cmdreg_lrsp_crc; in mmci_start_command()
1234 else if (cmd->flags & MMC_RSP_CRC) in mmci_start_command()
1235 c |= host->variant->cmdreg_srsp_crc; in mmci_start_command()
1237 c |= host->variant->cmdreg_srsp; in mmci_start_command()
1240 if (host->variant->busy_timeout && cmd->flags & MMC_RSP_BUSY) { in mmci_start_command()
1241 if (!cmd->busy_timeout) in mmci_start_command()
1242 cmd->busy_timeout = 10 * MSEC_PER_SEC; in mmci_start_command()
1244 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
1246 writel_relaxed(clks, host->base + MMCIDATATIMER); in mmci_start_command()
1249 if (host->ops->pre_sig_volt_switch && cmd->opcode == SD_SWITCH_VOLTAGE) in mmci_start_command()
1250 host->ops->pre_sig_volt_switch(host); in mmci_start_command()
1256 c |= host->variant->data_cmd_enable; in mmci_start_command()
1258 host->cmd = cmd; in mmci_start_command()
1260 writel(cmd->arg, base + MMCIARGUMENT); in mmci_start_command()
1266 host->stop_abort.error = 0; in mmci_stop_command()
1267 mmci_start_command(host, &host->stop_abort, 0); in mmci_stop_command()
1281 status_err = status & (host->variant->start_err | in mmci_data_irq()
1295 * can be as much as a FIFO-worth of data ahead. This in mmci_data_irq()
1298 if (!host->variant->datacnt_useless) { in mmci_data_irq()
1299 remain = readl(host->base + MMCIDATACNT); in mmci_data_irq()
1300 success = data->blksz * data->blocks - remain; in mmci_data_irq()
1305 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", in mmci_data_irq()
1309 success -= 1; in mmci_data_irq()
1310 data->error = -EILSEQ; in mmci_data_irq()
1312 data->error = -ETIMEDOUT; in mmci_data_irq()
1314 data->error = -ECOMM; in mmci_data_irq()
1316 data->error = -EIO; in mmci_data_irq()
1318 if (success > host->variant->fifosize) in mmci_data_irq()
1319 success -= host->variant->fifosize; in mmci_data_irq()
1322 data->error = -EIO; in mmci_data_irq()
1324 data->bytes_xfered = round_down(success, data->blksz); in mmci_data_irq()
1328 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); in mmci_data_irq()
1330 if (status & MCI_DATAEND || data->error) { in mmci_data_irq()
1335 if (!data->error) in mmci_data_irq()
1337 data->bytes_xfered = data->blksz * data->blocks; in mmci_data_irq()
1339 if (!data->stop) { in mmci_data_irq()
1340 if (host->variant->cmdreg_stop && data->error) in mmci_data_irq()
1343 mmci_request_end(host, data->mrq); in mmci_data_irq()
1344 } else if (host->mrq->sbc && !data->error) { in mmci_data_irq()
1345 mmci_request_end(host, data->mrq); in mmci_data_irq()
1347 mmci_start_command(host, data->stop, 0); in mmci_data_irq()
1357 void __iomem *base = host->base; in mmci_cmd_irq()
1363 sbc = (cmd == host->mrq->sbc); in mmci_cmd_irq()
1364 busy_resp = !!(cmd->flags & MMC_RSP_BUSY); in mmci_cmd_irq()
1371 if (host->variant->busy_timeout && busy_resp) in mmci_cmd_irq()
1374 if (!((status | host->busy_status) & in mmci_cmd_irq()
1379 if (busy_resp && host->variant->busy_detect) in mmci_cmd_irq()
1380 if (!host->ops->busy_complete(host, status, err_msk)) in mmci_cmd_irq()
1383 host->cmd = NULL; in mmci_cmd_irq()
1386 cmd->error = -ETIMEDOUT; in mmci_cmd_irq()
1387 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) { in mmci_cmd_irq()
1388 cmd->error = -EILSEQ; in mmci_cmd_irq()
1389 } else if (host->variant->busy_timeout && busy_resp && in mmci_cmd_irq()
1391 cmd->error = -ETIMEDOUT; in mmci_cmd_irq()
1392 host->irq_action = IRQ_WAKE_THREAD; in mmci_cmd_irq()
1394 cmd->resp[0] = readl(base + MMCIRESPONSE0); in mmci_cmd_irq()
1395 cmd->resp[1] = readl(base + MMCIRESPONSE1); in mmci_cmd_irq()
1396 cmd->resp[2] = readl(base + MMCIRESPONSE2); in mmci_cmd_irq()
1397 cmd->resp[3] = readl(base + MMCIRESPONSE3); in mmci_cmd_irq()
1400 if ((!sbc && !cmd->data) || cmd->error) { in mmci_cmd_irq()
1401 if (host->data) { in mmci_cmd_irq()
1406 if (host->variant->cmdreg_stop && cmd->error) { in mmci_cmd_irq()
1412 if (host->irq_action != IRQ_WAKE_THREAD) in mmci_cmd_irq()
1413 mmci_request_end(host, host->mrq); in mmci_cmd_irq()
1416 mmci_start_command(host, host->mrq->cmd, 0); in mmci_cmd_irq()
1417 } else if (!host->variant->datactrl_first && in mmci_cmd_irq()
1418 !(cmd->data->flags & MMC_DATA_READ)) { in mmci_cmd_irq()
1419 mmci_start_data(host, cmd->data); in mmci_cmd_irq()
1425 return remain - (readl(host->base + MMCIFIFOCNT) << 2); in mmci_get_rx_fifocnt()
1435 return host->variant->fifohalfsize; in mmci_qcom_get_rx_fifocnt()
1444 void __iomem *base = host->base; in mmci_pio_read()
1446 u32 status = readl(host->base + MMCISTATUS); in mmci_pio_read()
1447 int host_remain = host->size; in mmci_pio_read()
1450 int count = host->get_rx_fifocnt(host, status, host_remain); in mmci_pio_read()
1462 * while only doing full 32-bit reads towards the FIFO. in mmci_pio_read()
1478 remain -= count; in mmci_pio_read()
1479 host_remain -= count; in mmci_pio_read()
1487 return ptr - buffer; in mmci_pio_read()
1492 struct variant_data *variant = host->variant; in mmci_pio_write()
1493 void __iomem *base = host->base; in mmci_pio_write()
1500 variant->fifosize : variant->fifohalfsize; in mmci_pio_write()
1506 * etc), and the FIFO only accept full 32-bit writes. in mmci_pio_write()
1514 remain -= count; in mmci_pio_write()
1522 return ptr - buffer; in mmci_pio_write()
1531 struct sg_mapping_iter *sg_miter = &host->sg_miter; in mmci_pio_irq()
1532 struct variant_data *variant = host->variant; in mmci_pio_irq()
1533 void __iomem *base = host->base; in mmci_pio_irq()
1538 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); in mmci_pio_irq()
1545 * For write, we only need to test the half-empty flag in mmci_pio_irq()
1546 * here - if the FIFO is completely empty, then by in mmci_pio_irq()
1557 buffer = sg_miter->addr; in mmci_pio_irq()
1558 remain = sg_miter->length; in mmci_pio_irq()
1566 sg_miter->consumed = len; in mmci_pio_irq()
1568 host->size -= len; in mmci_pio_irq()
1569 remain -= len; in mmci_pio_irq()
1580 * If we have less than the fifo 'half-full' threshold to transfer, in mmci_pio_irq()
1583 if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize) in mmci_pio_irq()
1592 if (host->size == 0) { in mmci_pio_irq()
1608 spin_lock(&host->lock); in mmci_irq()
1609 host->irq_action = IRQ_HANDLED; in mmci_irq()
1612 status = readl(host->base + MMCISTATUS); in mmci_irq()
1614 if (host->singleirq) { in mmci_irq()
1615 if (status & host->mask1_reg) in mmci_irq()
1618 status &= ~host->variant->irq_pio_mask; in mmci_irq()
1625 status &= readl(host->base + MMCIMASK0); in mmci_irq()
1626 if (host->variant->busy_detect) in mmci_irq()
1627 writel(status & ~host->variant->busy_detect_mask, in mmci_irq()
1628 host->base + MMCICLEAR); in mmci_irq()
1630 writel(status, host->base + MMCICLEAR); in mmci_irq()
1632 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); in mmci_irq()
1634 if (host->variant->reversed_irq_handling) { in mmci_irq()
1635 mmci_data_irq(host, host->data, status); in mmci_irq()
1636 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1638 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1639 mmci_data_irq(host, host->data, status); in mmci_irq()
1646 if (host->variant->busy_detect_flag) in mmci_irq()
1647 status &= ~host->variant->busy_detect_flag; in mmci_irq()
1651 spin_unlock(&host->lock); in mmci_irq()
1653 return host->irq_action; in mmci_irq()
1657 * mmci_irq_thread() - A threaded IRQ handler that manages a reset of the HW.
1660 * causes the DPSM to stay busy (non-functional).
1667 if (host->rst) { in mmci_irq_thread()
1668 reset_control_assert(host->rst); in mmci_irq_thread()
1670 reset_control_deassert(host->rst); in mmci_irq_thread()
1673 spin_lock_irqsave(&host->lock, flags); in mmci_irq_thread()
1674 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_irq_thread()
1675 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
1676 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_irq_thread()
1677 host->base + MMCIMASK0); in mmci_irq_thread()
1679 host->irq_action = IRQ_HANDLED; in mmci_irq_thread()
1680 mmci_request_end(host, host->mrq); in mmci_irq_thread()
1681 spin_unlock_irqrestore(&host->lock, flags); in mmci_irq_thread()
1683 return host->irq_action; in mmci_irq_thread()
1691 WARN_ON(host->mrq != NULL); in mmci_request()
1693 mrq->cmd->error = mmci_validate_data(host, mrq->data); in mmci_request()
1694 if (mrq->cmd->error) { in mmci_request()
1699 spin_lock_irqsave(&host->lock, flags); in mmci_request()
1701 host->mrq = mrq; in mmci_request()
1703 if (mrq->data) in mmci_request()
1704 mmci_get_next_data(host, mrq->data); in mmci_request()
1706 if (mrq->data && in mmci_request()
1707 (host->variant->datactrl_first || mrq->data->flags & MMC_DATA_READ)) in mmci_request()
1708 mmci_start_data(host, mrq->data); in mmci_request()
1710 if (mrq->sbc) in mmci_request()
1711 mmci_start_command(host, mrq->sbc, 0); in mmci_request()
1713 mmci_start_command(host, mrq->cmd, 0); in mmci_request()
1715 spin_unlock_irqrestore(&host->lock, flags); in mmci_request()
1723 if (!host->variant->busy_detect) in mmci_set_max_busy_timeout()
1726 if (host->variant->busy_timeout && mmc->actual_clock) in mmci_set_max_busy_timeout()
1727 max_busy_timeout = ~0UL / (mmc->actual_clock / MSEC_PER_SEC); in mmci_set_max_busy_timeout()
1729 mmc->max_busy_timeout = max_busy_timeout; in mmci_set_max_busy_timeout()
1735 struct variant_data *variant = host->variant; in mmci_set_ios()
1740 if (host->plat->ios_handler && in mmci_set_ios()
1741 host->plat->ios_handler(mmc_dev(mmc), ios)) in mmci_set_ios()
1744 switch (ios->power_mode) { in mmci_set_ios()
1746 if (!IS_ERR(mmc->supply.vmmc)) in mmci_set_ios()
1747 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in mmci_set_ios()
1749 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in mmci_set_ios()
1750 regulator_disable(mmc->supply.vqmmc); in mmci_set_ios()
1751 host->vqmmc_enabled = false; in mmci_set_ios()
1756 if (!IS_ERR(mmc->supply.vmmc)) in mmci_set_ios()
1757 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in mmci_set_ios()
1764 pwr |= variant->pwrreg_powerup; in mmci_set_ios()
1768 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in mmci_set_ios()
1769 ret = regulator_enable(mmc->supply.vqmmc); in mmci_set_ios()
1774 host->vqmmc_enabled = true; in mmci_set_ios()
1781 if (variant->signal_direction && ios->power_mode != MMC_POWER_OFF) { in mmci_set_ios()
1785 * the SD/MMC bus and feedback-clock usage. in mmci_set_ios()
1787 pwr |= host->pwr_reg_add; in mmci_set_ios()
1789 if (ios->bus_width == MMC_BUS_WIDTH_4) in mmci_set_ios()
1791 else if (ios->bus_width == MMC_BUS_WIDTH_1) in mmci_set_ios()
1797 if (variant->opendrain) { in mmci_set_ios()
1798 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) in mmci_set_ios()
1799 pwr |= variant->opendrain; in mmci_set_ios()
1805 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) in mmci_set_ios()
1806 pinctrl_select_state(host->pinctrl, host->pins_opendrain); in mmci_set_ios()
1815 if (!ios->clock && variant->pwrreg_clkgate) in mmci_set_ios()
1818 if (host->variant->explicit_mclk_control && in mmci_set_ios()
1819 ios->clock != host->clock_cache) { in mmci_set_ios()
1820 ret = clk_set_rate(host->clk, ios->clock); in mmci_set_ios()
1822 dev_err(mmc_dev(host->mmc), in mmci_set_ios()
1825 host->mclk = clk_get_rate(host->clk); in mmci_set_ios()
1827 host->clock_cache = ios->clock; in mmci_set_ios()
1829 spin_lock_irqsave(&host->lock, flags); in mmci_set_ios()
1831 if (host->ops && host->ops->set_clkreg) in mmci_set_ios()
1832 host->ops->set_clkreg(host, ios->clock); in mmci_set_ios()
1834 mmci_set_clkreg(host, ios->clock); in mmci_set_ios()
1838 if (host->ops && host->ops->set_pwrreg) in mmci_set_ios()
1839 host->ops->set_pwrreg(host, pwr); in mmci_set_ios()
1845 spin_unlock_irqrestore(&host->lock, flags); in mmci_set_ios()
1851 struct mmci_platform_data *plat = host->plat; in mmci_get_cd()
1854 if (status == -ENOSYS) { in mmci_get_cd()
1855 if (!plat->status) in mmci_get_cd()
1858 status = plat->status(mmc_dev(host->mmc)); in mmci_get_cd()
1870 if (!ret && host->ops && host->ops->post_sig_volt_switch) in mmci_sig_volt_switch()
1871 ret = host->ops->post_sig_volt_switch(host, ios); in mmci_sig_volt_switch()
1899 if (of_get_property(np, "st,sig-dir-dat0", NULL)) in mmci_of_parse()
1900 host->pwr_reg_add |= MCI_ST_DATA0DIREN; in mmci_of_parse()
1901 if (of_get_property(np, "st,sig-dir-dat2", NULL)) in mmci_of_parse()
1902 host->pwr_reg_add |= MCI_ST_DATA2DIREN; in mmci_of_parse()
1903 if (of_get_property(np, "st,sig-dir-dat31", NULL)) in mmci_of_parse()
1904 host->pwr_reg_add |= MCI_ST_DATA31DIREN; in mmci_of_parse()
1905 if (of_get_property(np, "st,sig-dir-dat74", NULL)) in mmci_of_parse()
1906 host->pwr_reg_add |= MCI_ST_DATA74DIREN; in mmci_of_parse()
1907 if (of_get_property(np, "st,sig-dir-cmd", NULL)) in mmci_of_parse()
1908 host->pwr_reg_add |= MCI_ST_CMDDIREN; in mmci_of_parse()
1909 if (of_get_property(np, "st,sig-pin-fbclk", NULL)) in mmci_of_parse()
1910 host->pwr_reg_add |= MCI_ST_FBCLKEN; in mmci_of_parse()
1911 if (of_get_property(np, "st,sig-dir", NULL)) in mmci_of_parse()
1912 host->pwr_reg_add |= MCI_STM32_DIRPOL; in mmci_of_parse()
1913 if (of_get_property(np, "st,neg-edge", NULL)) in mmci_of_parse()
1914 host->clk_reg_add |= MCI_STM32_CLK_NEGEDGE; in mmci_of_parse()
1915 if (of_get_property(np, "st,use-ckin", NULL)) in mmci_of_parse()
1916 host->clk_reg_add |= MCI_STM32_CLK_SELCKIN; in mmci_of_parse()
1918 if (of_get_property(np, "mmc-cap-mmc-highspeed", NULL)) in mmci_of_parse()
1919 mmc->caps |= MMC_CAP_MMC_HIGHSPEED; in mmci_of_parse()
1920 if (of_get_property(np, "mmc-cap-sd-highspeed", NULL)) in mmci_of_parse()
1921 mmc->caps |= MMC_CAP_SD_HIGHSPEED; in mmci_of_parse()
1929 struct mmci_platform_data *plat = dev->dev.platform_data; in mmci_probe()
1930 struct device_node *np = dev->dev.of_node; in mmci_probe()
1931 struct variant_data *variant = id->data; in mmci_probe()
1938 dev_err(&dev->dev, "No plat data or DT found\n"); in mmci_probe()
1939 return -EINVAL; in mmci_probe()
1943 plat = devm_kzalloc(&dev->dev, sizeof(*plat), GFP_KERNEL); in mmci_probe()
1945 return -ENOMEM; in mmci_probe()
1948 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev); in mmci_probe()
1950 return -ENOMEM; in mmci_probe()
1957 host->mmc = mmc; in mmci_probe()
1958 host->mmc_ops = &mmci_ops; in mmci_probe()
1959 mmc->ops = &mmci_ops; in mmci_probe()
1965 if (!variant->opendrain) { in mmci_probe()
1966 host->pinctrl = devm_pinctrl_get(&dev->dev); in mmci_probe()
1967 if (IS_ERR(host->pinctrl)) { in mmci_probe()
1968 dev_err(&dev->dev, "failed to get pinctrl"); in mmci_probe()
1969 ret = PTR_ERR(host->pinctrl); in mmci_probe()
1973 host->pins_opendrain = pinctrl_lookup_state(host->pinctrl, in mmci_probe()
1975 if (IS_ERR(host->pins_opendrain)) { in mmci_probe()
1977 ret = PTR_ERR(host->pins_opendrain); in mmci_probe()
1982 host->hw_designer = amba_manf(dev); in mmci_probe()
1983 host->hw_revision = amba_rev(dev); in mmci_probe()
1984 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); in mmci_probe()
1985 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); in mmci_probe()
1987 host->clk = devm_clk_get(&dev->dev, NULL); in mmci_probe()
1988 if (IS_ERR(host->clk)) { in mmci_probe()
1989 ret = PTR_ERR(host->clk); in mmci_probe()
1993 ret = clk_prepare_enable(host->clk); in mmci_probe()
1997 if (variant->qcom_fifo) in mmci_probe()
1998 host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; in mmci_probe()
2000 host->get_rx_fifocnt = mmci_get_rx_fifocnt; in mmci_probe()
2002 host->plat = plat; in mmci_probe()
2003 host->variant = variant; in mmci_probe()
2004 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2010 if (host->mclk > variant->f_max) { in mmci_probe()
2011 ret = clk_set_rate(host->clk, variant->f_max); in mmci_probe()
2014 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2016 host->mclk); in mmci_probe()
2019 host->phybase = dev->res.start; in mmci_probe()
2020 host->base = devm_ioremap_resource(&dev->dev, &dev->res); in mmci_probe()
2021 if (IS_ERR(host->base)) { in mmci_probe()
2022 ret = PTR_ERR(host->base); in mmci_probe()
2026 if (variant->init) in mmci_probe()
2027 variant->init(host); in mmci_probe()
2035 if (variant->st_clkdiv) in mmci_probe()
2036 mmc->f_min = DIV_ROUND_UP(host->mclk, 257); in mmci_probe()
2037 else if (variant->stm32_clkdiv) in mmci_probe()
2038 mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); in mmci_probe()
2039 else if (variant->explicit_mclk_control) in mmci_probe()
2040 mmc->f_min = clk_round_rate(host->clk, 100000); in mmci_probe()
2042 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); in mmci_probe()
2049 if (mmc->f_max) in mmci_probe()
2050 mmc->f_max = variant->explicit_mclk_control ? in mmci_probe()
2051 min(variant->f_max, mmc->f_max) : in mmci_probe()
2052 min(host->mclk, mmc->f_max); in mmci_probe()
2054 mmc->f_max = variant->explicit_mclk_control ? in mmci_probe()
2055 fmax : min(host->mclk, fmax); in mmci_probe()
2058 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); in mmci_probe()
2060 host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL); in mmci_probe()
2061 if (IS_ERR(host->rst)) { in mmci_probe()
2062 ret = PTR_ERR(host->rst); in mmci_probe()
2071 if (!mmc->ocr_avail) in mmci_probe()
2072 mmc->ocr_avail = plat->ocr_mask; in mmci_probe()
2073 else if (plat->ocr_mask) in mmci_probe()
2077 mmc->caps |= MMC_CAP_CMD23; in mmci_probe()
2082 if (variant->busy_detect) { in mmci_probe()
2088 if (variant->busy_dpsm_flag) in mmci_probe()
2090 host->variant->busy_dpsm_flag); in mmci_probe()
2091 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in mmci_probe()
2094 /* Prepare a CMD12 - needed to clear the DPSM on some variants. */ in mmci_probe()
2095 host->stop_abort.opcode = MMC_STOP_TRANSMISSION; in mmci_probe()
2096 host->stop_abort.arg = 0; in mmci_probe()
2097 host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC; in mmci_probe()
2100 mmc->pm_caps |= MMC_PM_KEEP_POWER; in mmci_probe()
2105 mmc->max_segs = NR_SG; in mmci_probe()
2109 * register, we must ensure that we don't exceed 2^num-1 bytes in a in mmci_probe()
2112 mmc->max_req_size = (1 << variant->datalength_bits) - 1; in mmci_probe()
2118 mmc->max_seg_size = mmc->max_req_size; in mmci_probe()
2123 mmc->max_blk_size = 1 << variant->datactrl_blocksz; in mmci_probe()
2129 mmc->max_blk_count = mmc->max_req_size >> variant->datactrl_blocksz; in mmci_probe()
2131 spin_lock_init(&host->lock); in mmci_probe()
2133 writel(0, host->base + MMCIMASK0); in mmci_probe()
2135 if (variant->mmcimask1) in mmci_probe()
2136 writel(0, host->base + MMCIMASK1); in mmci_probe()
2138 writel(0xfff, host->base + MMCICLEAR); in mmci_probe()
2142 * - not using DT but using a descriptor table, or in mmci_probe()
2143 * - using a table of descriptors ALONGSIDE DT, or in mmci_probe()
2149 if (ret == -EPROBE_DEFER) in mmci_probe()
2153 if (ret == -EPROBE_DEFER) in mmci_probe()
2157 ret = devm_request_threaded_irq(&dev->dev, dev->irq[0], mmci_irq, in mmci_probe()
2163 if (!dev->irq[1]) in mmci_probe()
2164 host->singleirq = true; in mmci_probe()
2166 ret = devm_request_irq(&dev->dev, dev->irq[1], mmci_pio_irq, in mmci_probe()
2172 writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); in mmci_probe()
2176 dev_info(&dev->dev, "%s: PL%03x manf %x rev%u at 0x%08llx irq %d,%d (pio)\n", in mmci_probe()
2178 amba_rev(dev), (unsigned long long)dev->res.start, in mmci_probe()
2179 dev->irq[0], dev->irq[1]); in mmci_probe()
2183 pm_runtime_set_autosuspend_delay(&dev->dev, 50); in mmci_probe()
2184 pm_runtime_use_autosuspend(&dev->dev); in mmci_probe()
2188 pm_runtime_put(&dev->dev); in mmci_probe()
2192 clk_disable_unprepare(host->clk); in mmci_probe()
2204 struct variant_data *variant = host->variant; in mmci_remove()
2210 pm_runtime_get_sync(&dev->dev); in mmci_remove()
2214 writel(0, host->base + MMCIMASK0); in mmci_remove()
2216 if (variant->mmcimask1) in mmci_remove()
2217 writel(0, host->base + MMCIMASK1); in mmci_remove()
2219 writel(0, host->base + MMCICOMMAND); in mmci_remove()
2220 writel(0, host->base + MMCIDATACTRL); in mmci_remove()
2223 clk_disable_unprepare(host->clk); in mmci_remove()
2235 spin_lock_irqsave(&host->lock, flags); in mmci_save()
2237 writel(0, host->base + MMCIMASK0); in mmci_save()
2238 if (host->variant->pwrreg_nopower) { in mmci_save()
2239 writel(0, host->base + MMCIDATACTRL); in mmci_save()
2240 writel(0, host->base + MMCIPOWER); in mmci_save()
2241 writel(0, host->base + MMCICLOCK); in mmci_save()
2245 spin_unlock_irqrestore(&host->lock, flags); in mmci_save()
2252 spin_lock_irqsave(&host->lock, flags); in mmci_restore()
2254 if (host->variant->pwrreg_nopower) { in mmci_restore()
2255 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_restore()
2256 writel(host->datactrl_reg, host->base + MMCIDATACTRL); in mmci_restore()
2257 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
2259 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_restore()
2260 host->base + MMCIMASK0); in mmci_restore()
2263 spin_unlock_irqrestore(&host->lock, flags); in mmci_restore()
2275 clk_disable_unprepare(host->clk); in mmci_runtime_suspend()
2288 clk_prepare_enable(host->clk); in mmci_runtime_resume()