Lines Matching +full:dw +full:- +full:mshc
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Exynos Specific Extensions for Synopsys DW Multimedia Card Interface driver
19 #include "dw_mmc-pltfm.h"
20 #include "dw_mmc-exynos.h"
22 /* Variations in Exynos specific dw-mshc controller */
52 .compatible = "samsung,exynos4210-dw-mshc",
55 .compatible = "samsung,exynos4412-dw-mshc",
58 .compatible = "samsung,exynos5250-dw-mshc",
61 .compatible = "samsung,exynos5420-dw-mshc",
64 .compatible = "samsung,exynos5420-dw-mshc-smu",
67 .compatible = "samsung,exynos7-dw-mshc",
70 .compatible = "samsung,exynos7-dw-mshc-smu",
77 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_get_ciu_div()
79 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412) in dw_mci_exynos_get_ciu_div()
81 else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210) in dw_mci_exynos_get_ciu_div()
83 else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_get_ciu_div()
84 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_get_ciu_div()
92 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_config_smu()
96 * set for non-ecryption mode at this time. in dw_mci_exynos_config_smu()
98 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS5420_SMU || in dw_mci_exynos_config_smu()
99 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) { in dw_mci_exynos_config_smu()
111 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_priv_init()
115 if (priv->ctrl_type >= DW_MCI_TYPE_EXYNOS5420) { in dw_mci_exynos_priv_init()
116 priv->saved_strobe_ctrl = mci_readl(host, HS400_DLINE_CTRL); in dw_mci_exynos_priv_init()
117 priv->saved_dqs_en = mci_readl(host, HS400_DQS_EN); in dw_mci_exynos_priv_init()
118 priv->saved_dqs_en |= AXI_NON_BLOCKING_WR; in dw_mci_exynos_priv_init()
119 mci_writel(host, HS400_DQS_EN, priv->saved_dqs_en); in dw_mci_exynos_priv_init()
120 if (!priv->dqs_delay) in dw_mci_exynos_priv_init()
121 priv->dqs_delay = in dw_mci_exynos_priv_init()
122 DQS_CTRL_GET_RD_DELAY(priv->saved_strobe_ctrl); in dw_mci_exynos_priv_init()
125 host->bus_hz /= (priv->ciu_div + 1); in dw_mci_exynos_priv_init()
132 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_set_clksel_timing()
135 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksel_timing()
136 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksel_timing()
143 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksel_timing()
144 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksel_timing()
151 * use of bit 29 (which is reserved on standard MSHC controllers) for in dw_mci_exynos_set_clksel_timing()
156 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot) in dw_mci_exynos_set_clksel_timing()
157 set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags); in dw_mci_exynos_set_clksel_timing()
178 * dw_mci_exynos_suspend_noirq - Exynos-specific suspend code
191 * dw_mci_exynos_resume_noirq - Exynos-specific resume code
204 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_resume_noirq()
212 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_resume_noirq()
213 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_resume_noirq()
219 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_resume_noirq()
220 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_resume_noirq()
234 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_config_hs400()
241 if (priv->ctrl_type < DW_MCI_TYPE_EXYNOS5420) { in dw_mci_exynos_config_hs400()
243 dev_warn(host->dev, in dw_mci_exynos_config_hs400()
248 dqs = priv->saved_dqs_en; in dw_mci_exynos_config_hs400()
249 strobe = priv->saved_strobe_ctrl; in dw_mci_exynos_config_hs400()
253 strobe = DQS_CTRL_RD_DELAY(strobe, priv->dqs_delay); in dw_mci_exynos_config_hs400()
266 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_adjust_clock()
274 if (!wanted || IS_ERR(host->ciu_clk)) in dw_mci_exynos_adjust_clock()
281 if (wanted == priv->cur_speed) in dw_mci_exynos_adjust_clock()
285 ret = clk_set_rate(host->ciu_clk, wanted * div); in dw_mci_exynos_adjust_clock()
287 dev_warn(host->dev, in dw_mci_exynos_adjust_clock()
288 "failed to set clk-rate %u error: %d\n", in dw_mci_exynos_adjust_clock()
290 actual = clk_get_rate(host->ciu_clk); in dw_mci_exynos_adjust_clock()
291 host->bus_hz = actual / div; in dw_mci_exynos_adjust_clock()
292 priv->cur_speed = wanted; in dw_mci_exynos_adjust_clock()
293 host->current_speed = 0; in dw_mci_exynos_adjust_clock()
298 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_set_ios()
299 unsigned int wanted = ios->clock; in dw_mci_exynos_set_ios()
300 u32 timing = ios->timing, clksel; in dw_mci_exynos_set_ios()
306 priv->hs400_timing, priv->tuned_sample); in dw_mci_exynos_set_ios()
310 clksel = priv->ddr_timing; in dw_mci_exynos_set_ios()
312 if (ios->bus_width == MMC_BUS_WIDTH_8) in dw_mci_exynos_set_ios()
317 clksel = (priv->sdr_timing & 0xfff8ffff) | in dw_mci_exynos_set_ios()
318 (priv->ciu_div << 16); in dw_mci_exynos_set_ios()
321 clksel = (priv->ddr_timing & 0xfff8ffff) | in dw_mci_exynos_set_ios()
322 (priv->ciu_div << 16); in dw_mci_exynos_set_ios()
325 clksel = priv->sdr_timing; in dw_mci_exynos_set_ios()
341 struct device_node *np = host->dev->of_node; in dw_mci_exynos_parse_dt()
347 priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL); in dw_mci_exynos_parse_dt()
349 return -ENOMEM; in dw_mci_exynos_parse_dt()
353 priv->ctrl_type = exynos_compat[idx].ctrl_type; in dw_mci_exynos_parse_dt()
356 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412) in dw_mci_exynos_parse_dt()
357 priv->ciu_div = EXYNOS4412_FIXED_CIU_CLK_DIV - 1; in dw_mci_exynos_parse_dt()
358 else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210) in dw_mci_exynos_parse_dt()
359 priv->ciu_div = EXYNOS4210_FIXED_CIU_CLK_DIV - 1; in dw_mci_exynos_parse_dt()
361 of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div); in dw_mci_exynos_parse_dt()
362 priv->ciu_div = div; in dw_mci_exynos_parse_dt()
366 "samsung,dw-mshc-sdr-timing", timing, 2); in dw_mci_exynos_parse_dt()
370 priv->sdr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
373 "samsung,dw-mshc-ddr-timing", timing, 2); in dw_mci_exynos_parse_dt()
377 priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
380 "samsung,dw-mshc-hs400-timing", timing, 2); in dw_mci_exynos_parse_dt()
382 "samsung,read-strobe-delay", &priv->dqs_delay)) in dw_mci_exynos_parse_dt()
383 dev_dbg(host->dev, in dw_mci_exynos_parse_dt()
384 "read-strobe-delay is not found, assuming usage of default value\n"); in dw_mci_exynos_parse_dt()
386 priv->hs400_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], in dw_mci_exynos_parse_dt()
388 host->priv = priv; in dw_mci_exynos_parse_dt()
394 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_get_clksmpl()
396 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_get_clksmpl()
397 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_get_clksmpl()
406 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_set_clksmpl()
408 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksmpl()
409 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksmpl()
414 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksmpl()
415 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksmpl()
423 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_move_next_clksmpl()
427 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_move_next_clksmpl()
428 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_move_next_clksmpl()
436 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_move_next_clksmpl()
437 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_move_next_clksmpl()
449 s8 i, loc = -1; in dw_mci_exynos_get_best_clksmpl()
473 struct dw_mci *host = slot->host; in dw_mci_exynos_execute_tuning()
474 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_execute_tuning()
475 struct mmc_host *mmc = slot->mmc; in dw_mci_exynos_execute_tuning()
494 priv->tuned_sample = found; in dw_mci_exynos_execute_tuning()
496 ret = -EIO; in dw_mci_exynos_execute_tuning()
505 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_prepare_hs400_tuning()
507 dw_mci_exynos_set_clksel_timing(host, priv->hs400_timing); in dw_mci_exynos_prepare_hs400_tuning()
508 dw_mci_exynos_adjust_clock(host, (ios->clock) << 1); in dw_mci_exynos_prepare_hs400_tuning()
532 { .compatible = "samsung,exynos4412-dw-mshc",
534 { .compatible = "samsung,exynos5250-dw-mshc",
536 { .compatible = "samsung,exynos5420-dw-mshc",
538 { .compatible = "samsung,exynos5420-dw-mshc-smu",
540 { .compatible = "samsung,exynos7-dw-mshc",
542 { .compatible = "samsung,exynos7-dw-mshc-smu",
554 match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); in dw_mci_exynos_probe()
555 drv_data = match->data; in dw_mci_exynos_probe()
557 pm_runtime_get_noresume(&pdev->dev); in dw_mci_exynos_probe()
558 pm_runtime_set_active(&pdev->dev); in dw_mci_exynos_probe()
559 pm_runtime_enable(&pdev->dev); in dw_mci_exynos_probe()
563 pm_runtime_disable(&pdev->dev); in dw_mci_exynos_probe()
564 pm_runtime_set_suspended(&pdev->dev); in dw_mci_exynos_probe()
565 pm_runtime_put_noidle(&pdev->dev); in dw_mci_exynos_probe()
575 pm_runtime_disable(&pdev->dev); in dw_mci_exynos_remove()
576 pm_runtime_set_suspended(&pdev->dev); in dw_mci_exynos_remove()
577 pm_runtime_put_noidle(&pdev->dev); in dw_mci_exynos_remove()
603 MODULE_DESCRIPTION("Samsung Specific DW-MSHC Driver Extension");