Lines Matching full:ipc
39 #define IPC_BASE_ADDR 0x80400 /* SeC IPC Base Address */
41 /* IPC Input Doorbell Register */
44 /* IPC Input Status Register
53 /* IPC Host Interrupt Status Register */
68 /* IPC Host Interrupt Mask Register */
74 /* IPC Input Payload RAM */
76 /* IPC Shared Payload RAM */
102 * that arrive via IPC.
121 /* Host Interrupt Cause Register 0 - SeC IPC Readiness
125 * This register is used by SeC's IPC driver in order
126 * to synchronize with host about IPC interface state.
144 /* Host Interrupt Cause Register 2 - SeC IPC Output Doorbell */
187 /* SEC Memory Space IPC output payload.
202 /* SeC Interrupt Cause Register - Host IPC Readiness
207 * to synchronize with SeC about IPC interface state.
219 /* SeC Interrupt Cause Register - SeC IPC Output Status
231 /* MEI IPC Message payload size 64 bytes */