Lines Matching refs:vfe
211 static void vfe_hw_version_read(struct vfe_device *vfe, struct device *dev) in vfe_hw_version_read() argument
213 u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION); in vfe_hw_version_read()
226 static inline void vfe_reg_clr(struct vfe_device *vfe, u32 reg, u32 clr_bits) in vfe_reg_clr() argument
228 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_clr()
230 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
233 static inline void vfe_reg_set(struct vfe_device *vfe, u32 reg, u32 set_bits) in vfe_reg_set() argument
235 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_set()
237 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
240 static void vfe_global_reset(struct vfe_device *vfe) in vfe_global_reset() argument
252 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
255 static void vfe_halt_request(struct vfe_device *vfe) in vfe_halt_request() argument
258 vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_request()
261 static void vfe_halt_clear(struct vfe_device *vfe) in vfe_halt_clear() argument
263 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
266 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_enable() argument
269 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
272 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
276 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
279 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_frame_based()
282 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_frame_based()
331 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, in vfe_wm_line_based() argument
347 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
356 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
359 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
361 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
366 static void vfe_wm_set_framedrop_period(struct vfe_device *vfe, u8 wm, u8 per) in vfe_wm_set_framedrop_period() argument
370 reg = readl_relaxed(vfe->base + in vfe_wm_set_framedrop_period()
379 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm)); in vfe_wm_set_framedrop_period()
382 static void vfe_wm_set_framedrop_pattern(struct vfe_device *vfe, u8 wm, in vfe_wm_set_framedrop_pattern() argument
386 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_FRAMEDROP_PATTERN(wm)); in vfe_wm_set_framedrop_pattern()
389 static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm, in vfe_wm_set_ub_cfg() argument
396 writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm)); in vfe_wm_set_ub_cfg()
399 static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm) in vfe_bus_reload_wm() argument
402 writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD); in vfe_bus_reload_wm()
406 static void vfe_wm_set_ping_addr(struct vfe_device *vfe, u8 wm, u32 addr) in vfe_wm_set_ping_addr() argument
409 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PING_ADDR(wm)); in vfe_wm_set_ping_addr()
412 static void vfe_wm_set_pong_addr(struct vfe_device *vfe, u8 wm, u32 addr) in vfe_wm_set_pong_addr() argument
415 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PONG_ADDR(wm)); in vfe_wm_set_pong_addr()
418 static int vfe_wm_get_ping_pong_status(struct vfe_device *vfe, u8 wm) in vfe_wm_get_ping_pong_status() argument
422 reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS); in vfe_wm_get_ping_pong_status()
427 static void vfe_bus_enable_wr_if(struct vfe_device *vfe, u8 enable) in vfe_bus_enable_wr_if() argument
430 writel_relaxed(0x10000009, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
432 writel_relaxed(0, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
435 static void vfe_bus_connect_wm_to_rdi(struct vfe_device *vfe, u8 wm, in vfe_bus_connect_wm_to_rdi() argument
442 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), reg); in vfe_bus_connect_wm_to_rdi()
447 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), reg); in vfe_bus_connect_wm_to_rdi()
468 vfe_reg_set(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg); in vfe_bus_connect_wm_to_rdi()
471 static void vfe_wm_set_subsample(struct vfe_device *vfe, u8 wm) in vfe_wm_set_subsample() argument
474 vfe->base + in vfe_wm_set_subsample()
478 static void vfe_bus_disconnect_wm_from_rdi(struct vfe_device *vfe, u8 wm, in vfe_bus_disconnect_wm_from_rdi() argument
484 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(0), reg); in vfe_bus_disconnect_wm_from_rdi()
487 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), reg); in vfe_bus_disconnect_wm_from_rdi()
508 vfe_reg_clr(vfe, VFE_0_BUS_XBAR_CFG_x(wm), reg); in vfe_bus_disconnect_wm_from_rdi()
511 static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output, in vfe_set_xbar_cfg() argument
536 vfe_reg_set(vfe, in vfe_set_xbar_cfg()
540 vfe_reg_clr(vfe, in vfe_set_xbar_cfg()
546 static void vfe_set_realign_cfg(struct vfe_device *vfe, struct vfe_line *line, in vfe_set_realign_cfg() argument
551 static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid) in vfe_set_rdi_cid() argument
553 vfe_reg_clr(vfe, VFE_0_RDI_CFG_x(id), in vfe_set_rdi_cid()
556 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(id), in vfe_set_rdi_cid()
560 static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) in vfe_reg_update() argument
562 vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update()
564 writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE); in vfe_reg_update()
568 static inline void vfe_reg_update_clear(struct vfe_device *vfe, in vfe_reg_update_clear() argument
571 vfe->reg_update &= ~VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update_clear()
574 static void vfe_enable_irq_wm_line(struct vfe_device *vfe, u8 wm, in vfe_enable_irq_wm_line() argument
583 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_wm_line()
584 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_wm_line()
586 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_wm_line()
587 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_wm_line()
591 static void vfe_enable_irq_pix_line(struct vfe_device *vfe, u8 comp, in vfe_enable_irq_pix_line() argument
594 struct vfe_output *output = &vfe->line[line_id].output; in vfe_enable_irq_pix_line()
612 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_pix_line()
613 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_pix_line()
614 vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
616 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_pix_line()
617 vfe_reg_clr(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_pix_line()
618 vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
622 static void vfe_enable_irq_common(struct vfe_device *vfe) in vfe_enable_irq_common() argument
628 vfe_reg_set(vfe, VFE_0_IRQ_MASK_0, irq_en0); in vfe_enable_irq_common()
629 vfe_reg_set(vfe, VFE_0_IRQ_MASK_1, irq_en1); in vfe_enable_irq_common()
632 static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_demux_cfg() argument
636 writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG); in vfe_set_demux_cfg()
639 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0); in vfe_set_demux_cfg()
642 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1); in vfe_set_demux_cfg()
664 writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG); in vfe_set_demux_cfg()
665 writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG); in vfe_set_demux_cfg()
682 static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_scale_cfg() argument
690 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG); in vfe_set_scale_cfg()
695 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE); in vfe_set_scale_cfg()
700 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE); in vfe_set_scale_cfg()
705 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE); in vfe_set_scale_cfg()
710 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE); in vfe_set_scale_cfg()
712 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG); in vfe_set_scale_cfg()
717 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE); in vfe_set_scale_cfg()
722 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE); in vfe_set_scale_cfg()
729 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE); in vfe_set_scale_cfg()
734 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE); in vfe_set_scale_cfg()
737 static void vfe_set_crop_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_crop_cfg() argument
746 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH); in vfe_set_crop_cfg()
751 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT); in vfe_set_crop_cfg()
756 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH); in vfe_set_crop_cfg()
765 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT); in vfe_set_crop_cfg()
768 static void vfe_set_clamp_cfg(struct vfe_device *vfe) in vfe_set_clamp_cfg() argument
774 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG); in vfe_set_clamp_cfg()
780 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG); in vfe_set_clamp_cfg()
783 static void vfe_set_qos(struct vfe_device *vfe) in vfe_set_qos() argument
788 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); in vfe_set_qos()
789 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); in vfe_set_qos()
790 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2); in vfe_set_qos()
791 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3); in vfe_set_qos()
792 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4); in vfe_set_qos()
793 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); in vfe_set_qos()
794 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); in vfe_set_qos()
795 writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); in vfe_set_qos()
798 static void vfe_set_ds(struct vfe_device *vfe) in vfe_set_ds() argument
803 static void vfe_set_cgc_override(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_set_cgc_override() argument
808 vfe_reg_set(vfe, VFE_0_CGC_OVERRIDE_1, val); in vfe_set_cgc_override()
810 vfe_reg_clr(vfe, VFE_0_CGC_OVERRIDE_1, val); in vfe_set_cgc_override()
815 static void vfe_set_camif_cfg(struct vfe_device *vfe, struct vfe_line *line) in vfe_set_camif_cfg() argument
835 writel_relaxed(val, vfe->base + VFE_0_CORE_CFG); in vfe_set_camif_cfg()
839 writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG); in vfe_set_camif_cfg()
842 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG); in vfe_set_camif_cfg()
845 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG); in vfe_set_camif_cfg()
848 writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG_0); in vfe_set_camif_cfg()
851 writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN); in vfe_set_camif_cfg()
854 vfe_reg_set(vfe, VFE_0_RDI_CFG_x(0), val); in vfe_set_camif_cfg()
857 writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG); in vfe_set_camif_cfg()
860 static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable) in vfe_set_camif_cmd() argument
865 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
873 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
876 static void vfe_set_module_cfg(struct vfe_device *vfe, u8 enable) in vfe_set_module_cfg() argument
884 writel_relaxed(val, vfe->base + VFE_0_MODULE_CFG); in vfe_set_module_cfg()
886 writel_relaxed(0x0, vfe->base + VFE_0_MODULE_CFG); in vfe_set_module_cfg()
889 static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev) in vfe_camif_wait_for_stop() argument
894 ret = readl_poll_timeout(vfe->base + VFE_0_CAMIF_STATUS, in vfe_camif_wait_for_stop()
905 static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1) in vfe_isr_read() argument
907 *value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0); in vfe_isr_read()
908 *value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1); in vfe_isr_read()
910 writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0); in vfe_isr_read()
911 writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1); in vfe_isr_read()
914 writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD); in vfe_isr_read()
917 static void vfe_violation_read(struct vfe_device *vfe) in vfe_violation_read() argument
919 u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS); in vfe_violation_read()
933 struct vfe_device *vfe = dev; in vfe_isr() local
937 vfe->ops->isr_read(vfe, &value0, &value1); in vfe_isr()
943 vfe->isr_ops.reset_ack(vfe); in vfe_isr()
946 vfe->ops->violation_read(vfe); in vfe_isr()
949 vfe->isr_ops.halt_ack(vfe); in vfe_isr()
953 vfe->isr_ops.reg_update(vfe, i); in vfe_isr()
956 vfe->isr_ops.sof(vfe, VFE_LINE_PIX); in vfe_isr()
960 vfe->isr_ops.sof(vfe, i); in vfe_isr()
964 vfe->isr_ops.comp_done(vfe, i); in vfe_isr()
965 for (j = 0; j < ARRAY_SIZE(vfe->wm_output_map); j++) in vfe_isr()
966 if (vfe->wm_output_map[j] == VFE_LINE_PIX) in vfe_isr()
972 vfe->isr_ops.wm_done(vfe, i); in vfe_isr()