Lines Matching refs:wbclk
201 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { in __fimc_pipeline_enable()
202 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); in __fimc_pipeline_enable()
211 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) in __fimc_pipeline_enable()
212 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); in __fimc_pipeline_enable()
275 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) in __fimc_pipeline_close()
276 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); in __fimc_pipeline_close()
1074 if (IS_ERR(fmd->wbclk[i])) in fimc_md_put_clocks()
1076 clk_put(fmd->wbclk[i]); in fimc_md_put_clocks()
1077 fmd->wbclk[i] = ERR_PTR(-EINVAL); in fimc_md_put_clocks()
1111 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); in fimc_md_get_clocks()
1122 fmd->wbclk[i] = clock; in fimc_md_get_clocks()