Lines Matching full:risc
66 cx25821_sram_channel_setup(dev, channel, buf->bpl, buf->risc.dma); in cx25821_start_video_dma()
76 cx_write(channel->dma_ctl, 0x11); /* FIFO and RISC enable */ in cx25821_start_video_dma()
97 /* risc op code error */ in cx25821_video_irq()
99 pr_warn("%s, %s: video risc op code error\n", in cx25821_video_irq()
179 ret = cx25821_risc_buffer(dev->pci, &buf->risc, in cx25821_buffer_prepare()
184 ret = cx25821_risc_buffer(dev->pci, &buf->risc, in cx25821_buffer_prepare()
193 ret = cx25821_risc_buffer(dev->pci, &buf->risc, in cx25821_buffer_prepare()
199 ret = cx25821_risc_buffer(dev->pci, &buf->risc, in cx25821_buffer_prepare()
205 ret = cx25821_risc_buffer(dev->pci, &buf->risc, in cx25821_buffer_prepare()
219 (unsigned long)buf->risc.dma); in cx25821_buffer_prepare()
245 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12); in cx25821_buffer_queue()
246 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC); in cx25821_buffer_queue()
247 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12); in cx25821_buffer_queue()
248 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ in cx25821_buffer_queue()
253 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1); in cx25821_buffer_queue()
257 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); in cx25821_buffer_queue()
281 cx_write(chan->sram_channels->dma_ctl, 0); /* FIFO and RISC disable */ in cx25821_stop_streaming()