Lines Matching refs:btwrite
3205 btwrite(0x000000, BT848_GPIO_REG_INP); in init_lmlbt4x()
3285 btwrite((1<<7), 0x058); in bttv_reset_audio()
3287 btwrite( 0, 0x058); in bttv_reset_audio()
4164 btwrite(BT848_ADC_RESERVED|BT848_ADC_AGC_EN, BT848_ADC); in init_PXC200()
4181 btwrite(val, BT848_GPIO_DMA_CTL); in init_PXC200()
4242 btwrite (0x00c3feff, BT848_GPIO_OUT_EN); in init_RTV24()
4244 btwrite (0 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4246 btwrite (0x10 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4248 btwrite (0 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4257 btwrite (0x4400 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4259 btwrite (0x4410 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4261 btwrite (watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4311 btwrite(0x080002, BT848_GPIO_OUT_EN); in init_PCI8604PW()
4323 btwrite(0x080000, BT848_GPIO_DATA); in init_PCI8604PW()
4325 btwrite(0x000000, BT848_GPIO_DATA); in init_PCI8604PW()
4582 btwrite (0x08<<16,BT848_GPIO_DATA);/*GPIO[19] [==> 4053 B+C] set to 1 */ in picolo_tetra_init()
4583 btwrite (0x04<<16,BT848_GPIO_DATA);/*GPIO[18] [==> 4053 A] set to 1*/ in picolo_tetra_init()
4591 btwrite (input<<20,BT848_GPIO_DATA); in picolo_tetra_muxsel()
4718 btwrite(bitmask, BT848_GPIO_OUT_EN); in PXC200_muxsel()
4725 btwrite(bitmask,BT848_GPIO_DATA); in PXC200_muxsel()