436 static int io_write(struct v4l2_subdev *sd, u16 reg, u8 val)  in io_write()  function
464 	ret = io_write(sd, reg, (val >> 8) & 0xff);  in io_write16()
467 	ret = io_write(sd, reg + 1, val & 0xff);  in io_write16()
477 	ret = io_write(sd, reg, (val >> 16) & 0xff);  in io_write24()
480 	ret = io_write(sd, reg + 1, (val >> 8) & 0xff);  in io_write24()
483 	ret = io_write(sd, reg + 2, val & 0xff);  in io_write24()
523 		io_write(sd, REG_HPD_POWER, hpd_pwr);  in tda1997x_manual_hpd()
524 		io_write(sd, REG_HPD_MAN_CTRL, hpd_man);  in tda1997x_manual_hpd()
531 		io_write(sd, REG_HPD_POWER, hpd_pwr);  in tda1997x_manual_hpd()
539 		io_write(sd, REG_HPD_AUTO_CTRL, hpd_auto);  in tda1997x_manual_hpd()
540 		io_write(sd, REG_HPD_MAN_CTRL, hpd_man);  in tda1997x_manual_hpd()
545 		io_write(sd, REG_HPD_AUTO_CTRL, hpd_auto);  in tda1997x_manual_hpd()
551 		io_write(sd, REG_HPD_MAN_CTRL, hpd_man);  in tda1997x_manual_hpd()
707 		io_write(sd, REG_VDP_CTRL, reg);  in tda1997x_configure_csc()
730 		io_write(sd, REG_VDP_CTRL, reg);  in tda1997x_configure_csc()
800 	io_write(sd, REG_VHREF_CTRL, reg);  in tda1997x_configure_vhref()
813 	io_write(sd, REG_VREF_F1_WIDTH, vref_f1_width);  in tda1997x_configure_vhref()
816 	io_write(sd, REG_VREF_F2_WIDTH, vref_f2_width);  in tda1997x_configure_vhref()
840 	io_write(sd, REG_PCLK, reg);  in tda1997x_configure_vidout()
851 	io_write(sd, REG_FILTERS_CTRL, prefilter);  in tda1997x_configure_vidout()
858 	io_write(sd, REG_OF, reg);  in tda1997x_configure_vidout()
876 	io_write(sd, REG_VDP_CTRL, reg);  in tda1997x_configure_vidout()
882 	io_write(sd, REG_DE_FREF, reg);  in tda1997x_configure_vidout()
891 	io_write(sd, REG_HS_HREF, reg);  in tda1997x_configure_vidout()
900 	io_write(sd, REG_VS_VREF, reg);  in tda1997x_configure_vidout()
918 	io_write(sd, REG_AUDIO_PATH, channel_assignment);  in tda1997x_configure_audout()
965 	io_write(sd, REG_AUDCFG, reg);  in tda1997x_configure_audout()
973 	io_write(sd, REG_AUDIO_LAYOUT, reg);  in tda1997x_configure_audout()
976 	io_write(sd, REG_FIFO_LATENCY_VAL, 0x80);  in tda1997x_configure_audout()
1008 	io_write(sd, REG_AUDIO_OUT_ENABLE, reg);  in tda1997x_configure_audout()
1011 	io_write(sd, REG_TEST_MODE, 0x00);  in tda1997x_configure_audout()
1024 	io_write(sd, REG_HDMI_INFO_RST, info_rst);  in tda1997x_hdmi_info_reset()
1029 		io_write(sd, REG_INT_FLG_CLR_MODE, reg);  in tda1997x_hdmi_info_reset()
1037 	reg = io_write(sd, REG_RATE_CTRL, reg);  in tda1997x_hdmi_info_reset()
1050 		io_write(sd, REG_PON_OVR_EN, PON_DIS);  in tda1997x_power_mode()
1052 		io_write(sd, REG_CFG1, PON_EN);  in tda1997x_power_mode()
1054 		io_write(sd, REG_DEEP_PLL7_BYP, PON_DIS);  in tda1997x_power_mode()
1058 		io_write(sd, REG_OF, reg);  in tda1997x_power_mode()
1064 		io_write(sd, REG_OF, reg);  in tda1997x_power_mode()
1066 		io_write(sd, REG_DEEP_PLL7_BYP, PON_EN);  in tda1997x_power_mode()
1068 		io_write(sd, REG_CFG1, PON_DIS);  in tda1997x_power_mode()
1070 		io_write(sd, REG_PON_OVR_EN, PON_EN);  in tda1997x_power_mode()
1164 	io_write(sd, REG_CLK_CFG, CLK_CFG_SEL_ACLK_EN | CLK_CFG_SEL_ACLK);  in tda1997x_reset_n1()
1165 	io_write(sd, REG_PON_OVR_EN, PON_EN);  in tda1997x_reset_n1()
1166 	io_write(sd, REG_PON_CBIAS, PON_EN);  in tda1997x_reset_n1()
1167 	io_write(sd, REG_PON_PLL, PON_EN);  in tda1997x_reset_n1()
1172 	io_write(sd, REG_MODE_REC_CFG1, reg);  in tda1997x_reset_n1()
1173 	io_write(sd, REG_CLK_CFG, CLK_CFG_DIS);  in tda1997x_reset_n1()
1174 	io_write(sd, REG_PON_OVR_EN, PON_DIS);  in tda1997x_reset_n1()
1177 	io_write(sd, REG_MODE_REC_CFG1, reg);  in tda1997x_reset_n1()
1333 		io_write(sd, REG_PIX_REPEAT, reg);  in tda1997x_parse_infoframe()
1339 		io_write(sd, REG_PIX_REPEAT, reg);  in tda1997x_parse_infoframe()
1356 	io_write(sd, REG_INT_FLG_CLR_SUS, source);  in tda1997x_irq_sus()
1368 		io_write(sd, REG_HDMI_INFO_RST, reg);  in tda1997x_irq_sus()
1370 		io_write(sd, REG_HDMI_INFO_RST, reg);  in tda1997x_irq_sus()
1402 	io_write(sd, REG_INT_FLG_CLR_DDC, source);  in tda1997x_irq_ddc()
1424 	io_write(sd, REG_INT_FLG_CLR_RATE, source);  in tda1997x_irq_rate()
1437 		io_write(sd, REG_INT_FLG_CLR_RATE, reg);  in tda1997x_irq_rate()
1458 				io_write(sd, REG_PIX_REPEAT, reg);  in tda1997x_irq_rate()
1487 	io_write(sd, REG_INT_FLG_CLR_INFO, source);  in tda1997x_irq_info()
1514 	io_write(sd, REG_INT_FLG_CLR_AUDIO, source);  in tda1997x_irq_audio()
1524 			io_write(sd, REG_HDMI_INFO_RST, reg);  in tda1997x_irq_audio()
1526 			io_write(sd, REG_HDMI_INFO_RST, reg);  in tda1997x_irq_audio()
1562 	io_write(sd, REG_INT_FLG_CLR_HDCP, source);  in tda1997x_irq_hdcp()
1571 		io_write(sd, REG_INT_MASK_TOP, reg);  in tda1997x_irq_hdcp()
1881 		io_write(sd, REG_EDID_IN_BYTE0 + i, edid->edid[i]);  in tda1997x_set_edid()
1885 		io_write(sd, REG_EDID_IN_BYTE128 + i, edid->edid[i+128]);  in tda1997x_set_edid()
2079 	io_write(sd, REG_HPD_AUTO_CTRL, HPD_AUTO_HPD_UNSEL);  in tda1997x_core_init()
2081 		io_write(sd, REG_MAN_SUS_HDMI_SEL, MAN_DIS_HDCP | MAN_RST_HDCP);  in tda1997x_core_init()
2082 		io_write(sd, REG_CGU_DBG_SEL, 1 << CGU_DBG_CLK_SEL_SHIFT);  in tda1997x_core_init()
2086 	io_write(sd, REG_SUS_SET_RGB2, 0x06);  in tda1997x_core_init()
2087 	io_write(sd, REG_SUS_SET_RGB3, 0x06);  in tda1997x_core_init()
2090 	io_write(sd, REG_RT_MAN_CTRL, RT_MAN_CTRL_RT |  in tda1997x_core_init()
2098 	io_write(sd, REG_TIMER_D, 0x54);  in tda1997x_core_init()
2111 	io_write(sd, REG_INT_MASK_TOP,  in tda1997x_core_init()
2115 	io_write(sd, REG_INT_MASK_SUS, MASK_MPT | MASK_FMT | MASK_SUS_END);  in tda1997x_core_init()
2117 	io_write(sd, REG_INT_MASK_RATE, MASK_RATE_B_ST | MASK_RATE_A_ST);  in tda1997x_core_init()
2119 	io_write(sd, REG_INT_MASK_INFO,  in tda1997x_core_init()
2122 	io_write(sd, REG_INT_MASK_AUDIO,  in tda1997x_core_init()
2126 	io_write(sd, REG_INT_MASK_HDCP, MASK_STATE_C5);  in tda1997x_core_init()
2128 	io_write(sd, REG_INT_MASK_DDC, MASK_DET_5V);  in tda1997x_core_init()
2130 	io_write(sd, REG_INT_MASK_AFE, 0);  in tda1997x_core_init()
2131 	io_write(sd, REG_INT_MASK_MODE, 0);  in tda1997x_core_init()
2134 	io_write(sd, REG_INT_FLG_CLR_TOP, 0xff);  in tda1997x_core_init()
2135 	io_write(sd, REG_INT_FLG_CLR_SUS, 0xff);  in tda1997x_core_init()
2136 	io_write(sd, REG_INT_FLG_CLR_DDC, 0xff);  in tda1997x_core_init()
2137 	io_write(sd, REG_INT_FLG_CLR_RATE, 0xff);  in tda1997x_core_init()
2138 	io_write(sd, REG_INT_FLG_CLR_MODE, 0xff);  in tda1997x_core_init()
2139 	io_write(sd, REG_INT_FLG_CLR_INFO, 0xff);  in tda1997x_core_init()
2140 	io_write(sd, REG_INT_FLG_CLR_AUDIO, 0xff);  in tda1997x_core_init()
2141 	io_write(sd, REG_INT_FLG_CLR_HDCP, 0xff);  in tda1997x_core_init()
2142 	io_write(sd, REG_INT_FLG_CLR_AFE, 0xff);  in tda1997x_core_init()
2146 		io_write(sd, REG_CGU_DBG_SEL, 1 << CGU_DBG_CLK_SEL_SHIFT);  in tda1997x_core_init()
2150 		io_write(sd, REG_WDL_CFG, WDL_CFG_VAL);  in tda1997x_core_init()
2152 	io_write(sd, REG_DEEP_COLOR_CTRL, DC_FILTER_VAL);  in tda1997x_core_init()
2154 	io_write(sd, REG_SVC_MODE, 0x00);  in tda1997x_core_init()
2156 	io_write(sd, REG_INFO_CTRL, 0xff);  in tda1997x_core_init()
2158 	io_write(sd, REG_INFO_EXCEED, 3);  in tda1997x_core_init()
2173 	io_write(sd, REG_HDCP_BCAPS, HDCP_HDMI | HDCP_FAST_REAUTH);  in tda1997x_core_init()
2178 	io_write(sd, REG_HDMI_CTRL, reg);  in tda1997x_core_init()
2186 	io_write(sd, REG_VDP_CTRL, reg);  in tda1997x_core_init()
2195 		io_write(sd, REG_VP35_32_CTRL + i, pdata->vidout_port_cfg[i]);  in tda1997x_core_init()
2222 	io_write(sd, REG_AUDIO_CLOCK, reg);  in tda1997x_core_init()
2667 	io_write(sd, REG_MAN_SUS_HDMI_SEL, MAN_RST_HDCP | MAN_DIS_HDCP);  in tda1997x_probe()
2674 		io_write(sd, REG_MAN_SUS_HDMI_SEL, 0x00);  in tda1997x_probe()
2675 		io_write(sd, REG_VDP_CTRL, 0x1f);  in tda1997x_probe()