380 	u32 v;  in control_rx_s_carrier_window()  local
384 		v = CNTRL_WIN_3_4;  in control_rx_s_carrier_window()
387 		v = CNTRL_WIN_3_3;  in control_rx_s_carrier_window()
392 		v |= CNTRL_WIN_4_3;  in control_rx_s_carrier_window()
395 		v |= CNTRL_WIN_3_3;  in control_rx_s_carrier_window()
398 	cx25840_and_or4(c, CX25840_IR_CNTRL_REG, ~CNTRL_WIN, v);  in control_rx_s_carrier_window()
462 	n = DIV_ROUND_CLOSEST(duty_cycle * 100, 625); /* 16ths of 100% */  in cduty_tx_s_duty_cycle()
517 	u32 events, v;  in cx25840_ir_irq_handler()  local
588 		for (i = 0, v = FIFO_RX_NDV;  in cx25840_ir_irq_handler()
589 		     (v & FIFO_RX_NDV) && !kror; i = 0) {  in cx25840_ir_irq_handler()
591 			     (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) {  in cx25840_ir_irq_handler()
592 				v = cx25840_read4(c, CX25840_IR_FIFO_REG);  in cx25840_ir_irq_handler()
593 				rx_data[i].hw_fifo_data = v & ~FIFO_RX_NDV;  in cx25840_ir_irq_handler()
609 	v = 0;  in cx25840_ir_irq_handler()
619 		v |= CNTRL_RFE;  in cx25840_ir_irq_handler()
628 		v |= CNTRL_RXE;  in cx25840_ir_irq_handler()
631 	if (v) {  in cx25840_ir_irq_handler()
633 		cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl & ~v);  in cx25840_ir_irq_handler()
656 	unsigned u, v, w;  in cx25840_ir_rx_read()  local
690 		v = (unsigned) pulse_width_count_to_ns(  in cx25840_ir_rx_read()
692 		if (v > IR_MAX_DURATION)  in cx25840_ir_rx_read()
693 			v = IR_MAX_DURATION;  in cx25840_ir_rx_read()
696 			{ .pulse = u, .duration = v, .timeout = w };  in cx25840_ir_rx_read()
699 			 v, u ? "mark" : "space", w ? "(timed out)" : "");  in cx25840_ir_rx_read()
1030 	/* The CX23888 chip doesn't have an IR controller on the A/V core */  in cx25840_ir_log_status()